Evaluation Board User Guide - analog.com · Evaluation Board User Guide UG-600 EVALUATION BOARD HARDWARE The EVAL-ADAU1977Z. board is common for the ADAU1977, ADAU1978, and ADAU1979

Evaluation Board User Guide UG-600

One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

Evaluating the ADAU1977/ADAU1978/ADAU1979

FEATURES For the evaluation of the ADAU1977/ADAU1978/ADAU1979

quad ADCs Total harmonic distortion (THD) plus noise (N): −95 dB at

−1 dBFS Signal to noise ratio (SNR): 109 dB, A weighting filter Built-in diagnostics for microphone inputs

APPLICATIONS Automotive

GENERAL DESCRIPTION The EVAL-ADAU1977Z/EVAL-ADAU1978Z/EVAL-ADAU1979Z is used for quick evaluation of the ADAU1977/ADAU1978/ADAU1979 quad ADCs. The evaluation board can output up to four channels of digital output. The evaluation board requires a power supply of +5 V for the ADAU1978 and the ADAU1979 and a power supply of +5 V and ±20 V (optional) for testing the diagnostic features of the ADAU1977.

EVALUATION BOARD CONNECTION DIAGRAM

Figure 1.

1175

1-00

1

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 27

http://www.analog.com/ADAU1977?doc=EVAL-ADAU1977Z_1978Z_1979Z_UG.600.pdf






http://www.analog.com/eval-ADAU1977Z?doc=EVAL-ADAU1977Z_1978Z_1979Z_UG.600.pdf










http://www.analog.com

UG-600 Evaluation Board User Guide

TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Evaluation Board Connection Diagram ........................................ 1 Revision History ............................................................................... 2 Evaluation Board Hardware ............................................................ 3

Power Supply Connectors ........................................................... 3 Input Connectors .......................................................................... 3 Output Connectors ...................................................................... 3 I2C/SPI Control Connector ......................................................... 3 Jumpers .......................................................................................... 3

Setup of the Evaluation Board Connections ................................. 5

Evaluation Board Setup Instructions ..........................................6 Jumper Settings ..............................................................................6 USBi and Standalone GUI Setup .................................................7 ADAU1977 Power-On ..................................................................7 Standalone GUI I2C Control ........................................................7 Microphone Diagnostics ..............................................................8 Standalone GUI SPI Control .......................................................9 Standalone Mode ...........................................................................9

Evaluation Board Schematics and Artwork ................................ 10 Board Layout ............................................................................... 16

Ordering Information .................................................................... 23 Bill of Materials ........................................................................... 23

REVISION HISTORY 8/14—Revision 0: Initial Version

Rev. 0 | Page 2 of 27


EVALUATION BOARD HARDWARE The EVAL-ADAU1977Z board is common for the ADAU1977, ADAU1978, and ADAU1979. The evaluation board is designed as a 4-layer printed circuit board (PCB). The top and bottom layers are for signals, whereas Layer 2 and Layer 3 are used as ground and a power plane, respectively. The PCB layout is important to achieve good audio performance. The following sections offer useful guidelines for operation of the board.

POWER SUPPLY CONNECTORS The EVAL-ADAU1977Z board requires +5 V for the ADAU1978 and ADAU1979 and may need an additional ±20 V for testing the 10 V rms inputs of the ADAU1977. Connect the 5 V power supply at J5 and J4. Connect the ±20 V power supply at either TP3 (+20 V) or TP1 (−20 V). The +5 V power supply must be capable of providing a 1 A current rating, and the ±20 V power supply must be capable of providing at least a 100 mA current rating. When the diagnostics feature is not used, the ±20 V supply is not required.

INPUT CONNECTORS The EVAL-ADAU1977Z has five 3.5 mm audio jack connectors for analog inputs: J9, J17, J28, J38, and J47. The J9 connector is used for generating line level inputs capable of 10 V rms, with a common-mode level of 7 V for the ADAU1977. The J17, J28, J38, and J47 connectors are used as Channel 1, Channel 2, Channel 3, and Channel 4 line level inputs to the ADC, respectively. All five inputs are differential.

OUTPUT CONNECTORS The ADC digital output is available at J25 (unbuffered) and J26 (buffered). In addition, ADC digital output is available as a 2-channel Sony Philips digital interface format (SPDIF). J25 and J26 are used for I2S or time division multiplex (TDM), serial digital output. The U16 provides the SPDIF optical output, and J35 provides the SPDIF coaxial output.

I2C/SPI CONTROL CONNECTOR The J8 (10-way header) can be used for I2C/SPI serial port communication for controlling the board. The supplied USB interface board can be used for setting the device. The graphic user interface (GUI) software is used along with the USB interface board.

JUMPERS The EVAL-ADAU1977Z board provides jumpers for setting this board into various operating modes.

Table 1. Jumper Descriptions Component No. Mnemonic Description J1 MICBIAS SELECT AUX IN This jumper allows selecting either internal or external micbias for auxiliary input. J2 CM SELECT AUX IN Used for setting the common mode level for auxiliary input. J4 GND Ground or 0 V connection for the power supply. J5 +5V +5 V connection for the power supply. J8 USBi Connector for USBi board. J9 AUX IN Connector for auxiliary input. J10 IOVDD Selects the IOVDD 1.8 V or 3.3 V. J11 IOVDD Ext/Int Selects the internal or external supply for IOVDD. J12 VBAT Ext/Int Selects the internal or external supply for VBAT. J13 3.3 V Ext/Int Selects the internal or external 3.3 V supply. J14 AVDD Ext/Int Selects the internal or external AVDD supply for the ADAU1977. J15/J20 Input 1 Select Selects the input source for Channel 1. J16 AVDD Current This jumper is used to measure the AVDD current. J17 CH1 Input Connector for Channel 1 input. J19 Input Short This jumper is used to short the ± Channel 1 input. J21 Boost Current This jumper is used to measure the boost converter current. J22 MICBIAS-CH1 Selects the internal or external micbias for Channel 1. J24 Boost Switch This jumper is used to measure the boost switch current. J25 ADC Output Header for connection to ADC digital pins. J26 ADC Output Buffered Header for ADC digital output. J27/J30 Input 2 Select Selects the input source for Channel 2. J28 CH2 Input Connector for Channel 2 input. J29 Input Short This jumper is used to short the ± Channel 2 input.


http://www.analog.com/eval-ADAU1977z?doc=EVAL-ADAU1977Z_1978Z_1979Z_UG.600.pdf













Component No. Mnemonic Description J31 MICBIAS-CH1 Selects the internal or external micbias for Channel 2. J33 IOVDD Current Connector for measuring IOVDD current. J34 128fs Mode Selects the 96 k sample rate for the SPDIF transmitter. J35 Coaxial Output Connector for SPDIF coaxial output. J36/J40 Input 3 Select Selects the input source for Channel 3 J28 CH3 Input Connector for Channel 3 input. J39 Input Short This jumper is used to short the ± Channel 3 input. J41 MICBIAS-CH1 Selects the internal or external micbias Channel 3. J42 DVDD External DVDD current measurement. J43 MCLKIN Selects the external master clock input to the ADAU1977. J44 PLL Filter Selects the PLL filter for LRCLK mode. J45 PLL Filter Selects the PLL filter for MCLK mode. J46/J49 Input 4 Select Selects the input source for Channel 4. J48 Input Short This jumper is used to short the ± Channel 4 Input. J50 MCLKIN Selects the source for MCLKIN between oscillator, header, and Subminiature Version A,

SMA. J51 MICBIAS-CH1 Selects the internal or external micbias Channel 4. J52 MCLK Input SMA connector for external master clock input. J53 FREQ Select Selects the switching frequency for the 3.3 V regulator. JP1 AUX IN Header for external auxiliary input JP2 CH1 IN Header for external Channel 1 input. JP3 CH2 IN Header for external Channel 2 input. JP4 Reset SPDIF Tx SPDIF Tx reset. JP5 CH3 IN Header for external Channel 3 input. JP6 SA Mode This jumper is used for standalone mode. JP7 CH4 IN Header for external Channel 4 input. JP8 RESET Header for the ADAU1977 reset. JP9 MCLKIN Header for master clock input. JP10 Reserved Reserved for internal use. JP11 Oscillator Enable Enables the oscillator.





SETUP OF THE EVALUATION BOARD CONNECTIONS

Figure 2. Evaluation Board Jumper Settings

AARDVARK/USBi

SLIDE SWITCH SETTINGS

CHIP ADDRESS 0x11 ON ONOFFON A

DD

R1

AD

DR

0

256*

fs48

KI2

SM

AST

ERTD

M4

SLO

TS 1

– 4

384*

fs96

KTD

MSL

AVE

TDM

8SL

OTS

5 –

8

LRCLKBCLKSDATA2SDATA1

SERIAL DATA OUTPUTMASTERSLAVE

SDATA TO I2S HDR

BCLK

LRCLK

SDATA TO SPDIF OUT

BCLK

LRCLK

SDATA2

SDATA1

SDATA2

SDATA1

SDATA2SDATA1

MCLK

+5V0V EXT DVDD EXT IOVDDEXT AVDD

–17V

TO

–22

V

0V +17V

TO

+22

V

REQUIRED ONLYFOR GENERATING

VBAT AND 10V RMSSIGNAL AT 7V CM

BUFFER TO BE USED FOR GENERATING10V RMS SIGNAL AT VARIOUS CM LEVEL

GN

D1/

3 M

ICB

IAS

VBA

T/2

GN

D2/

3 M

IC B

IAS

VBA

T/2

CM OPTIONS

AUX ANALOG INPUT10V RMS

FAU

LT IN

PUT

+IN

PUTS

FAU

LT IN

PUT

–IN

PUTS

0V

CONNECT VOLTAGE SOURCETO INTRODUCE THE FAULTON INPUT 0V TO 18V MAX

NORMALCONTROL FOR AVDD SWITCHERPWDN

–BUFF

–INx+INx

ADC INPUTSELECT

ONOFF

DIRECT COUPLEINPUTS

NO

RM

AL

MIC

BIA

SN

OR

MA

LFA

ULT

xG

ND

GENERATEFAULT

ON INPUTS

ONOFF

MICBIASRESISTOR

SELECT

300Ω500Ω

INT

EXTMICBIASSELECT

PLL FILTERSELECT

LRC

KM

CLK

POWERDOWN

OSCILLATOR

PSIA

OSC

SMA

MCLKSELECT

PSIA MCLKIN

EXT MCLKIN

DIR

ECT

LEVE

L SH

IFT

INSTALLFOR SA MODE

DO NOT CONNECT POWER SUPPLYINTERNAL USE ONLY

DO NOT CONNECTPOWER SUPPLY

INTERNAL USE ONLY

7 BIT DEVICE ADDRESS

ADDRESSSETTINGFOR 0x71

ANALOG INPUT1MAX 10V RMS




+BUFF

MCLKADAU197xSELECT

CHIP ADDRESS 0x31 ON OFFCHIP ADDRESS 0x51 OFF ONCHIP ADDRESS 0x71 OFF OFF

STAND ALONE MODESPI MODEI2CMODE

1.2MHz600kHz

CONNECT5V SUPPLY

1175

1-00

2


http://www.analog.com/eval-ADAU1977ebz?doc=EVAL-ADAU1977Z_1978Z_1979Z_UG-600.pdf


EVALUATION BOARD SETUP INSTRUCTIONS To setup the EVAL-ADAU1977Z, the user needs a 5 V power supply, differential analog input source, and a PC with a USB port. Use a single 5 V, 1 A current rating for the power supply.

For full evaluation of the ADAU1977, a ±20 V supply is required. This power supply facilitates the generation of a 10 V rms signal as well as a VBAT supply for microphone diagnostics.

JUMPER SETTINGS See Figure 2 for the setup of the evaluation board connections. Connect the positive power supply lead to J5 and the 0 V lead to J4 of the evaluation board. Do not turn the power supply on at this time.

In the power supply section, take the following steps:

1. Set Jumpers J13 and J14 to the INT position. 2. Set Switch S1 to the ON position. 3. Set Jumper J10 to the desired IOVDD supply, 3.3 V, or

1.8 V. 4. Set Jumper J11 to the INT position for the internal

IOVDD. 5. Set Switch S2 to the ON position to turn on the 1.8 V

regulator.

In the daughter board section, take the following steps:

1. Install Jumpers J16, J21, J24, and J33. The J16 jumper provides the AVDD. Jumpers J21 and J24 provide the 3.3 V power supply to the boost converter. The J33 jumper provides the IOVDD to the ADAU1977/ADAU1978/ADAU1979.

In the PLL and MCLK section, take the following steps:

1. Select the master clock source. The evaluation board provides three options for providing the master clock to the ADC. The three options include the following: the on-board 12.288 MHz oscillator, the external source at JP9, and the SMA Connector J52.

2. To use the on-board oscillator, install Jumper JP11. To shut down the oscillator, remove Jumper JP11.

3. Set Jumper J50 in the OSC center position. 4. Alternatively, if the external master clock is available, it can

either be connected at J52 as a coaxial 50 Ω SMA connector, or at JP9 as a 2-way header (0.1” pitch). If using JP9 as the source, install J50 in the PSIA position. If using J52 as the source, install J50 in the SMA position.

5. The MCLK is level shifted to the required IOVDD. By default, the level shifted master clock is used. Set Jumper J43 to the IOVDD position. Alternatively, if direct MCLK pin access is needed, set J43 to the 3V3 position. In this case, ensure that the master clock supplied to the ADAU1977 is at the correct IOVDD level.

6. Two options are provided for the PLL filter, MCLK mode or LRCLK mode. By default, the MCLK mode is selected

by installing Jumper J44 in the MCLK position. If the LRCLK mode is required, set J44 in the LRCLK position.

In the I2S output section, take the following steps:

1. Determine the serial data format used for the ADC output. Either I2S/left justified (LJ)/right justified (RJ)/TDM format or SPDIF format are available.

For I2S/LJ/RJ/TDM format, take the following steps:

1. Set LK3 and LK5 to the I2S position. 2. Set LK1 and LK2 to the I2S position. 3. Set Switch S13 to the MASTER position if the

ADAU1977/ADAU1978/ADAU1979 is used as a master for the serial audio port. Alternatively, it can be set to the SLAVE position; however, in this case, both the LRCLK (frame clock) and the BCLK (bit clock) must be provided from an external source.

4. The buffered serial output is available on the J26 (4-way dual row, 0.1” pitch) header. Alternatively, the direct (unbuffered) ADAU1977 serial outputs are available on the J25 (8-way dual row, 0.1” pitch) header.

For SPDIF format, take the following steps:

1. Ensure LK3 and LK5 are set to the SPDIF position. 2. Ensure LK1 and LK2 are set to the SPDIF position. 3. Ensure LK4 is set to the desired serial data pair. Either

Pair 1 (Ch1 and Ch2) or Pair 2 (Ch3 and Ch4) can be selected because only 2-channel SPDIF output is available on the evaluation board.

4. Ensure LK6 is set to the SPDIF position which provides the MCLK to the SPDIF transmitter.

5. The SPDIF output is available on U16 as an optical form or on J35 as a coaxial form.

For the I2C/SPI control section, take the following steps:

1. Slide Switches S3, S4, and S5 are used to set the control communication protocol for the ADAU1977.

For I2C protocol, take the following steps:

1. Set Switches S3, S4, and S5 to the I2C position. 2. Ensure JP6 is not installed. 3. The device address for the ADAU1977 is set using

Switch S9. The possible 7-bit device addresses are 0x11, 0x31, 0x51, or 0x71. The EVAL-ADAU1977Z evaluation board is set for the 0x71 address.

4. The 20-way (10-pin, dual row, 0.1” pitch), Shrouded Connector J8 is used to connect the supplied USBi. Alternatively, any other I2C master controller can be connected at J8 to control the ADAU1977.

5. The Analog Devices, Inc., USBi is the quickest way to set the EVAL-ADAU1977Z board using the supplied standalone GUI or SigmaStudio™ software.

















Evaluation Board User Guide UG-600 For the ADAU1977 line input application, take the following steps:

1. J9 is used to level shift the input source to the VBAT/2 level.

2. For the ADAU1977, connect the analog audio source to the J9 auxiliary input connector.

3. J2 has two jumpers that must be set to the VBAT and VBAT2 positions.

4. Check the dc voltage at J2 (Pin 2). This voltage should be approximately 7 V. If not, set J2 using the preset R5.

5. Set the S10, S16, S21, and S26 switches to the ON position for dc-coupled inputs.

6. Set Jumpers J15, J20, J27, J30, J36, J40, J46, and J49 to the BUFF position.

7. Alternatively, the signal source can be connected directly to J17, J28, J38, and J47 by setting Jumpers J15, J20, J27, J30, J36, J40, J46, and J49 to the –IN or +IN position. Note that in this setting, the input source must be level shifted appropriately.

For the ADAU1978/ADAU1979 line input applications, take the following steps:

1. Ensure Jumper J15 and Jumper J20 are set to the –IN and +IN position for Ch1.




5. Ensure Switches S10, S16, S21, and S26 are set to the OFF position for the ADAU1978 and the ADAU1979, which sets the inputs as ac-coupled mode.

For the ADAU1977 microphone input application, take the following steps:

1. Ensure Switches S7, S12, S15, S18, S20, S23, S25, and S29 are set to the ON position for using the ADAU1977 inputs as microphone.

2. These switches are used to set the microphone bias resistors for the microphone inputs. Either 300 Ω or 500 Ω can be selected when switches are set to the ON position for the respective inputs.

3. Ensure Jumpers J22, J31, J41, and J51 are set to the INT position (the internal micbias is used). These jumpers allow the microphone bias to be selected either from the ADAU1977, or externally, if desired.

4. Jumpers J17, J28, J38, and J47 are used for the microphone input connection.

5. Ensure Jumpers J15, J20, J27, J30, J36, J40, J46, and J49 are set to the IN position.

6. Ensure Switches S10, S16, S21, and S26 are set to the ON position for direct-coupled mode.

USBi AND STANDALONE GUI SETUP To set up the USBi and standalone GUI, take the following steps:

1. If using the standalone GUI, click the appropriate x86 or x64 folder setup.exe to install the GUI.

2. The software is installed on your desktop with the ADAU1977 Rev C icon.

ADAU1977 POWER-ON To power-on the EVAL-ADAU1977Z, take the following steps:

1. Turn on the 5 V supply. Typical 40 mA current is drawn from the 5 V supply in standby condition.

STANDALONE GUI I2C CONTROL The EVAL-ADAU1977Z board can be controlled via the I2C using the standalone GUI and USBi. Take the following steps:

1. Connect the provided USBi board to J8 and to the USB port on the PC.

2. Double-click the ADAU1977 Rev C icon on your desktop to invoke the GUI.

3. A new window, as is shown in Figure 3, will appear. 4. The USBi - Connected message will appear at the top of

the window (see Figure 3). 5. Click Power Up. The Communication Established

message will appear at the top of the window (see Figure 3). 6. Click Read all to read the PLL status. The PLL status

should be green and locked. 7. When using the ADAU1977, and the boost converter is

turned on, the Boost Good indicator should be green. For the ADAU1978 and the ADAU1979, this function is not applicable and will stay red.

8. Go to the ADC Control tab (see Figure 4) and click Master/Slave for the ADC master mode. When green, the ADC is in master mode and it will output the bit clock and frame clock, together with the serial data at the J25.

9. Connect the input source at the desired input to AIN1, AIN2, AIN3, and AIN4 or AUXIN using 3.5 mm audio jacks. Alternatively, the 2-pin (0.1” pitch) header can be used to feed the inputs to the EVAL-ADAU1977Z evaluation board. Note that the input level requirements for the ADAU1977, the ADAU1978, and the ADAU1979 are different, and the appropriate level input signal must be applied. The full-scale inputs for the ADAU1977 is 10 V rms, for the ADAU1978 is 2 V rms, and for the ADAU1979 is 4.5 V rms.

10. The ADC output is available at the J26 header or the SPDIF output depending on the selected option.

























Figure 3. Register Control for the ADAU1977 GUI Page 1



MICROPHONE DIAGNOSTICS Microphone diagnostics are applicable for the ADAU1977 only, used with the microphone input application circuit, as described in the ADAU1977 data sheet.

1. Connect the microphone to the desired input connector: J17, J28, J38, or J47.

2. Ensure that the inputs are dc-coupled by setting Switches S10, S16, S21, and S26 to On.

3. Select the appropriate bias resistors using Switches S7 and S12 for Channel 1, Switches S15 and S18 for Channel 2, Switches S20 and S23 for Channel 3, Switches S25 and S29 for Channel 4. The resistor options are 300 Ω or 500 Ω.

4. Select the internal microphone bias by setting Jumpers J22, J31, J41, J51 to the INT position.

5. Ensure that the Boost Good indicator is green on the GUI Power Up tab.

6. Ensure Boost is On. 7. By default, the 48 k sample rate is selected, and the boost

switching frequency is 1.5 MHz. 8. In the MIC BIAS CONTROL section, select the desired

microphone bias output voltage (see Figure 3). By default, it is 8.5 V.

9. Ensure Mic Bias is Enabled (see Figure 3). 10. Check the microphone bias voltage output on the EVAL-

ADAU1977Z board at the test point (TP). 11. Go to the Diagnostics tab on the GUI (see Figure 5). 12. With the microphone connected, the typical voltage at the

positive (+) input is 2/3 of microphone bias, and at the negative (−) input is 1/3 of microphone bias.

13. Click Read in the Diagnostics tab on the GUI (see Figure 5). 14. With proper connections and normal working conditions,

all of the channel status indicators will be blue for each respective channel connected with the microphone.

15. To check the diagnostics functionality, create a fault situation at the microphone input. This fault situation is done by

1175

1-00

311

751-

004

1175

1-00

5


http://www.analog.com/ADAU1977?doc=EVAL-ADAU1977Z_1978Z_1979Z_UG-600.pdf








either using the microphone itself or by using the dummy 300 Ω or 500 Ω resistor connected across the positive and negative input terminals of the evaluation board.

16. The faults are reported in the channel status indicators for each channel for which Diag Control is Enabled (see Figure 5).

17. The GUI shown in Figure 5 provides access to all the diagnostics registers.

18. The DIAG TRIP POINT ADJUST1 section provides control for adjusting the trip thresholds (see Figure 5).

19. The DIAG_ADJUST2 section provides the fault timeout adjustment controls (see Figure 5).

20. The DIAG IRQ1 section is used to generate the IRQ using the FAULT pin. The Fault Pin Drive section is used to report the fault in the system (see Figure 5).

21. Use the previous controls, as well as the ADAU1977 diagnostics registers in this data sheet, to suit the needs of the system using the intended microphone.

STANDALONE GUI SPI CONTROL The EVAL-ADAU1977Z can also be configured for SPI control instead of for I2C control. To use in SPI control mode, take the following steps:

1. Change Slide Switches S3, S4, and S5 to SPI mode. 2. Ensure JP6 is not installed. 3. In the GUI, go to Options/Comm Protocol and select SPI

mode. (The default is I2C mode). 4. The evaluation board is now configured for the SPI

protocol, and the GUI functions similarly to the GUI functions in I2C mode.

STANDALONE MODE The evaluation board (EVAL-ADAU1977Z) also has a standalone mode that does not require any I2C or SPI control. In standalone mode, the ADAU1977/ADAU1978/ADAU1979 are set internally for a specific operation; no register access is provided because the I2C and SPI ports are disabled. To invoke the standalone mode (SA mode), insert Jumper JP6 and set Slide Switches S3, S4, and S5 to the standalone position. In SA mode, limited options are available that can be set using the dual inline package (DIP) Switch S8. See Table 2 for the S8 switch settings.

Table 2. Settings in SA Mode ADAU1977 Pin No., Mnemonic Switch S8 Function OFF ON Pin 17, SDA/COUT S8-6 MCLK 256 fs to 384 fs select IOVDD 384 fs GND 256 fs Pin 18, SCL/CCLK S8-5 Full-scale (FS) 48 k/96 k select IOVDD 96 k GND 48 k Pin 19, ADDR0/CLATCH S8-4 I2S/TDM select IOVDD TDM GND I2S

Pin 20, ADDR1/CIN S8-3 Master/slave select IOVDD Slave GND Master Pin 14, SDATAOUT2 S8-2 TDM 4 to TDM 8 select IOVDD TDM 8 GND TDM 4 Pin 8, FAULT S8-1 TDM 8 slot assignments, Slot 1 to Slot 4 or

Slot 5 to Slot 8 IOVDD Slot 5 to Slot 8 GND Slot 1 to Slot 4










EVALUATION BOARD SCHEMATICS AND ARTWORK

Figure 6. EVAL-ADAU1977Z Schematic, Page 1 of 6

PLL

FILT

ER S

ELEC

TIO

N

IDVD

D

DA

UG

HTE

R B

OA

RD

HEA

DER

S

AVDD_1977

AVD

D

MIC

BIA

S

SCA

N T

EST

HEA

DER

RES

ET A

DA

U19

77

SELE

CT

J44

OR

J45

NO

RM

ALL

Y O

PEN

INST

ALL

IF U

SIN

G E

XT D

VDD

NO

TES

ON

JU

MPE

R S

ELEC

TIO

N

J21:

Use

for M

easu

ring

Cur

rent

into

DC

-DC

pre

indu

ctor

J24:

Use

for M

easu

ring

Cur

rent

into

DC

-DC

at S

W n

ode

J33:

Use

for m

easu

ring

DU

T IO

VDD

cur

rent

J16:

Use

for M

easu

ring

DU

T A

VDD

Cur

rent

J44:

PLL

filte

r sel

ectio

n is

usi

ng L

RC

LK a

s PL

L in

put

J45:

PLL

filte

r sel

ectio

n is

usi

ng M

CLK

as

PLL

inpu

t

J50:

Use

for s

elec

ting

the

leve

l shi

fted

MC

LK fo

r the

DU

T

J43:

Use

for s

elec

ting

the

dire

ct e

xter

nal M

CLK

for t

he D

UT

1 3 5 7 9

2 4 6 8 1011 13 15 17 19

12 14 16 18 20

J23

2x10

13579

246810

1113151719

1214161820

J37

2x10

13579

246810

1113151719

1214161820

J32

2x10

C53

0.10

µF

C65

0.10

µF

C66

0.10

µF

C67

0.10

µF

C68

0.10

µF

C61

0.10

µF

C50

10µF

25V

R80

4K87

C97

39nF

C94

2.2n

F N

P0

12

L3

C39

10µF

25V

C42

0.10

µF

13579

2468

101113151719

1214161820

J18

2x10

12

J21

DC

-DC

CU

RR

ENT

MEA

SUR

EMEN

T

12

J16

2-JUMPER

R81

1k00

C98

5.6n

F

C95

390p

F

12J44

PLL-LRCK

12J45

PLL-MCLK

R11

1O

PEN

12

J24C

UR

REN

TM

EASU

REM

ENT

TP34

12

J33

C71 10µF

12

J42

C70 10µF

C49

1.0n

F

+C

45 10µF

R41

OPEN

TP65TP66TP67TP68

TP35

TP36

TP38

TP41

1AGND1 2VREF 3PLL_FILT 4AVDD2 5AGND2 6/PD/RST 7MCLKIN 8FAULT/TBD_SEL 9SA_MODE 10DVDD

11D

GN

D12

IOVD

D13

SDA

TAO

UT1

14SD

ATA

OU

T2/T

DM

_SEL

15LR

CLK

16B

CLK

17SD

A/C

OU

T/M

CLK

_SEL

18SC

L/C

CLK

/FS_

SEL

19A

DD

R0/

CLA

TCH

/FM

T_SE

L20

AD

DR

1/C

IN/M

S_SE

L

21PGND

22PGND

23SW

24SW

25VBOOST_OUT

26VBOOST_IN

27MICBIAS

28MB_GND

29AGND3

30VBAT

31A

VDD

3

32A

IN1N

33A

IN1P

34A

IN2N

35A

IN2P

36A

IN3N

37A

IN3P

38A

IN4N

39A

IN4P

40A

VDD

1

41EP

AD

U12

AD

AU

1977

TP43

TP44

TP46

TP47

TP74

TP71

TP55

TP54

TP42

TP40

TP29

TP28

TP23

TP50

TP24

TP25

TP63

TP61

TP27

TP69

TP45

TP57

TP72

R47

49.9

ΩR

5049

.9Ω

R53

49.9

ΩR

5649

.9Ω

TP73

R86

49.9

Ω

L5

C10

60.

10µF

JP11 R92

10.0

kΩ10

.0kΩ

R85

49.9

ΩC

104

10pF

R83 0Ω

J52

R87

49.9

Ω

C10

510

pF

R90 0Ω

2A

1

3A

2

7B

1

6B

2

1VCCA

8VCCB 4

GND

5D

IRU

20

SN74

LVC

2T45

DC

TR

C46

0.10

µFC

108

0.10

µF

R78

49.9

Ω

R82

10.0

kΩ

1

2

JP9

R91

OPE

N

R89

OPE

N

12

34

56

J50

A B1

2

3

J43

1 3 5 7 9

2 4 6 8 1011 13 15

12 14 16

J25

2x8

R84

10.0kΩ

JP8

C101

0.10µF

S27

TP62

1O

E

2G

ND

3 OU

TPU

T

4VD

D

Y1OSC

_AP3

S-12

.288

MH

Z_SM

D

R1300Ω

R131

OPEN

R132

OPEN

C11

1C

112

R13

410

.0kΩ

12

J54

FAU

LT-P

ULL

UP

AVD

D

AVD

D_A

DC

IOVD

D_1

977

AD

DR

1/C

IN/M

S_SE

L [1

,5]

AD

DR

0/C

LATC

H/F

MT_

SEL

[1,5

]SC

L/C

CLK

/FS_

SEL

[5]

SDA

/CO

UT/

MC

LK_S

EL [5

]

IOVD

D

VBAT [2,4]

AIN

1N[2

,6]

AIN

1P[2

,6]

AIN

2N[2

,6]

AIN

2P[2

,6]

AIN

3N[2

,6]

AIN

4P[2

,6]

AIN

4N[2

,6]

AIN

3P[2

,6]

AVD

D_A

DC

[1] PD/RST_1977[1,3] MCLKIN_1977

[5] SA_MODE

AVD

D_A

DC

AVD

D_D

C_D

C

VREF

VBOOST_IN

AVD

D

AD

DR

1/C

IN/M

S_SE

LA

DD

R0/

CLA

TCH

/FM

T_SE

L

SDA

/CO

UT/

MC

LK_S

ELSC

L/C

CLK

/FS_

SEL

FAULT/TBD_SEL

MICBIAS_1977

SA_MODE

MCLKIN_1977PD/RST_1977

AIN

4PA

IN4N

AIN

3PA

IN3N

AIN

2PA

IN2N

AIN

1PA

IN1N

VBAT

MICBIAS_1977 [2]

VREF

DVD

D_I

N

DVDD

GND

GND

GN

D

VREF

BC

LKLR

CLK

SDA

TAO

UT2

/TD

M_S

ELSD

ATA

OU

T1

BC

LK_X

[3]

LRC

LK_X

[3]

SDA

TAO

UT2

/TD

M_S

EL_X

[3]

SDA

TAO

UT1

_X [3

]

IOVD

D+3

.3V

MC

LKIN

_197

7 [1

,3]

+3.3

V

MC

LK_3

.3V

+3.3

V

OSC

SMAAP

[1,3

] MC

LKIN

_197

7

[5] S

DA

TAO

UT2

/TD

M_S

EL

[1] P

D/R

ST_1

977

SDA

TAO

UT1

[1,5

] AD

DR

0/C

LATC

H/F

MT_

SEL

[1,5

] AD

DR

1/C

IN/M

S_SE

L

LRC

LKB

CLK

PD/R

ST_1

977

[1]

IOVD

D

AVD

D_A

DC

AVD

D_A

DC

AVDD_ADC

11751-006





INPUT CH1

MIC BIAS SELECT P

MIC BIAS SELECT N

FAULT GEN SELECT P

FAULT GEN SELECT N

AC COUPLING CAP BYPASS SHO

RT

P&N

INPUT CH2

MIC BIAS SELECT P

MIC BIAS SELECT N

FAULT GEN SELECT P

FAULT GEN SELECT N

AC COUPLING CAP BYPASS

SHO

RT

P&N

INPUT CH3

MIC BIAS SELECT P

MIC BIAS SELECT N

FAULT GEN SELECT P

FAULT GEN SELECT N


RT

P&N

INPUT CH4

MIC BIAS SELECT P

MIC BIAS SELECT N

FAULT GEN SELECT P

FAULT GEN SELECT N


RT

P&N

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

INPUT BUFFER FOR LEVEL SHIFTING INPUT

ANALOG INPUTS

CM INPUT SELECT

ADJUST FOR DESIRED CM LEVEL

R106499Ω

R108 499Ω

R105301Ω

R107301Ω

123

4

S12

12 3

4S7

A B1

2

3J22

TP30

AB

1

2

3J2

0H

DR

-3W

AY

AB

1

2

3J1

5H

DR

-3W

AY

RING

SLEEVE

TIPJ17

C431.0nF

C371.0nF

12

JP2

12 3

4

S10

C40OPEN

C36OPEN

+

C4110µF

+

C3810µF

TP33

R110499Ω

R113499Ω

R109301Ω

R112301Ω

123

4

S18

12 3

4S15

A B1

2

3J31

TP49

AB

1

2

3J3

0H

DR

-3W

AY

AB

1

2

3J2

7H

DR

-3W

AYRING

SLEEVE

TIPJ28

C781.0nF

C601.0nF

12

JP3

12 3

4

S16

C77OPEN

C56OPEN

+

C7410µF

+

C5710µF

R115499Ω

R117499Ω

R114301Ω

R116301Ω

123

4

S23

1

2 34

S20

A B1

2

3J41

TP56

AB

1

2

3J4

0H

DR

-3W

AY

AB

1

2

3J3

6H

DR

-3W

AY

RING

SLEEVE

TIPJ38

C891.0nF

C851.0nF

12

JP5

12 3

4

S21

C88OPEN

C84OPEN

+

C9010µF

+

C8610µF

R119499Ω

R121499Ω

R118301Ω

R120301Ω

123

4

S29

12 3

4S25

A B1

2

3J51

TP76

AB

1

2

3J4

9H

DR

-3W

AY

AB

1

2

3J4

6H

DR

-3W

AY

RING

SLEEVE

TIPJ47

C1031.0nF

C921.0nF

12

JP7

12 3

4

S26

C102OPEN

C91OPEN

+

C10010µF

+

C9310µF

12

J19

12

J29

12

J39

12

J48

2–

3+

1O

8V+

4V–

U1-A

R1610.0kΩ

R17 10.0kΩ

+C

1810

µF

R13

100k

Ω

C1910µF

RING

SLEEVE

TIP

J9

12

JP1

C16 22pF

R1210.0Ω

6–

5+ 7

O

U1-B

R710.0kΩ

R9 10.0kΩ

+C

510

µF

R8

100k

Ω

C1010µF

C6 22pF

R610.0Ω

R4

10.0kΩ

R3

10.0kΩ

R2

10.0kΩ

R1

10.0kΩ

CW 2

13

R5

1 23579

11

4681012

J2HEADER_12WAY_UNSHROUD

C1C2

54321S11

C1C2

54321S6

C1C2

54321S17

C1C2

54321S14

C1C2

54321S22

C1C2

54321S19

C1C2

54321S28

C1C2

54321S24

C120.10µF

C130.10µF

A B1

2

3J1TP4TP

16TP

5TP

52

TP32

TP26

TP58

TP51

TP39

TP60

TP59

TP53

TP64

TP77

TP70

TP75

R122

0Ω

R123

0Ω

R124 0Ω

R125 0Ω

R126

0Ω

R127

0Ω

R128

0Ω

R129

0Ω

AIN1N[1,6]

AIN1P[1,6]

VBAT [2,6][1,2,4]

MICBIAS_CH1 [2]

MICBIAS_1977MICBIAS_EXTMICBIAS_CH1

+OUT_BUFFER [2]

[2] –OUT_BUFFER

AIN_CH1–AIN_CH1+

FAULT_IN+

FAULT_IN–[2,6]

VBAT [2,6][1,2,4]

MICBIAS_CH1 [2]FAULT_IN+

FAULT_IN–[2,6]

VBAT [2,6][1,2,4]

MICBIAS_CH1 [2]FAULT_IN+

FAULT_IN–[2,6]

AIN2N[1,6]

AIN2P[1,6]


+OUT_BUFFER [2]

–OUT_BUFFER [2]

AIN_CH2–AIN_CH2+

AIN3N[1,6]

AIN3P[1,6]


+OUT_BUFFER [2]

–OUT_BUFFER [2]

AIN_CH3–AIN_CH3+

AIN4N[1,6]

AIN4P[1,6]


+OUT_BUFFER [2]

–OUT_BUFFER [2]

AIN_CH4–AIN_CH4+

[2]

[2]

HVDD

HVSS[2] CM_IN+

+OUT_BUFFER [2]

+IN_BUFFER

-IN_BUFFER

[2] CM_IN–

–OUT_BUFFER [2]MICBIAS

VBAT[1,2,4]

CM_IN+ [2]

CM_IN– [2]

2/3MICBIAS

1/3MICBIAS

1/2VBAT

HVSS

HVDD

MICBIAS_1977MICBIAS_EXT

NOTES ON JUMPER SELECTIONJ2: USE FOR SELECTING THE CM LEVEL FOR THE EXTERNAL INPUTJ1, J22, J31, J41, J51: USE FOR SELECTING INTERNAL OR EXTERNAL MICBIAS FOR INPUTSS12, S18, S23, S29: USE FOR SELECTING THE MICBIAS RESISTOR +INPUTSS5, S15, S20, S25: USE FOR SELECTING THE MICBIAS RESISTOR -INPUTSJ20, J15, J30, J27, J40, J36, J49, J46: USE FOR SELECTING THE DIRECT OR BUFFERED INPUTJ19, J29, J39, J48: USE FOR SHORTING THE +/- INPUT PINS FOR DIAGNOSTICS TESTS11, S6, S17, S14, S22, S19, S28, S24: USE FOR GENERATING FAULT ON INPUT PINS FOR DIAGNOSTICS TESTING 11

751-

007





I2S TO SPDIF

SPDIF COAX OUTPUT

SPDIF OPTICAL OUTPUT

INST

ALL

FO

R 9

6KH

z Fs

I2S OUTPUT

MASTER / SLAVE SELECT

SDATA1SDATA2

LRCLKBCLK

NC

RESET_SPDIF

NOTES ON JUMPER SELECTIONLK3, LK5: USE FOR ROUTING THE SDATA TO SPDIF OR I2S HEADERLK2: USE FOR ROUTING THE LRCLK TO SPDIF OR I2S HEADERLK2: USE FOR ROUTING THE BCLK TO SPDIF OR I2S HEADERLK2: USE FOR ROUTING THE MCLK TO SPDIFS13: USE FOR SELECTING THE I2S BUFFER AS MASTER OR SLAVE

I2S/TDM OUTPUT

14SDIN

12ILRCLK

13ISCLK

21OMCK

3EMPH

16CEN

1COPY/C

28ORIG

4SFMT0

9RST

6VD

23VL

26TXP

25TXN

24H/S

19AUDIO

10APMS

20HWCK0

11TCBLD

27HWCK1

22G

ND

5SFMT1 2

NC17

NC2

8NC3

17V

15TCBL

18U

U17CS8406_HARDWARE

C107 0.10

µF

C81 0.10

µF

R67 47.5kΩ

R66 47.5kΩ

R61 47.5kΩ

R7447.5kΩ

R76 47.5kΩ

R64 47.5kΩ

R73 47.5kΩ

R63 47.5kΩ

R75 47.5kΩ

R71 47.5kΩ

R60 47.5kΩ

R77 47.5kΩ

R59 47.5kΩ

R62 47.5kΩ

R72

47.5kΩ

BA

LK2

BA

LK1

BA

LK6

BA

LK5

B ALK4

BA

LK3

1

4

5

8

2

6

U19

SC937-02_AES_TRANSFORMER

1GND

2DVDD

3INPUT

U16

TOTX147L(FT)

R69 243Ω

R68 110Ω

R6510.0kΩ

L4

600Ω

@ 1

00M

Hz

C730.10µF

J35

CTP-021A-S-YEL

C7910nF

C8722pF

1

2

J34

128*

Fs

2 A

3 GN

D

1 VCC

A

5 VCC

YG

ND

VCC

A

VCC

YG

ND

VCC

A

VCC

YG

ND

VCC

A

VCC

Y

4YU15FXLP34P5X

2A

3

15

4Y

U14FXLP34P5X

2A

3

15

4Y

U9FXLP34P5X

2A

3

15

4Y

U18FXLP34P5X

12345678

J26

R51

49.9

ΩC

5810

pF

R37

49.9

ΩC

4410

pF

R54

49.9

ΩC

5410

pF

R70

49.9

ΩC

8210

pF

R42

1k00

C47

100p

F

R45

1k00

C52

100p

F

R3810.0kΩ

2 4U8

NC7SZ04M5

R55 49.9Ω

R48 49.9Ω

R43 24.9Ω

R40 24.9Ω

R52

1k00

R57

1k00

C59

100p

F

C64

100p

F

R44 24.9Ω

R39 24.9Ω

R49 24.9Ω

R46 24.9Ω

5 A2

4 OE2

6Y2

U11-B

9 A3

10 OE3

8Y3

U11-C

12 A4

13 OE4

11Y4

U11-D

2 A1

1 OE1

3Y1

U11-A

SN74LVC125ADR

2A

3

GND

1OE

5

VCCY

4Y

U13NC7SZ125

2A

3

GND

15

VCCY

4 Y

U10NC7SZ125

7G

ND

14 VCC

U11-ESN74LVC125ADR

C800.10µF

C72

0.10µF

C960.10µF

1 2S13

SPST_1SEC_SMD

R58 10.0kΩ

JP4

C63

0.10

µF

C99

0.10

µF

C17

0.10

µF

C48

0.10

µF

C24

0.10

µF

C69

0.10

µF

C26

0.10

µF

C75

0.10

µF

+3.3V +3.3V

+3.3V

[1] LRCLK_X

[1] SDATAOUT2/TDM_SEL_X

[1] MCLKIN_1977

+3.3V

[1] BCLK_X

[1] SDATAOUT1_X

LO

HI

+3.3V

+3.3V

IOVDD +3.3V

IOVDD

+3.3V

IOVDD

+3.3V

+3.3VIOVDD

SDATA1_OUT

SDATA2_OUT

BCLK_IO

LRCLK_IO

IOVDD

MASTER_SEL[3]

SLAVE_SEL[3]

IOVDD

IOVDD

SLAVE_SEL[3]

IOVDD

MASTER_SEL[3]

SDA

TA1_

OU

T

SDA

TA2_

OU

T

LRC

LK_I

O

BC

LK_I

O

1 175

1-00

8

OE





HV

INPU

T3.

3V R

EG S

ELEC

T

1.8V

REG

SEL

ECT

IOVD

D S

ELEC

T

+22V

DC

MA

X

GN

D

+5VD

C

+5V

INPU

T

–22V

DC

MA

X

TP13

TP15

TP21

BA

12

3

J13

TP18

TP17

C30

1.0µ

F

C31

1.0µ

F

+C

3210

µF+

C29

15µF

3EN

2G

ND

1IN

5O

UT

4B

YP U4

AD

P171

1AU

JZ-1

.8-R

7

C33

10nF

D3

Red

Diff

used R

2647

5R

TP2

BA1 2 3J10

HDR-3WAY

TP31

TP37

1SY

NC

/MO

DE

2FR

EQ

3TR

K

4FB

5GND

6PGND

7PGND

8PGND

9SW

10SW

11SW

12PV

IN

13 PVIN

14 VIN

15 EN

16 PGOOD

17 EPAD

U3

AD

P211

8

R10

10Ω

R11

10.0

kΩ

R18

10.0

kΩ

R142.21kΩ

12

L2

C28

100µ

F

C14

100µ

F

TP9

TP3

C4

0.10

µF+

C2

47µF

12J4

BIN

DIN

G_P

OST

_571

_BLK

D2

TP48

TP6

C11

0.10

µF+

C15

47µF

12J5

BIN

DIN

G_P

OST

_571

_RED

L110

0Ω @

100

MH

zTP

8

TP22

R23

243Ω

C35

0.10

µF

C22

0.10

µF

D1

DL4

001_

50V_

1A_D

L41

R24

2.67kΩ

C34

0.10

µFD

4

3IN

1

AD

J

4O

UT1

U2

LM31

7BD

2T

BA

12

3J1

2

TP20

TP1

C3

0.10

µF+

C1

47µF

R25 10k0

12S1

12

S2

SPST

_1SE

C_S

MD

TP19

12J7

BIN

DIN

G_P

OST

_571

_RED

BA

12

3J1

1

C9

OPE

N

12J3

BIN

DIN

G_P

OST

_571

_RED

BA

12

3J1

4

C7

NF

25V

TP7

12J6

BIN

DIN

G_P

OST

_571

_RED

C8

OPE

N

C10

91µ

F

C11

00.

10µF

B A 123J53

+3.3

V+3

.3V_

EXT

+5V

1.8V

1.8V

+3.3

VIO

VDD

_IN

T

+3.3

V_R

EG

+5V

HVD

D

+5V_

EXT

+15V

_REG

EXT_

VBA

T

VBA

T

HVS

S

IOVD

D_I

NT

IOVD

D

IOVD

D_E

XT

+3.3

VA

VDD

AVD

D_E

XTDVD

D_I

N

+5V

DVD

D_I

N

11751-009





USBi OR AARDVARK I2C INTERFACE

USBI_CLKUSBI_5V00

I2C LEVEL SHIFT & DUT ADDRESS

MR LINE COMES FROM USBi BOARD RESET

LEVEL SHIFT

I2C COMMUNICATION

SPI LEVEL SHIFT

I2C, SPI or STAND-ALONE MODE SELECT

I2C-SPI OR SA MODE SELECT

ADDR1

ADDR0

STAND ALONE MODE

ADDRESS

NOTES FOR JUMPERS AND SWITCHESS3, S4, S5 ARE 3 WAY SWITCHES TO BE USED IN TANDEM FOR I2C, SPI OR SA MODESET ALL THREE SWITCHES TO EITHER LEFT, CENTER OR RIGHTS8 IS USED FOR SETTING THE PIN FUNCTIONS IN SA MODEJ8: USE FOR CONNECTING THE AARDVARK I2C/SPI CONTROL ADAPTER OR USBI1

3579

2468

10

J8

R212.43kΩ

R222.43kΩ

R1510.0kΩ

TP11TP10

2SCLA 3SDAA7 SCLB6 SDAB

1VCCA8 VCCB

4GND5 ENU6

PCA9517DP-T_I2CBUSRPT_LVLTRANS_TSSOP8

C55C25

0.10µF

C510.10µFC27

0.10µF

2A13A2

7 B16 B2

1VC

CA

8VC

CB

4G

ND 5DIR

U5

SN74LVC2T45DCTR

C620.10µF

C830.10µF

12 3

4S9

R3410.0kΩ

R3310.0kΩ

R202k00

R192k00

3

1

2

4

S4-A

7

5

6

8S4-B

3

1

2

4

S5-A

7

5

6

8S5-B

3

1

2

4

S3-A

7

5

6

8S3-B

JP6

R7910.0kΩ

R32

10.0

kΩR

3110

.0kΩ

R30

10.0

kΩR

2910

.0kΩ

1234567

89

101112

S8 R28

10.0

kΩR

2710

.0kΩ

R36 1k00R35 1k00

2 A3

GN

D

1 VCC

A

5 VCC

Y

GN

DVC

CA

VCC

Y

4Y

U23FXLP34P5X

2 A3

15

4Y

U24FXLP34P5X

C1130.10µF

C1140.10µF

R13310.0kΩ

USBI_SCL [5,6]

USBI_CCLK [5]USBI_CLATCH [5]

USBI_CIN_MOSI [5]

+3.3V

ADDR1/CIN/MS_SEL [1]

ADDR0/CLATCH/FMT_SEL [1]

SDA/COUT/MCLK_SEL [1]

SCL/CCLK/FS_SEL [1]

+3.3V IOVDD

USBI_SCL[5,6]USBI_SDA[5,6]

IOVDD

+3.3V

USBI_CLATCH [5]

IOVDD+3.3V

USBI_CIN_MOSI [5]

USBI_CCLK [5]

USBI_COUT_MISO [5]

IOVDD

IOVDD

USBI_COUT_MISO [5]USBI_SDA [5,6]

SDATAOUT2/TDM_SEL [1]

FAULT/TBD_SEL [1]

SA_MODE SA_MODE [1]

IOVDD

FMT_SEL

MCLK_SEL

TDM_SEL

TBD_SEL

FS_SEL

MS_SEL

CIN_IOVDD

CLATCH_IOVDD

SCL_IOVDD

CCLK_IOVDD

SDA_IOVDD

COUT_IOVDD

+3.3VIOVDD

IOVDD+3.3V

0.10µF

1175

1-01

0





FAU

LT G

ENER

ATI

ON

LO

GIC

CO

NTR

OL1

FAU

LT G

ENER

ATI

ON

LO

GIC

CO

NTR

OL2

INPU

T C

H1

INPU

T C

H2

INPU

T C

H3

INPU

T C

H4

SHO

RT

AIN

2P T

O A

IN2N

FAU

LT_I

N–

TO A

IN2N

FAU

LT_I

N+

TO A

IN2P

FAU

LT_I

N–

TO A

IN1N

FAU

LT_I

N+

TO A

IN1P

SHO

RT

AIN

3P T

O A

IN3N

FAU

LT_I

N–

TO A

IN3N

FAU

LT_I

N+

TO A

IN3P

SHO

RT

AIN

4P T

O A

IN4N

FAU

LT_I

N–

TO A

IN4N

FAU

LT_I

N+

TO A

IN4P

SHO

RT

AIN

1P T

O A

IN1N

DIS

AB

LE F

AU

LT L

OG

IC

I2C

AD

DR

ESS

0x19

Hex

I2C

AD

DR

ESS

0x18

Hex

FAU

LT G

ENER

ATI

ON

FO

R A

UTO

MA

TED

TES

TIN

G

1SC

L2

SDA

3A

D0

4A

D1

5A

D2

6IO

07

IO1

8G

ND

9IO

210

IO3

11IO

412

IO5

13IO

614

IO7

15R

ESET

16VD

D

U22

MA

X731

0-Q

SOP1

6

R10010.0kΩR96OPENR10410.0kΩR103OPENR10110.0kΩR97OPEN

C23

0.10

µF

1SC

L2

SDA

3A

D0

4A

D1

5A

D2

6IO

07

IO1

8G

ND

9IO

210

IO3

11IO

412

IO5

13IO

614

IO7

15R

ESET

16VD

D

U21

MA

X731

0-Q

SOP1

6

R93OPENR9410.0KΩR9810.0kΩR102OPENR9510.0kΩR99OPEN

C760.10µF

+582

4K

1

+582

4K

6

+582

4K

5

1

IN

2 GND

3 OUT

Q1

1

IN

2 GND

3 OUT

Q6

1

IN

2 GND

3 OUT

Q5

K A

D9

K A

D10

K A

D5

+582

4K

2

+582

4K

8

+582

4K

7

1IN

2 GND

3 OUT

Q2

1IN

2 GND

3 OUT

Q8

1IN

2 GND

3 OUT

Q7

K A

D11

K A

D12

K A

D6

+582

4K

3

+582

4K

10

+582

4K

9

1IN

2 GND

3 OUT

Q3

1IN

2 GND

3 OUT

Q10

1IN

2 GND

3 OUT

Q9

K A

D13

K A

D14

K A

D7

+582

4K

4

+582

4K

12

+582

4K

11

1IN

2 GND

3 OUT

Q4

1IN

2 GND

3 OUT

Q12

1IN

2 GND

3 OUT

Q11

K A

D15

K A

D16

K A

D8

TP12

TP14

C20

0.10

µF

C21

0.10

µF

R88

10.0

kΩ

JP10

+3.3

V

USB

I_SC

L [5

,6]

USB

I_SD

A [5

,6]

+3.3

V

FAU

LT_A

IN4P

[6]

FAU

LT_A

IN2P

[6]

FAU

LT_A

IN1P

[6]

FAU

LT_A

IN3P

[6]

FAU

LT_A

IN4N

[6]

FAU

LT_A

IN2N

[6]

FAU

LT_A

IN1N

[6]

FAU

LT_A

IN3N

[6]

+3.3

V

USB

I_SC

L [1

,2]

USB

I_SD

A [1

,2]

+3.3

V

FAU

LT_A

IN3P

_AIN

3N [6

]

FAU

LT_A

IN1P

_AIN

1N [6

]

FAU

LT_A

IN4P

_AIN

4N [6

]FA

ULT

_AIN

2P_A

IN2N

[6]

FAU

LT_A

IN1P

[6]

FAU

LT_A

IN1N

[6]

FAU

LT_A

IN1P

_AIN

1N [6

]

AIN

1P [1

,2]

AIN

1N [1

,2]

+3.3

V+3

.3V

+3.3

VFA

ULT

_IN

–[2

,6]

[2,6

]FA

ULT

_IN

+

FAU

LT_A

IN2P

[6]

FAU

LT_A

IN2N

[6]

FAU

LT_A

IN2P

_AIN

2N [6

]

AIN

2P [1

,2]

AIN

2N [1

,2]

+3.3

V+3

.3V

+3.3

VFA

ULT

_IN

–[2

,6]

FAU

LT_I

N+

[2,6

]

FAU

LT_A

IN3P

[6]

FAU

LT_A

IN3N

[6]

FAU

LT_A

IN3P

_AIN

3N [6

]

AIN

3P[1

,2]

AIN

3N[1

,2]

+3.3

V+3

.3V

+3.3

VFA

ULT

_IN

–[2

,6]

FAU

LT_I

N+

[2,6

]

FAU

LT_A

IN4P

[6]

FAU

LT_A

IN4N

[6]

FAU

LT_A

IN4P

_AIN

4N [6

]

AIN

4P[1

,2]

AIN

4N[1

,2]

+3.3

V+3

.3V

+3.3

VFA

ULT

_IN

–[2

,6]

FAU

LT_I

N+

[2,6

]

FAU

LT_I

N+

[2,6

]

FAU

LT_I

N–

[2,6

]

+3.3

V

DIS

AB

LE_F

AU

LT_L

OG

IC

11751-011




BOARD LAYOUT

Figure 12. EVAL-ADAU1977Z/EVAL-ADAU1978Z/EVAL-ADAU1979Z Top Assembly

1175

1-01

2






Figure 13. EVAL-ADAU1977Z Top Layer

1175

1-01

3




Figure 14. EVAL-ADAU1977Z Layer 2

1175

1-01

4




Figure 15. EVAL-ADAU1977Z Layer 3

1175

1-01

5




Figure 16. EVAL-ADAU1977Z Bottom Layer

1175

1-01

6




Figure 17. EVAL-ADAU1977Z/EVAL-ADAU1978Z/EVAL-ADAU1979Z Top Silkscreen

1175

1-01

7






Figure 18. EVAL-ADAU1977Z Fabrication Drawing

1175

1-01

8




ORDERING INFORMATION BILL OF MATERIALS

Table 3. Qty1 Component Number Description Manufacturer Part Number 2 C10, C19 Ceramic capacitor, 10 µF,

50 V, X7R, 20%, 2220 Digi-Key 445-1454-1-ND

NF C107, C108 Multilayer ceramic, 16 V, X7R (0402)

Digi-Key PCC13490CT-ND

1 C109 Multilayer ceramic capacitors (MLCC), 50 V, X7R (1206)

Digi-Key 490-4795-6-ND

34 C11, C17, C23 to C27, C42, C46, C48, C51, C53, C55, C61 to C63, C65 to C69, C72, C75, C76, C80, C81, C83, C96, C99, C101, C106, C110, C113, C114

Ceramic capacitor, 0.1 µF, 16 V, 10%, X7R, 0402


NF C111, C112 Ceramic capacitor, 1000 pF, 50 V, 10%, X7R, 0603


3 C1, C2, C15 Aluminium electrolytic capacitor frequency converter (FC), 105°, surface-mount device E (SMD_E)

Digi-Key PCE4008CT-ND

2 C14, C28 Multilayer ceramic, 6.3 V, X5R (1210 )



Digi-Key PCC2398CT-ND

1 C29 Surface-mount device (SMD), tantalum capacitor, 0805, 6.3 V


2 C30, C31 Ceramic capacitor, 1 µF, 16 V, 10%, X7R, 0603


1 C32 SMD, tantalum capacitor, 0805, 6.3 V


2 C33, C79 Multilayer ceramic, 25 V, NP0 (0603)


8 C3, C4, C12, C13, C22, C34, C35, C73

Ceramic capacitor, 0.1 µF, 50 V, 10%, X7R, 0603


NF C36, C40, C56, C77, C84, C88, C91, C102

Multilayer varistor, 65 V, 0603 Digi-Key P14254CT-ND

9 C37, C43, C49, C60, C78, C85, C89, C92, C103

Ceramic capacitor, 1000 pF, 50 V, 10%, X7R, 0603


8 C38, C41, C57, C74, C86, C90, C93, C100

Aluminium electrolytic capacitor frequency converter (FC,) 105°, surface-mount device B (SMD_B)


1 C39, C50 Multilayer ceramic, 25 V, X7R (1210), AECQ200


6 C44, C54, C58, C82, C104, C105 Multilayer ceramic, 50 V, NP0 (0402)


NF C45 Aluminium electrolytic capacitor frequency converter (FC), 10 µF, 50 V, 105°, radial


4 C47, C52, C59, C64 Multilayer ceramic, 50 V, NP0 (0402)


2 C5, C18 Aluminium electrolytic capacitor frequency converter (FC), 10 µF, 50 V, 105°, radial




Qty1 Component Number Description Manufacturer Part Number 3 C6, C16, C87 Multilayer ceramic, 50 V, NP0

(0402) Digi-Key 490-1283-1-ND

NF C7 Multilayer ceramic, 25 V, X7R (1210), AECQ200


2 C70, C71 Multilayer ceramic, 10 V, X7R (0805)




1 C94 Multilayer ceramic, 25 V, NP0 (0402)

Mouser 77-VJ0402Y222JXXCBC







2 D1, D4 Passivated rectifier 1 A, 50 V, metal oxide leadless face (MELF)

Digi-Key DL4001-TPMSCT-ND

1 D2 Transient voltage suppressor (TVS) Zener, 15 V, 600 W, surface-mount board (SMB)

Digi-Key 1SMB15AT3GOSCT-ND

1 D3 Red diffused, 6.0 millicandela, 635 nm, 1206


NF D5, D16 Passivated rectifier 1 A, 50 V, metal oxide leadless face (MELF)

Digi-Key DL4001-TPMSCT-ND

20 J1, J10 to J15, J20, J22, J27, J30, J31, J36, J40, J41, J43, J4, J6, J49, J51, J53

3-position, single inline package (SIP) header

Digi-Key S1011E-03-ND

13 J16, J19, J21, J24, J29, J33, J34, J39, J42, J44, J45, J48, J54

2-pin header, unshrouded jumper 0.10"; use shunt Tyco 881545-2


NF J18, J23, J32, J37 20-way, unshrouded Digi-Key S2011E-10-ND 1 J2 12-way, unshrouded Digi-Key S2011E-06-ND 1 J25 16-way, unshrouded Digi-Key S2011E-08-ND 1 J26 8-way, unshrouded header,

dual row Digi-Key S2011E-04-ND; or cut S2011E-36-ND

NF J3, J6, J7 Binding post, mini, right angle, red, uninsulated base, through hole (TH)

Mouser 164-6220

1 J35 RCA jack, PCB through hole (TH) mount, right angle, yellow

Connect-Tech Products CTP-021A-S-YEL

1 J4 Binding post, mini, right angle, black, uninsulated base through hole (TH)

Mouser 164-6218

1 J5 Binding post, mini, right angle, red, uninsulated base, through hole (TH)

Mouser 164-6219

1 J50 6-way, unshrouded header Digi-Key S2011E-03-ND 1 J52 SMA, receptacle straight,

(PCB) mount Digi-Key ARFX1231-ND

1 J8 10-way, shroud, polarized header

Digi-Key MHC10K-ND

5 J9, J17, J28, J38, J47 Stereo mini jack, surface-mounted (SMT)

Digi-Key CP-3523SJCT-ND

NF JP10 2-pin header, unshrouded Digi-Key S1011E-02-ND Rev. 0 | Page 24 of 27


Qty1 Component Number Description Manufacturer Part Number jumper, 0.10"; use shunt Tyco 881545-2

10 JP1 to J9, JP11 2-pin header, unshrouded jumper, 0.10"; use shunt Tyco 881545-2


NF K1 to K12 Relay Telecom, single-pole single throw (SPST),1 A, 3 V dc SMA

Digi-Key. Z1230-ND

1 L1 Chip ferrite bead, 100 Ω at 100 MHz


1 L2 Inductor, 2.2 µH, 1.7 A, SM1515


1 L3 Inductor, 4.7 µH, 2.4 A, surface-mount device






6 LK1 to LK6 3-position, single inline package (SIP) header


NF Q1 to Q12 Negative-positive-negative (NPN), general-purpose, transistor with bias DDTC114EKA-7-F

Digi-Key DDTC114EKA-7-FDICT-ND

8 R105, R107, R109, R112, R114, R116, R118, R120

Chip resistor, 1%, 125 mW, thick film, 0805

Digi-Key P301CCT-ND

8 R106, R108, R110, R113, R115, R117, R119, R121


Digi-Key P499CCT-ND

3 R11, R18, R25 Chip resistor, 0.1%, 100 mW, thin film, 0603

Digi-Key TNP10.0KAACT-ND

NF R111 Chip resistor, 0.1%, 1 W, thick film, 0805

Digi-Key Y1487-.01-ND

NF R131 to R132 Chip resistor, 1%, 250 mW, thick film, 1206

Digi-Key P10.0FCT-ND

1 R14 Chip resistor, 0.1%, 100 mW thin film, 0603

Digi-Key TNP2.21KAACT-ND

24 R1 to R4, R7, R9, R15 to R17, R27 to R34, R58, R79, R82, R84, R92, R133, R134

Chip resistor ,1%, 63 mW, thick film, 0402

Digi-Key P10.0KLCT-ND

2 R19, R20 Chip resistor,1%, 63 mW, thick film, 0402


2 R21, R22 Chip resistor ,1%, 63 mW, thick film, 0402


1 R23 Chip resistor, 1%, 125 mW, thick film, 0805

Digi-Key P243CCT-ND


Digi-Key P2.67KCCT-ND


Digi-Key P475LCT-ND

7 R35, R36, R42, R45, R52, R57, R81



14 R37, R47, R48, R50, R51, R53 to R56, R70, R78, R85 to R87

Chip resistor,1%, 63 mW, thick film, 0402

Digi-Key P49.9LCT-ND

2 R38, R65 Chip resistor, 1%, 125 mW, thick film, 0603

Digi-Key P10.0KHCT-ND

6 R39, R40, R43, R44, R46, R49 Chip resistor, 1%, 63 mW, thick film, 0402

Digi-Key P24.9LCT-ND

NF R41 Chip resistor, 5%, 125 mW, thick film, 0805

Digi-Key P1.0ACT-ND




Qty1 Component Number Description Manufacturer Part Number 1 R5 Trim potentiometer, 10 k Ω

linear, 3 mm, single turn, surface-mount device (SMD) top adjust


15 R59 to R64, R66, R67, R71 to R77 Chip resistor,1%, 63 mW, thick film, 0402


3 R6, R10, R12 Chip resistor, 1%, 125 mW, thick film, 0805

Digi-Key P10.0CCT-ND


Digi-Key P110CCT-ND


Digi-Key P243HCT-ND

2 R8, R13 Chip resistor, 1%, 125 mW, thick film, 0603

Digi-Key P100KHCT-ND



11 R83, R90, R122 to R130 Chip resistor, 5%, 63 mW, thick film, 0402

Digi-Key P0.0JCT-ND

NF R88, R93, R95, R98, R100, R101, R104


Digi-Key RHM10.0KLCT-ND

NF R89, R91 Chip resistor, 1%, 100 mW, thick film, 0603

Digi-Key P100HCT-ND

NF R94, R96, R97, R99, R102, R103 Do not stuff OPEN OPEN 3 S1 to S2, S13 1 section, single-pole single

throw, (SPST), surface-mount device (SMD)


1 S27 Tact switch, 6 mm gull wing Digi-Key 450-1133-ND 3 S3 to S5 Switch glide, DP3T PC, mount

L = 4 mm Digi-Key EG1920-ND

NF S6, S11, S14, S17, S19, S22, S24, S28

Switch rotary, 1P5T, top adjust through hole

Digi-Key 563-1078-ND

13 S7, S9, S10, S12, S15, S16, S18, S20 to S21, S23, S25, S26, S29

2 section, single-pole single throw, surface-mount device, switch raised act

Digi-Key CT2192LPST-ND

1 S8 6 section, single-pole single throw, surface-mount device, switch raised act

Digi-Key CT2196LPST-ND

75 TP1 to TP11, TP15 to TP77 Mini test point, white, 1" outer diameter

Digi-Key 5002K-ND

NF TP12 to TP14 Mini test point, white, 1" outer diameter

Digi-Key 5002K-ND

1 U1 Dual bipolar/junction, field effect transistor (JFET), audio operational amplifier.

Analog Devices Inc. OP275GSZ

2 U10, U13 IC, buffer tristate, noninverting, SC70-5

Digi-Key NC7SZ125P5XCT-ND

1 U11 Quad buffer, tristate, 14-lead SOIC


1 U12 IC, 4-channel ADC with diagnostics, ADAU1977 40-lead LFCSP

Analog Devices, Inc. ADAU1977WBCPZ

1 U16 Fiber optic transmit module, 15 Mbs with shutter

Digi-Key TOTX147L-ND

1 U17 192 kHz, Sony Philips digital interface format (SPDIF) transmitter

Newark In One 88H6508

1 U19 110 Ω audio, Engineering Society/European Broadcaster Union (AES/EBU)

Scientific Conversion Inc. SC937-02

http://www.analog.com/ADAU1977?doc=EVAL-ADAU1977_1978_1979_UG-600.pdf

http://www.analog.com/ADAU1977?doc=EVAL-ADAU1977_1978_1979_UG-600.pdf



Qty1 Component Number Description Manufacturer Part Number transformer

1 U2 Integrated circuit, positive voltage regulator LM317, adjust, D2PAK

Digi-Key LM317BD2TR4GOSCT-ND

NF U21, U22 Integrated circuit, I2C, 8-bit, input/output expander

Digi-Key MAX7310AEE+-ND

1 U3 Step down, dc to dc, voltage regulator, ADP2118

Digi-Key ADP2118ACPZ-R7CT-ND

1 U4 Adjustable, low dropout, voltage regulator

Analog Devices ADP1711AUJZ-1.8-R7

2 U5, U20 Integrated circuit, 2-bit, dual bus TXRX, 8-lead shrink small outline package (SSOP)

Digi-Key 296-16845-1-ND

1 U6 Integrated circuit, I2C bus repeater, 8-lead thin shrink small outline package (TSSOP)


1 U8 Integrated circuit, tiny logic inverter, NC7SZ04

Digi-Key NC7SZ04M5CT-ND

6 U9, U14, U15, U18, U23, U24 Translator, 1-bit, unidirect, SC70-5

Digi-Key FXLP34P5XCT-ND

1 Y1 12.288 fixed, surface-mount device (SMD) oscillator, 1.8 V to 3.3 V voltage direct current (VDC)

Digi-Key AP3S-12.288MHz-F-J-B

1 NF: not fitted or do not populate; ALT: alternate or equivalent.

ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.

Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.

©2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG11751-0-8/14(0)

http://www.analog.com/ADP2118?doc=EVAL-ADAU1977_1978_1979_UG-600.pdf

http://www.analog.com/ADP1711?doc=EVAL-ADAU1977_1978_1979_UG-600.pdf

http://www.analog.com

Documents

Evaluation Board User Guide - analog.com · Evaluation Board User Guide UG-600 EVALUATION BOARD HARDWARE The EVAL-ADAU1977Z. board is common for the ADAU1977, ADAU1978, and ADAU1979