EX4: Designing a traffic light controller

EX 4 DIGITAL CIRCUITS AND SYSTEMS

Designing a traffic light controller

1.1 Cooperative groupTEAM NUMBER: ___________

DUE DATE: ________________ 1st review due date: ________________

STUDY TIME:

Study time

(in hours)

Group work Classroom and laboratory sessions

Sessions out of classroom

Individual Student 1

Student 2

Student 3

STATEMENT:

My signature below indicates that I have (1) made equitable contribution to EX 4 as a member of the group, (2) read and fully agree with the contents (i.e., results, conclusions, analyses, simulations) of this document, and (3) acknowledged by name anyone outside this group who assisted this learning team or any individual member in the completion of this document.

Today’s date: __________________

Active members Roles: (reporter, simulator, etc.)

(1) ________________________________________ _______________

(2) _________________________________________ _______________

(3) _________________________________________ _______________

Acknowledgement of individual(s) who assisted this group in completing this document:

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EPSC – CSD:Digital Circuits and Systems

(1) _______________________

(2) _______________________

1.2 Abstract Explain here the most significant developments, results or conclusions about the exercise. Use the remaining space in this sheet (200 words maximum).

(This section is mandatory. You must complete it in order to get a mark.)

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EX4: Designing a traffic light controller

CONTENT

Designing a traffic light controller...................................................................................................................1

1.1 Cooperative group.....................................................................................................................................1

1.2 Abstract.....................................................................................................................................................1

1.3 Description................................................................................................................................................3

1.4 Topics........................................................................................................................................................3

1.5 Specifications............................................................................................................................................4

1.6 Block diagrams..........................................................................................................................................5

1.7 Project implementation.............................................................................................................................5

1.7.1 Phase I: Implement a simple light sequencer...................................................................................5

1.7.2 Phase II: Add sensors and pushbuttons............................................................................................5

1.7.3 Phase III: Design timers and the real time clock..............................................................................5

1.7.4 Design auxiliary circuits...................................................................................................................5

1.8 Writing VHDL test benches......................................................................................................................6

1.8.1 Testbench for a simple entity.............................................................................................................6

1.8.2 Testbench for the traffic light controller...........................................................................................6

1.9 A list of projects of similar complexity.....................................................................................................6

1.10 Problem solution (títol 2)..........................................................................................................................7

1.10.1 Part 1 (títol 3)....................................................................................................................................7

1.11 References.................................................................................................................................................8

1.12 Study plan to solve the exercise................................................................................................................9

1.13 Topics and activities checklist................................................................................................................10

1.14 Grading grid............................................................................................................................................10

1.15 Questions in solving EX2........................................................................................................................10

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Specify a project: the traffic light controller

Part I: A basic controller

Simulations using test benches

Test bench entity

ModelSim / Active-HDL

projects

Device under test (DUT)

Input vectors Waveforms

Part II: Include sensors and pushbuttons

Part III: Include timers (internal signals and

data operators)

FSM (Chapter II)

Chapter III: a dedicated processor

Part IV: Other additional modules

Datapath FSM

(ASSERT and REPORT statements)

EPSC – CSD:Digital Circuits and Systems

1.3 DescriptionIn this fourth exercise, a project is to be proposed. Cooperative groups will have to plan, develop, simulate, implement and prototype a traffic light controller (or you may ask for other similar applications like the ones listed in Section 1.6). The problem can be considered a complex design which includes multiple blocks and components. However, in order to standardise the design methodology, it has to be conceived as a dedicated processor consisting of a datapath (arithmetic logic unit plus data registers) and a control unit (FSM). In this way, this project becomes a compilation of many previously designed components and structures.

Additionally, the meaningful concept of simulating a VHDL testbench is presented. This is an interesting and powerful alternative to TCL macro or Proteus EasyHDL scripting which were used in previous exercises for both functional and gate-level designs. Several references have been supplied on this topic [1], [2], [3], [4].

In Chapter 4, similar projects to these dedicated processors, which already become complex digital systems, will be implemented using microcontrollers instead of FPGA or CPLD. Thus, we will be able to compare both design alternatives figuring out their advantages and drawbacks of each approach.

Fig. 1 Some topics covered by this exercise

1.4 Topics The following topics have been listed from the course’s specific and cross-curricular learning objectives 1: #10, #11, #12. After studying Chapter 3 and successfully completing all the assignments in this task, you will be able to:

------------- Part 1 -------------

1 http://digsys.upc.es/ed//CSD/units/CSD_Guia_docent_esborrany.doc

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EX4: Designing a traffic light controller

1. Explain the concept of a datapath consisting of an ALU, or other elements which generate or process information and data, and registers or memory for the operands and results.

2. Explain the concept of “flags” or operation indicators and list the most common flags.

3. Explain the concept of control unit based in the application of a FSM, the processor’s brain, the block that will generate control signals for the datapath block in order to execute an algorithm or a sequence of operations.

4. Analyse the complexity and feasible implementation of every project specification.

5. Develop a complex project following the strategy of starting a simple machine and complicating it step by step until all the project specifications are met.

6. Design digital programmable timers

7. Plan auxiliary analogue circuits for the project, for example, the proximity sensors (metal detectors)

------------- Part 2 -------------

8. Use a VHDL test bench entity to automate the simulation process.

9. Automate a test bench simulation process by means of the ASSERT and REPORT statements.

------------- Part 3 -------------

10. Do an oral presentation consisting of a few slides to explain the project conception, development, implementation and results.

1.5 Specifications a) Study examples from our web ([6], [7]) and gather information about traffic light controllers. Revise the list

of specifications proposed below, or even add new ones if you like. Classify them accordingly the difficulty of implementation or the number of resources involved.

The controller is used to cycle the traffic lights at the intersection through the prescribed colour sequence green (G) – yellow (Y) – red (R).

Yellow lights also generate a dual-tone sound for visually impaired

Circulation in Road B be must be stopped 45 s in red (this is also Green A time)

Circulation in Avenue A must be stopped 33 s in red (this is also Green B time)

Yellow light will last for 5 s in both streets

Stop times, specified in seconds can be programmed using switches for the 8 bit binary codes.

A night mode of operation will turn off red and green lights while keeping yellows flashing with at 2 Hz rate.

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EPSC – CSD:Digital Circuits and Systems

Night mode is set from a real time clock signal which is active every day from 11 PM to 7 AM

Road and avenue have traffic-signal sensors embedded in the pavement at the intersection, which are activated by a certain level of metal mass (cars, motorcycles, etc.). These sensors allow the system to stop the normal traffic light sequencing and block permanently (red light) the road with no cars detected (fixed-red mode).

There are pushbuttons at every road to allow pedestrians cross streets in case of they are in fixed-red mode. Additionally, when pedestrians are present a cross walk light can be turned on and the duration of the green light increased by an extra 5 s.

1.6 A list of projects of similar complexityIf you like, you can propose us other applications of similar complexity like the ones listed below:

- A speed and distance meter for a bike.

- A 16-bit binary sequential multiplier (add-and-shift algorithm).

- A tachometer or speed meter for a motor.

- A serial transmitter/receiver (an UART peripheral).

- A programmable timer/counter. For example, the Timer0 from the Microchip PIC microcontroller.

- A PWM generator.

- Real time clock or chronometer.

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EX4: Designing a traffic light controller

AG AY AR

BR

BY

BG

PA

Street B

CONTROLLER

SYSTEM

Avenue A

AGAYAR

BRBYBG

CACB

PA

CACB

PA

CA PA

CB

N

NIGHT

CA

CB

PBPB

PBPB

Fig. 2 A sketch of the traffic lights at the cross road (note that this is not the complete electrical schematic).

1.7 Block diagrams b) Invent a block diagram for the traffic lights controller which consists of dedicated processor architecture.

See Fig. 3. Determine which components will be in the datapath.

Fig. 3 An advanced or complex digital system or a dedicated processor consisting of the combination of a datapath and a control unit (FSM).

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EPSC – CSD:Digital Circuits and Systems

1.8 Project implementation Essentially, functional simulations are required to verify the project, but you can also prototype the project using the laboratory training boards.

1.8.1 Phase I: Implement a simple light sequencer

c) Consider only a few set of specifications and implement a simpler project without sensors or pushbuttons for cars and pedestrians. This is simply a FSM to drive the traffic lights considering only the night mode (N switch). The frequency divider from the EX3 can be used or redesigned to suit this application. Run this design from a 1 Hz CLK to speed simulations.

1.8.2 Phase II: Add sensors and pushbuttons and a fixed timer

d) Enhance the initial project complicating the state diagram if necessary, adding more states, or adding new transition between states, as a consequence of interfacing the car sensors (CA and CB) and pedestrian pushbuttons (PA and PB).

e) Drive the system with a 200 Hz CLK. Design a digital timer to produce a 5 s signal to control all the light sequencing. Note that adding these ideas means envisioning the system as a dedicated processor which is in charge of the lights and other auxiliary subsystems like the timers. Your project will have to be able to count “real time” in seconds.

1.8.3 Phase III: Design timers and the real time clock

f) Design the programmable timer to set all the particular red and yellow lights times which is going to be commanded by the FSM of the traffic light controller. And, for example, the 7-segment digits in the prototyping board can be used to show the real-time timing in seconds.

g) (optional) Design the real time clock, an HH:MM:SS module, which activates the night mode signal.

1.8.4 Design auxiliary circuits

h) Design the analogue section so that metal proximity sensors can be conditioned to obtain the information on traffic rate at every street.

1.9 Writing VHDL test benches 1.9.1 Test bench for a simple entity

i) Study the test bench entity and implement a simulation of a small component from the project. For example, test the FSM from Section c). Compare and discuss the simulation procedures and the solution with the ones obtained using TCL macros. Simulate both: (1) the hierarchical VHDL project (functional); and (2) the synthesised circuit (gate-level) for a given CPLD or FPGA like the FLEX10K in the UP2 board. Determine the worse case tpd and tco and the maximum frequency which can be applied at the CLK input.

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EX4: Designing a traffic light controller

j) Improve the simulation automating it by means of the ASSERT and REPORT statements

1.9.2 Test bench for the traffic light controller

k) (optional) Generate the test bench entity to simulate the whole project.

1.10 Project oral presentation l) Draw a simple 10 minutes long Power Point presentation consisting of a few slides. The idea is to explain

orally in group the project (plan, development and results) and the main concepts from this EX4.

Do not modify the text from page 3 to page 6

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EPSC – CSD:Digital Circuits and Systems

1.11 Problem solution (títol 2)1.11.1 Part 1 (títol 3)

Part 1.1 (títol 4)

És necessari que seguiu aquestes indicacions per qualsevol dels vostres documents en aquesta assignatura. Aprendre-les forma part de la competència de comunicació escrita. Adapteu els vostres documents al format subministrat per aquesta plantilla.

Si alguna indicació o format no l’acabeu d’entendre bé, pregunteu-nos-ho o aclariu els dubtes, però no lliureu mai res que no compleixi aquestes indicacions perquè no us ho corregirem i perdreu el temps.

Afegiu aquí el vostre text (estil normal) encapçalat amb títols (Títol 2 i 3 i 4), amb figures (estil “llegenda” o “epígrafe” o “caption” segons l’ idioma del Word) i referències creuades en el text com aquesta Fig. 4 (és una referència creuada a la llegenda, veureu que surt en color gris quan la cliqueu) a les figures que inseriu. Fixeu-vos que la primera vegada que obrireu aquest document en Word 2007, no us sortirà aquesta llegenda “Fig.”, així que haureu de crear-ne una, i després, encara que la esborreu,ja us quedarà la referència. Veureu també que la numeració de les figures és un paràmetre automàtic. Si seleccioneu tot el document, i premeu “F9” actualitzareu tota la numeració.

També l’índex de la pag. 2 és completament automàtic. Es genera sol ( a partir de referències, índex de continguts, Inseriu un índex de continguts) i s’actualitza sol a partir també de “F9” havent seleccionat tot el text de document. És possible que la primera vegada que l’actualitzeu desaparegui. No passa res, simplement cal tornar-lo a generar a partir del menú referències i taula de contingut.

Fixeu-vos en la Fig. 4. Les imatges han d’estar centrades i alineades amb el text. Si voleu posar un parell d’imatges a la mateixa línia, inseriu primer una taula d’un parell de columnes i tot seguit feu invisibles les vores. El millor que podeu fer és “cut & paste” de la pròpia taula que veieu, i, canviar les figures per les vostres.

Feu referència també en el text a les fonts bibliogràfiques o de web que consulteu d’aquesta manera [1] (és una referència creuada a l’element numerat [1]). Expliqueu perquè les heu consultat i quina informació útil heu trobat.

Per corregir la primera versió del vostre treball, no imprimiu ni lliureu des de les pàgines 3 a la 5. És l’enunciat del problema. Sols cal que imprimiu les 2 primeres pàgines que contenen els detalls personals, el resum i l’índex, i a partir d’aquesta mateixa pàgina 6. Però feu-ho amb la numeració correcta. És a dir, treballeu sempre sobre aquest document, i en tot cas, importeu altres textos que tingueu cap a aquest mateix document i formateu-los correctament.

Insistim sobre això mateix: treballeu sempre sobre aquest mateix fitxer per preparar la vostra solució. Així usareu tots els estils i formats que ja té predefinits aquest document.

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EX4: Designing a traffic light controller

Fig. 4 Exemple de peu de figura que segueix la numeració de l’enunciat (llegenda).

Heu d’instal·lar els correctors ortogràfics en català, espanyol i anglès en el vostre paquet d’eines Office. I sobretot, corregir qualsevol error mentre escriviu. Si treballeu aquests aspectes estalviareu molta feina als vostres companys i instructors.

1.12 References

[1] http://digsys.upc.es . Course wed page where to find a lot of resources for the course. Specially, materials from previous editions. Find units on the topic of writing test benches in VHDL (Unit 3.4). [Retrieved 27/10/2010].

[2] Doulos, Test benches, Part I and II, http://www.doulos.com/knowhow/vhdl_designers_guide/test_benches_part_1/ . The basic ideas. [Retrieved 27/10/2010]

[3] Pitkänen, T., “VHDL Test bench”, Tampere University of Technology, http://www.tkt.cs.tut.fi/kurssit/1216/K06/Luennot/lecture5.pdf . A detailed explanation of many details on test benches. [Retrieved 27/10/2010]

[4] Zhang, W., “VHDL Tutorial: Learn by Example”, http://esd.cs.ucr.edu/labs/tutorial/ . A list of test benches for many circuit components. [Retrieved 27/10/2010]

[5] Hwang, E. O., “Digital logic and microprocessor design with VHDL”, CL-Engineering, 2005. Chapter 11: Dedicated processors. [Retrieved 27/10/2010]

[6] http://digsys.upc.es/sed//ED/problemes/problemes_PA/Problemes_PA.htm#ex2_7 . ED Web. Problem 2.7. Example of a traffic light controller. [Retrieved 27/10/2010]

[7] http://digsys.upc.es/sed//ED/grups_classe/07-08-q2/1BM2/07-08-Q2-1BM2.htm#EX6 .Another example of a traffic light controller from the ED Web. From this example, we’ve copied the picture in Fig. 2. [Retrieved 27/10/2010]

[8] (Add your own references and modify the previous ones if necessary)

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EPSC – CSD:Digital Circuits and Systems

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EX4: Designing a traffic light controller

1.13 Study plan to solve the exercise

Establish a study plan, a task distribution scheme and other requirements to succeed in producing a good solution when working cooperatively: flux diagrams, concept maps, schematics, tables, pictures, etc.

(This section is mandatory. It must be filled in order to get a mark.)

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EPSC – CSD:Digital Circuits and Systems

1.14 Topics and activities checklist

Topics Activities

Group member in

charge Comments

1 2 3

1. The concept of a datapath b)

2. The concept of “flags” or operation indicators. b)

3. The concept of a control unit b)

4. Planning the achievement of a complex project as a sequence of phases which includes every time more specifications.

a), c)

5. Analyse the complexity and feasible implementation of every project specification

a)

6. Design digital programmable timers d), e), f), <g)>

7. Plan auxiliary analogue circuits for the project h)

8. Use the VHDL test bench entity to simulate designs i)

9. Use VHDL statements ASSESS and REPORT j), <k)>

10. Do an oral presentation of the project l)

11.

1.15 Grading grid Here you are the way the exercise could be graded.

Part 1

Concepts, plan and design of the first project phase

Part 1

Additional project phases

Part 2

Testbench for a single component

Part 3

Oral presentation

Total

a), b), c) d), e), f), <g)>, h), i) , j), <k)> l)

Scores 2p 3p 3p 2p

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EX4: Designing a traffic light controller

Self-assessment

Instructor’s grades

1.16 Questions in solving EX22

Write here your questions, comments, doubts, opinions, etc. ...

2 Add more sheets if necessary to report your progress or comments though the exercise.

Aquests fulls de dubtes i d’explicació de com heu anat fent l’exercici són obligatoris. Si no és present, no es corregeix l’exercici i s’ha de tornar a lliurar. Abans de corregir i posar-vos qualificacions volem saber quin ha estat procés en què heu dissenyat els circuits i comparar-lo amb les nostres pròpies observacions de classe.

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