F04_GenInfo

F5259_F04

SpectralWave V-Node

STM-16/ STM-4/ STM-1 Multiplexer

RELEASE 3.10

GENERAL INFORMATION

NEC Corporation 7-1, Shiba 5-chome, Minato-ku, Tokyo 108-8001, Japan TEL +81-3-3454-1111

TELEX NECTOK J22686 FAX +81-3-3798-1510/9

F5259_F04 GENERAL INFORMATION

SpectralWave is a registered trademark of NEC Corporation.

Copyright 2005-2006 by NEC Corporation.

All rights reserved.

The information of this manual was approved by product manager of CND.

This manual is subject to change without notice.

1st Issue July 2006

Printed in China


CONTENTS

Contents i

1. OVERVIEW 1-1

2. REFERENCE STANDARDS 2-1

3. EQUIPMENT CHARACTERISTIC 3-1

4. NETWORK DESIGN USING V-NODE 4-1

4.1 Mounting Configuration of Interface Board and Modules............. 4-1 4.1.1 Package Configuration......................................................................... 4-3 4.1.2 Mounting Configuration ....................................................................... 4-4

4.2 Example of Network Configuration............................................... 4-12 4.2.1 Point-to-Point ...................................................................................... 4-12 4.2.2 Linear ................................................................................................... 4-12 4.2.3 MS-SPRing........................................................................................... 4-13 4.2.4 Multi-Ring ............................................................................................ 4-14

5. SPECIFICATION 5-1

5.1 System Design Specifications......................................................... 5-1 5.1.1 System Parameters............................................................................... 5-1 5.1.2 Matrix type............................................................................................. 5-1 5.1.3 Max NE connection number................................................................. 5-1 5.1.4 Crossconnect ........................................................................................ 5-1 5.1.5 Interface................................................................................................. 5-2 5.1.6 Protection .............................................................................................. 5-2 5.1.7 Synchronization.................................................................................... 5-4 5.1.8 Performance Monitoring ...................................................................... 5-6 5.1.9 Fault management ................................................................................ 5-8 5.1.10 Alarm report ........................................................................................ 5-10 5.1.11 Loopback............................................................................................. 5-10 5.1.12 HKA ...................................................................................................... 5-10 5.1.13 HKC ...................................................................................................... 5-10 5.1.14 User interface...................................................................................... 5-10 5.1.15 Remote access by CID ........................................................................5-11 5.1.16 F/W and FPGA download ....................................................................5-11


Contents ii

5.1.17 Data download/ data upload ...............................................................5-11 5.1.18 Layer 2 switch ..................................................................................... 5-12 5.1.19 FE ........................................................................................................ 5-12 5.1.20 GE........................................................................................................ 5-13 5.1.21 Security................................................................................................ 5-13 5.1.22 LOG ...................................................................................................... 5-13 5.1.23 Inventory.............................................................................................. 5-13

5.2 Optical Signal Interface.................................................................. 5-15 5.2.1 STM-1: 155M Optical Interface........................................................... 5-15 5.2.2 STM-4: 622M Optical Interface........................................................... 5-16 5.2.3 STM-16: 2.5G Optical Interface.......................................................... 5-17 5.2.4 Eye Diagram of Optical Transmission .............................................. 5-18

5.3 Electrical Signal Interface .............................................................. 5-19 5.3.1 Basic Parameters of Electric Interface ............................................. 5-19 5.3.2 2M interface......................................................................................... 5-19 5.3.3 34M Interface....................................................................................... 5-21 5.3.4 45M Interface....................................................................................... 5-23 5.3.5 STM-1 Electrical Interface .................................................................. 5-25

5.4 Ethernet Interface ........................................................................... 5-29 5.4.1 10BASE-T interface specification...................................................... 5-29 5.4.2 100BASE-TX interface specification ................................................. 5-29 5.4.3 GBE interface specification ............................................................... 5-30

5.5 The Jitter Index of Interface........................................................... 5-32 5.5.1 Input Jitter and Wander Tolerance .................................................... 5-32 5.5.2 Jitter Generation ................................................................................. 5-34 5.5.3 Jitter Generation by Mapping ............................................................ 5-35 5.5.4 Combined Jitter and Wander ............................................................. 5-35

5.6 External Interface ........................................................................... 5-39 5.6.1 Orderwire............................................................................................. 5-39 5.6.2 User Channel....................................................................................... 5-39 5.6.3 Office Alarm......................................................................................... 5-39 5.6.4 Housekeeping Alarm/Control ............................................................ 5-40

5.7 Environmental Conditions ............................................................. 5-41 5.7.1 Temperature ........................................................................................ 5-41 5.7.2 Humidity............................................................................................... 5-41 5.7.3 Vibration .............................................................................................. 5-41

5.8 Power Distribution.......................................................................... 5-42


Contents iii

E

5.8.1 Power Interface ................................................................................... 5-42 5.8.2 Power Consumption........................................................................... 5-43

5.9 User Interface.................................................................................. 5-44 5.9.1 CID Interface........................................................................................ 5-44 5.9.2 NMS...................................................................................................... 5-45

5.10 Physical Specification.................................................................... 5-45 5.10.1 V-NODE Subrack Dimensions............................................................ 5-45

This page is intentionally left blank.


Overview 1-1

E

1. OVERVIEW

NECs SpectralWave Versatile Node Multiplexer (V-Node) offers various types of traffic interfaces such as PDH, SDH and Fast Ethernet with flexible network configurations of linear, ring, multiple rings, etc. The V-Node is also well suited for implementation in customer premises. V-Node has been developed as a part of NECs SpectralWave family products. V-Node also has the following features:

Conforms to the correlative proposal of ITU-T and related SDH technical criteria of the country.

Full time slot crossconnect functions, having powerful, convenient Add and Drop traffic functions and modes.

Compliant system design: The equipment can configure either TM (Terminal Multiplexer) or ADM (Add Drop Multiplexer) mode flexibly.

Offers system configuration for STM-1/STM-4/STM-16, with the methods of easy upgrading and reconfiguring networks.

Provides multi-type tributary interfaces with excellent cost performance. Offers perfect network management system; flexible network configuration. Realizes a number of traffic protection modes. Provides multi-function orderwire telephone system. Offers electromagnetic compatibility performances (EMC and EMI) with

appropriate measures.

Well maintained; high-reliable operation.


Reference Standards 2-1

2. REFERENCE STANDARDS

z ITUT G.703 Physical/electrical characteristics of hierarchical digital interface. z ITUT G.707 Network node interface for the Synchronous Digital Hierarchy

(SDH).

z ITUT G.781 Synchronization layer functions. z ITUT G.783 Characteristics of the SDH equipment functional blocks. z ITUT G.784 SDH management. z ITUT G.803 Architectures of transport networks based on the SDH. z ITUT G.811 Timing requirements at the outputs of primary reference clocks. z ITUT G.813 Timing characteristics of SDH equipment slave clocks. z ITUT G.823 The control of jitter and wander within digital networks which are

based on the 2048 kbit/s hierarchy.

z ITUT G.825 The control of jitter and wander within digital networks which are based on the SDH.

z ITUT G.826 Error performance parameters and objectives for international, constant bit rate digital paths at or above the primary rate.

z ITUT G.841 Types and characteristics of SDH network protection architectures. z ITUT G.957 Optical interfaces for equipments and systems relating to the SDH. z ITUT G.958 Digital line systems based on the SDH for use on optical fiber

cables.

z ITUT G.7041/Y.1303 Generic framing procedure. z ITUT G.7042/Y.1305 Link capacity adjustment scheme (LCAS) for virtual

concatenated signals.

z IEEE 802.1D-1998 Part 3: Media Access Control (MAC) Bridges. z IEEE 802.1Q-1998 Virtual Bridged Local Area Networks. z IEEE 802.3-1998 Carrier sense multiple access with collision detection

(CSMA/CD) access method and physical layer specifications.

z IEEE 802.3ad-1998 Port Trunk


Reference Standards 2-2 E

z IEEE 802.1p-1998 Quality of Service z ITU-T X.86 Link Access Procedure - SDH(LAPS) z RFC1213 z RFC1058 z CISPR22 (11/97) z CISPR24 (09/97) z ETSI prETS 300-386-2-2 (09/96) z prEN50082-1 (1994) z ETS 300 019-1-3 z EN60825-2


Equipment Characteristic 3-1

3. EQUIPMENT CHARACTERISTIC

z 11U-height compact-size designation.

z Provides 2016*2016 VC-12 level, or 96*96 VC-3 level, or 152*152 VC-4 level non-blocking crossconnection, supporting uni-directional, bi-directional and broadcasting.

z Provides sub-network connection protection (SNCP), multiplex section shared protection ring (MS-SPRing) and 1+1 multiplex section protection (MSP), supporting traffic communication between them.

z Applicable for a number of network configurations: point-to-point, linear, ring, star, tree, multi-ring, ring crossing, etc.

z Provides E12 (2M), E31 (34M), E32 (45M), FE (10M/100M Ethernet), GE (10M/100M/1G Ethernet), STM-1e, STM-1/4, STM-16 traffic interfaces.

z Provides three levels of VC-4, VC-3 and VC-12 cross connect for FE and GE board, supporting both LAPS and GFP EOS encapsulation and LCAS standard.

z Provides virtual concatenation function for FE and GE, and the maximum virtual concatenation quantity for FE: VC-3 level is 3, and VC-12 level is 63; for GE: VC-4 level is 7, and VC-3 level is 21.

z Capacity for interfaces:

E12 interface: up to 352 channels E31 interface: up to 30 channels E32 interface: up to 30 channels FE Ethernet interface: up to 78 channels GE 1G optical Ethernet interface: up to 26 channels GE 10M/100M electric Ethernet interface: up to 52 channels STM-16 optical interface: up to 6 channels STM-4 optical interface: up to 13 channels



STM-1 optical interface: up to 26 channels STM-1 electrical interface: up to 20 channels

z Either way for the use of traffic: independent or protecting each other among optical interfaces.

z Configurations of complicated SNC-P network, such as 2.5G-622M Multi-Ring, 622M-155M Multi-Ring, 155M-155M Multi-Ring, etc.

z Allows configuring STM-1 system to/from STM-4 system only by replacing interface modules; simply upgrading.

z Provides orderwire interface (2-wire interface), with the functions of all-call, group calling and selected calling.

z Up to 6 channels of 64 kbit/s V.11 user data interface (on D_INF unit) per subrack.

z Provides timing synchronous interface:

2048 kbit/s or 2048 kHz external clock 2048 kbit/s tributary STM-1, STM-4 and STM-16 timing source inputs 2048 kbit/s or 2048 kHz external timing source output SSM function

z Provides DCC channel of D1 to D3 and D4 to D12; Using both OSI and TCP/IP communication protocol.

z Provides F (10BASE-T) and f (RS232) network management interfaces for configuration, alarm, performance, maintenance and security functions of ITU-T definition.

z Provides ports for eight Housekeeping Alarms, four Housekeeping Controls, and a set of Alarm Output interfaces.

z Provides local/remote firmware download: in-service upgrading is available for easy maintenance.



E

z Allows upgrading hardware configuration data without replacing equipment.

z Provides the network management for remote connection via serial interface or LAN, which allows monitoring remote NE.

z Supports the following application of fiber transmission:

Super Long-Distance (80km) Long-Distance (40km) Short Distance (15km)

z Provides layer 2 switch function:

Supports 802.3x flow control for full-duplex mode and collision-based back- pressure for half-duplex mode.

Supports broadcast storm filtering Supports port-based VLAN and 802.1Q tag-based VLAN with IVL Supports 802.1d Spanning Tree Protocol Supports static priority and 802.1p Class of Service with 2-level priority

queuing

Supports static port trunking Supports by-port Egress/Ingress rate control Support Static MAC filter database

z Provides fans to disperse heat forcibly; provides the fans controlling temperature and inspecting their own status to guarantee the equipment running stably.

z Meet RoHS and lead-free design requirements.


Network Design using V-Node 4-1

4. NETWORK DESIGN USING V-NODE

4.1 Mounting Configuration of Interface Board and Modules

This section provides mounting configuration of interface packages and modules.

Slot positions for each interface package are shown in Figure 4-1 and Figure 4-2 .

Figure 4-1 V-Node Front View



Figure 4-2 Slot-Position View



4.1.1 Package Configuration Several kinds of packages are available as shown below: STM-16: 1* STM-16 optical interface and SDH Signal termination STM-1/4: 1* STM-4 or 2*STM-1 optical interface and SDH Signal termination S1E: 2*STM-1electrical interface and SDH Signal termination E12: 32*2M PDH signal to/from VC-12 SDH signal mapping/demapping E31: 3*34M PDH signal to/from VC-3 SDH signal mapping/demaping E32: 3*45M PDH signal to/from VC-3 SDH signal mapping/demaping FE_4: 6*10/100M bit Ethernet (4 WAN) GE: GE interface unit (With L2SW) CS: Cross-connect + timing source unit TPS_S1E: 155M TPS Unit TPS_E3: 34M/45M TPS unit TPS_E12W: 2M TPS unit (for work slot) TPS_E12P: 2M TPS unit (for protection slot) THR_E12W: 2M through unit MCP: System control and communication P_INF: Power and clock interface unit D_INF: Data through interface unit (6 ports ) FAN: Fans



4.1.2 Mounting Configuration

Following table shows mounting configuration in Interface Packages.

Y: Yes (an available slot for the package) NOTE:

1. The slot #24 and #25 are not used. 2. TPS_S1E, TPS_E3 packages occupy 2 slots. 3. When using a package which needs TPS, the dedicated TPS must be used.(When using E12,

TPS_E12W or TPS_E12P must be used. When using E31 or E32, TPS_E3 must be used. And when using S1E, TPS_S1E must be used.)

4. When the GE board is inserted into slot5/ slot6/ slot7/ slot10/ slot11/ slot12, the number of AU port is 16, and if the GE board is inserted into other slot, the number of AU port is 8.



4.1.2.1 STM-16 Configuration

Regardless of the use of Line Protection, TPS Package (Upper Row) is not required. The configuration of STM-16 is shown below:

21 22 23 26 27 28

5 6 7 10 11 12

STM-16

STM-16

STM-16

STM-16

STM-16

STM-16

P_INF

P_INF

Figure 4-3 STM-16 Configuration

4.1.2.2 STM-1/4 Configuration

Regardless of the use of Line Protection, TPS Package (Upper Row) is not required. The configuration of STM-1/4 is shown below:

18 19 20 21 22 23 26 27 28 29 30 31 32

2 3 4 5 6 7 10 11 12 13 14 15 16

STM-1/4

P_INF

P_INF

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

STM-1/4

Figure 4-4 STM-1/4 Configuration



4.1.2.3 FE Configuration

TPS Package (Upper Row) is not required. The configuration of FE is shown below: 18 19 20 21 22 23 26 27 28 29 30 31 32

2 3 4 5 6 7 10 11 12 13 14 15 16

FE

P_INF

P_INF

FE

FE

FE

FE

FE

FE

FE

FE

FE

FE

FE

FE

Figure 4-5 FE Configuration

4.1.2.4 GE Configuration

TPS Package (Upper Row) is not required. The configuration of GE is shown below:

Figure 4-6 GE Configuration



4.1.2.5 S1E Configuration

When there are Package Protections, TPS_S1E Package (Upper Row) is necessary.

The type of Package Protection is 1:1, and up to 5 Groups can be configured.

The slot of Work and Prot is fixed in the each group.

Group1 Slot2: Work, Slot3: Prot




Group5 Slot15: Work, Slot16: Prot 18 20 27 29 31

2 3 4 5 11 12 13 14 15 16

S1E (W)

S1E (P) TPS_S1E

S1E (W)

S1E (P) TPS_S1E

S1E (W)

S1E (P) TPS_S1E

S1E (W)

S1E (P) TPS_S1E

S1E (W)

S1E (P) TPS_S1E

Figure 4-7 S1E (with TPS)



4.1.2.6 E31 Configuration

When there are Package Protections, TPS_E3 Package (Upper Row) is necessary.








Figure 4-8 E31 (with TPS)




When there are Package Protections, TPS_E3 Package (Upper Row) is necessary.








Figure 4-9 E32 (with TPS)




4.1.2.8.1 E12 (without TPS)

Where the Package Protection is not configured, THR_E12W Package (Upper Row) is required.

Figure 4-10 E12 Configuration (without TPS)



4.1.2.8.2 E12 (with TPS)

Where the Package Protection is configured, TPS_E12P Package (Upper Row) for Prot, and TPS_E12W Package (Upper Row) for Work are required.

The type of Package Protection is 1: N (N=1~4), and up to 2 Groups can be configured. The value of N differs depending on the number of mounted packages on Work-side.

The slots of Work and Prot are designated in the each group. Group 1: Slot #2 = Prot, Slots #3 thru #6 = Work Group 2: Slot #16 = Prot, Slots #12 thru #15 = Work 18 19 20 21 22 28 29 30 31 32

2 3 4 5 6 12 13 14 15 16 E12 (P)

TPS_E12P

E12 (W)

E12 (W)

E12 (W)

E12 (W)

E12 (W)

E12 (W)

E12 (W)

E12 (W)

E12 (P)

TPS_E12W

TPS_E12W

TPS_E12W

TPS_E12W

TPS_E12W

TPS_E12W

TPS_E12W

TPS_E12W

TPS_E12P

Figure 4-11 E12 Configuration (with TPS)



4.2 Example of Network Configuration

4.2.1 Point-to-Point

Figure 4-12 Point-to-Point Network Configuration

4.2.2 Linear

Figure 4-13 Linear Network Configuration



4.2.3 MS-SPRing

V-Node

V-Node

2M(With TPS) 100Base-T

STM-16 MS-SPRing

CS

P_INF

STM-4/16

D_IN

F M

CP

E12

FE

P_INF

CS

STM-4/16

E12TPS_E12W

TPS_E12P

V-Node

V-Node

E12E12

E12

TPS_E12W

TPS_E12W

TPS_E12W

Figure 4-14 Multi-Ring


Network Design using V-Node 4-14 E

4.2.4 Multi-Ring

V-Node

V-Node

2M(With TPS)100Base-T

STM-16 MS-SPRing

CS

P_INF

STM-16

D_IN

F M

CP

E12

P_INF

CS

STM-16

E12TPS_E12W

TPS_E12P

V-Node

V-Node

E12E12

E12TPS_E12W

TPS_E12W

TPS_E12W

V-Node

V-Node

V-NodeSTM-4 SNCP

FE

STM-4

STM-4

Figure 4-15 Multi-Ring


Specification 5-1

5. SPECIFICATION

5.1 System Design Specifications

5.1.1 System Parameters

z Transmission Level: STM-16, STM-4 , STM-1o/e z Bit Error Rate:


Specification 5-2

5.1.5 Interface

z STM-16 (I-16.1/S-16.1/L-16.1/L-16.2)(1ch/SLOT) z STM-4 (S-4.1/L-4.1/L-4.2)(1ch/SLOT) z STM-1 (S-1.1/L-1.1/L-1.2) (2ch/SLOT) z S1E (2ch/SLOT) z 2M (75 ohms / 120 ohms)(32ch/SLOT) z 34M (3ch/SLOT) z 45M (3ch/SLOT) z FE (100BASE-TX/10BASE-T) (6CH/SLOT)(For FE_4 board) z FE (100BASE-TX/10BASE-T) (4CH/SLOT)(For GE_A board) z GE (1000 BASE-X)(2CH/SLOT)

5.1.6 Protection z 2F MS-SPRing

1) STM-4/16 interface

2) Bi-directional direction revertive (See ITU-T G.841)

3) Switch time: < 50msec

4) switch criterion: SF/SD/MSW/FSW/LKOP

SF: LOS, LOF, MS-AIS, RS-TIM, B2-EXC

SD: B2DEG

z MSP (linear protection) 1) Optical interface

2) 1+1 Uni-directional Non-Revertive (See ITU-T G.841)

1+1 Bi-directional Non-Revertive

1:1 Bi-directional Revertive


Specification 5-3

3) switch time:< 50msec

4) switch criterion: SF/SD/MSW/FSW/LKOP

SF: LOS, LOF, MS-AIS, RS-TIM, B2-EXC

SD: B2DEG

z SNC-P (path protection) 1) Protection unit: HOPath:VC-4

LOPath:VC-3/VC-12

2) 1+1 Uni-directional Non-Revertive/1+1 Uni-directional Revertive

3) switch time:< 50msec (SNC/N: when 504 path switch, switch time is less than 200ms)

4) switch criterion:SF/SD/MSW/FSW/LKOP

SNC/I SSF(Server signal fail) a) VC-4 AU-LOP,AU-AIS

b) VC-3/12 TU-LOP,TU-AIS

SNC/N TSF(Trail signal fail) TSD(Trail signal Degrade) a) VC-4 SF AU-LOP, AU-AIS

HP-UNEQ, HP-TIM, HP-EXC

SD HP-DEG

b) VC-3/VC-12 SF TU-LOP, TU-AIS, LOM(VC12)

LP-UNEQ, LP-TIM, LP-EXC

SD LP-DEG

5) Non-revertive/revertive selectable

z PKG protection 1) CS: 1+1 non-revertive protection

2) 2M TPS: 1:4 revertive protection

3) 34M/45M TPS: 1:1 revertive protection

4) STM-1e TPS: 1:1 revertive protection


Specification 5-4

z Timing source protection 1) Revertive/Non-Revertive

2) Switch time: timing source selected time 200msec + timing source switch time 300msec

3) Switch criterion: SF/MSW/FSW

(Priority/Quality/SSM selectable)

5.1.7 Synchronization

z Timing source 1) Internal Free run

2) Internal Holdover

3) STM-N Line (any port)

4) 2 MHz PDH Line (any slot channel 1)

5) External port: 2 Mbps or 2 MHz (75 ohms / 120 ohms)

Following table shows the basic parameter of all kinds of timing sources.

2MHz EXTCLK

Line Rate 2.048 MHz

Frame Format NA

Line Code NA

Impedance 75 ohms unbalanced / 120 ohms balanced

2Mbps EXTCLK

Line Rate 2.048 Mbps

Frame Format G.704

Line Code HDB3

Impedance 75 ohms unbalanced / 120 ohms balanced

2M PDH


Frame Format NA

Line Code HDB3

Impedance 75 ohms unbalanced /120 ohms unbalanced


Specification 5-5

STM-1o


Frame Format G.707

Line Code -

Impedance -

STM-1e

Line Rate 155.520Mbps

Frame Format -

Line Code CMI

Impedance 75 ohm unbalanced

STM-4


Frame Format G.707

Line Code -

Impedance -

STM-16

Line Rate 2,488.320 Mbps

Frame Format G.707

Line Code -

Impedance -


Specification 5-6

5.1.8 Performance Monitoring

z PM Items SDH PM

RST BBE, ES, SES, OFS, UAS

MST BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS

MSA/HPA PJE-P, PJE-N

MSP MS-PSC, MS-PSD

HPT BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS

LPT BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS

Ethernet PM

LAN ETH-DropPkt, ETH-RxAlignmentErrorFrame, ETH-RxBroadcastPkt, ETH-RxFCSErrorFrame, ETH-RxMulticastPkt, ETH-RxOctet, ETH-RxUnderSizePkt, ETH-RxOverSizePkt, ETH-RxPkt1024toMax, ETH-RxPkt128to255, ETH-RxPkt256to511, ETH-RxPkt512to1023, ETH-RxPkt64, ETH-RxPkt65to127, ETH-TxCollisionFrame, ETH-TxDelayTransmission, ETH-TxExtCollisionFrame, ETH-TxLateCollisionFrame, ETH-TxMultiCollisionFrame, ETH-TxNUcastPkt, ETH-TxOctet, ETH-TxSingleCollisionFrame, ETH-TxUcastPkt

WAN ETH-DropPkt, ETH-RxAlignmentErrorFrame, ETH-RxBroadcastPkt, ETH-RxFCSErrorFrame, ETH-RxMulticastPkt, ETH-RxOctet, ETH-RxPkt1024toMax, ETH-RxPkt128to255, ETH-RxPkt256to511, ETH-RxPkt512to1023, ETH-RxPkt64, ETH-RxPkt65to127, ETH-TxNUcastPkt, ETH-TxOctet, ETH-TxUcastPkt

Encapsulation PM

GFP GFP_RxEXIErrorPkt, GFP_RxFCSErrorPkt, GFP_RxOctet, GFP_RxPkt, GFP_TxOctet, GFP_TxPkt

LAPS LAPS_RxFCSErrorPkt, LAPS_RxOctet, LAPS_RxPkt, LAPS_TxOctet, LAPS_TxPkt


Specification 5-7

z PM register 1) 15min register

2) 1day register

NOTE:

1. 15min register capacity: 32

1day register capacity: 1

2. The guaranty performance value is referring to 2.9 Performance monitor ofF05. FUNCTIONAL manual.

3. Sometimes CID will not show performance value, but show over flow which means that the performance value exceeds its maximum counter value.

z TCA function


Specification 5-8

5.1.9 Fault management

z Alarm Items

SDH Alarm

SPI LOS

RST LOF, RS-TIM

MST MS-AIS, MS-RDI, MS-EXC, MS-DEG

MSA AU-AIS, AU-LOP

HPC HP-PPS-FAIL

HPT HP-TIM, HP-UNEQ, HP-RDI, HP-EXC, HP-DEG

HPA TU-AIS, TU-LOP, LOM, HP-PLMF

LPC LP-PPS-FAIL

LPT LP-TIM, LP-UNEQ, LP-RDI, LP-EXC, LP-DEG

LPA LP-PLMF, AIS

HPOM HP-TIM, HP-UNEQ, HP-EXC, HP-DEG, VC-AIS

LPOM LP-TIM, LP-UNEQ, LP-EXC, LP-DEG, VC-AIS

2M/34M/45M LOSAIS

SETS LTI, CLKFAIL, REF_FAIL, CLKDRIFT

EXT CLK IN LOS, AIS(2Mbps), LOF(2Mbps)

PKG PKG_REMOVED, PKG_TYPE, PKG_FAIL, COM_FAIL

PORT PORT_REMOVED, PORT_TYPE

NETWORK LINK-FAILED, LINK_DOWN

ENVIRONMENT HKAn

EQUIPMENT BUS_ERROR,MEM_FAIL

PROTECTION APSD_n, APSIN_n, APSNIM_n, APSIM_n, CMF, PPS-FAIL, PSBF, RINGSW_FAIL_n, TAF


Specification 5-9

Ethernet Alarm

LAN DropPkt_EXC, LINK_DOWN, RxAlignmentErrorFrame_EXC, RxFCSErrorFrame_EXC, TxCollision_EXC, TxDelayTransmission_EXC, TxExtCollision_EXC, TxLateCollision_EXC

WAN CSF_LCS, CSF_LCSync, CSF_R_LCS, CSF_R_LCSync, DropPkt_EXC, LINK_DOWN, RxAlignmentErrorFrame_EXC, RxFCSErrorFrame_EXC, WAN_PORT_SD, WAN_PORT_SF

Encapsulation Alarm

GFP SSF_LGS

LAPS LAPS_FAIL

Virtual Concatenation Alarm

Virtual Concatenation Layer

LP-Xv-LOA, LP-Xv-LOM, LP-Xv-SQM, LP-Xv-PLM, HP-Xv-LOA, HP-Xv-LOM, HP-Xv-SQM

z Equipment alarm item 1) PKG failure

2) Bus failure (backboard bus error)

3) Memory failure

4) PKG removal

5) PKG type mismatch

z Network alarm 1) link failure (LAPD, LAN)

2) access failure

z Alarm severity Critical/Major/Minor/Warning

z Delay/ stretch report


Specification 5-10

5.1.10 Alarm report

z LED (ALARM) z Office alarm: PM, DM, AB, AL z ACO

5.1.11 Loopback

z Terminal loopback Applicable to STM-N, 2M,

z Facility loopback Applicable to STM-N, 2M

5.1.12 HKA

z Built in 8 port ( in MCP) z Alarm logic (Loop/ Open) selectable z Alarm standard

Loop: 20k ohm

z MAX current: 100mA

5.1.13 HKC

z Built in 4 ports z Control logic (Loop < 2 ohms, Open > 500 kohms) selectable z Max current/voltage: 0.3 A / 72 V

5.1.14 User interface

z f interface: RS-232C z f interface is used only CID. z F interface: LAN (10 Base-T) z F interface is used by NMS and CID mutually


Specification 5-11

5.1.15 Remote access by CID

z Operation response within 90 sec from any CID. z Implement through DCC function of V-Node. z Loopback function is not available for SDH interface; is available for PDH

interface.

5.1.16 F/W and FPGA download

z Performance:

PKG Name F/W or FPGA Port Cost Time F 33s FW

(SF221-0001-A01) f 280s F 12s

MCP

FPGA (SF221-0001-F01) f 110s

F 40s FW (SF226-0003-A01) f 330s

F 35s

CS

FPGA (SF226-0003-F01) f 310s

F 5s STM-16 FPGA (SF226-0003-F02) f 25s

F 5s STM-1/4 FPGA (SF226-0003-F03) f 25s

F 5s E1 FPGA (SF226-0003-F05) f 25s

F 30s FW (SF208-0007-A01) f 300s

F 10s FPGA (SF208-0007-F01) f 85s

F 18s

FE

FPGA (SF208-0007-F02) f 135s

F 30s FW (SF208-5002-A01) f 300s

F 10s

GE

FPGA (SF208-5002-F01) f 85s

5.1.17 Data download/ data upload

z Performance: Using CID and f port download data: 18 sec per NE Using CID and f port upload data: 17 sec per NE

Using CID and F port download data: 14 sec per NE

Using CID and F port upload data: 12 sec per NE


Specification 5-12

5.1.18 Layer 2 switch

z Port Line-rate: max 148,810 packets/sec z MAC Table: 10K z VLAN Table: 2K z Priority Queue: 2-level z VID Range: port-based VLAN: 2 thru 255 802.1Q VLAN: Untaged 2 thru 255

Taged 2 thru 4094

z Egress/Ingress Rate Control: 10 K/step z Max Ethernet Frame Length: 1568 (includes VID 4 bytes)

5.1.19 FE

z Port Line-rate: max 148,810 packets/sec z MAC Table: 10K z VLAN Table: 2K z Priority Queue: 2-level z VID Range: port-based VLAN: 2 thru 255 802.1Q VLAN: Untagged 2 thru 255

Tagged 2 thru 4094

z Egress/Ingress Rate Control: 10 K/step z Trunking: max 4-trunk groups z Max Ethernet Frame Length: 1568 (includes VID 4 bytes) z Max VCAT Number: VC-12-Xvx=163., VC-3-Xvx=13.


Specification 5-13

5.1.20 GE

z Port Line-rate: max 1,488,095 packets/sec z MAC Table:16K z VLAN Table:4K z Priority Queue: 8-level z VID Range:

802.1Q VLAN: Untagged 2 thru 255

Tagged 2 thru 4094

z Egress/Ingress Rate Control: 64K/step z Trunking:max 4-trunk groups z Max Ethernet Frame Length:

1522 bytes (includes VID 4 bytes) for FE-LAN and FE-WAN

9216 bytes (Jumbo Packets) for GE-LAN and GE-WAN

z Max VCAT Number: FE-WAN: VC-3-Xv (X=1-3), VC-4

GE-WAN: VC-3-Xv (X=1-21), VC-4-Xv (X=1-7)

z Max VCAT Differential Delay 16ms

5.1.21 Security

z User Authorization Management: Level 1 to Level 4

5.1.22 LOG

z Event Log: max. 500 items for each event log (TCA, PPS 3000) z Command Log: max. 500 items

5.1.23 Inventory

z PKG name (either from OS and package label)


Specification 5-14

z PKG Code (from package label) z Serial Number (from package label) z Manufactured date (from package label) z PKG (H/W & F/W) Version (either from OS or package label) z Repair record (from package label)


Specification 5-15

5.2 Optical Signal Interface

The transmission performance between S (Sending side) and R (Receiving side) meets the requirement of section 5 in ITU-T G.957.

5.2.1 STM-1: 155M Optical Interface

ITEM SPECIFICATIONS

Nominal Bit Rate G. 707, G.958; 155520 Kbit/s

Application Code S-1.1 L-1.1 L-1.2

Operating Wavelength Range 1261 ~ 1360 nm 1280 ~ 1335 nm 1480 ~ 1580 nm

Transmitter at Reference Point S

Source Type MLM SLM SLM

Spectral Characteristics

Maximum RMS width 7.7 nm

Maximum 20 dB width 1 nm 1 nm

Minimum side mode suppression ratio 30 dB 30 dB

Mean Launched Power

Maximum 8 dBm 0 0

Minimum 15 dBm 5 dBm 5 dBm

Minimum Extinction Ratio 8.2 dB 10 dB 10 dB

Main Optical Path Between S and R

Attenuation Range 0 ~ 12 dB 10 ~ 28 dB 10 ~ 28 dB

Maximum Dispersion 96 ps/nm N/A N/A

Minimum Optical Return Loss of Cable Plant at S (including any connectors)

N/A N/A 20 dB

Maximum Discrete Reflectance between S Point and R Point

N/A N/A 25 dB

Receiver at Reference Point R

Minimum Sensitivity (at BER = 10E10) 28 dBm 34 dBm 34 dBm

Minimum Overload (at BER = 10E10) 8 dBm 10 dBm 10 dBm

Maximum Optical Path Penalty 1 dB 1 dB 1 dB

Maximum Reflectance of Receiver (measured at R)

N/A N/A 25 dB


Specification 5-16

5.2.2 STM-4: 622M Optical Interface

ITEM SPECIFICATIONS

Nominal Bit Rate G. 707, G.958; 622080 kbit/s

Application Code S-4.1 L-4.1 L-4.2

Operating Wavelength Range 1293 ~ 1334 nm

1274 ~ 1356 nm

1280 ~ 1335 nm

1480 ~ 1580 nm


Source Type MLM MLM SLM SLM


Maximum RMS width 4 nm 2.5 nm

Maximum 20 dB width 1 nm


Specification 5-17

5.2.3 STM-16: 2.5G Optical Interface

ITEM SPECIFICATIONS

Nominal Bit Rate G. 707, 2488320 kbit/s

Application Code I-16.1 S-16.1 L-16.1 L-16.2

Operating Wavelength Range 1260~1360 nm

1260~1360 nm

1280~1335 nm

1500~1580 nm


Source Type MLM SLM SLM SLM


Maximum RMS width 4nm

Maximum 20 dB width 1 nm 1 nm


Specification 5-18

5.2.4 Eye Diagram of Optical Transmission

Following diagram shows the regulations of G.957, using a filter specified in appendix A of G.957 to measure.

1+y1

1

y2

0.5

y1

0

-y1

Scope

Time

0 x1 x2 x3 x4 1

STM-1 interface

x1/x4 0.15/0.85

x2/x3 0.35/0.65

y1/y2 0.20/0.80

STM-4 interface

x1/x4 0.25/0.75

x2/x3 0.40/0.60

y1/y2 0.20/0.80

STM-16 interface

x3-x2 0.20

y1/y2 0.25/0.75


Specification 5-19

5.3 Electrical Signal Interface

5.3.1 Basic Parameters of Electric Interface

Item 2M (E12) 34M (E31) 45M (E32) STM-1e

Bits rate 2048 kbit/s 34368 kbit/s 44736 kbit/s 155520 kbit/s

Bits rate tolerance 50ppm 20ppm 20ppm 20ppm

Code HDB3 HDB3 B3ZS CMI

Interface template and return loss

G.703(10/98) Section 9.2/9.3

G.703(10/98) Section 11.2/11.3

G.703 (10/98):Section 8

G.703(10/98) Section 15.2/15.3

5.3.2 2M interface

5.3.2.1 Waveform of Output Port

Item 75 interface 120 interface

Line pairs in every transmission direction Co-axis Symmetric

Impedance of testing load 75 120

Peak voltage of a mark 2.37 V 3 V

Peak voltage of a space 0 0.237 V 0 0.3 V

Standard pulse width 244 ns 244 ns

Ratio of the amplitudes of positive and negative pulses 0.95 thru 1.05 0.95 thru 1.05 At the center of the pulse inter Ratio of the width of positive and negative pulse 0.95 thru 1.05 0.95 thru 1.05

Mask of the pulse G.703 Figure 15 G.703 Figure 15


Specification 5-20

Pulse mask at 2048 kbit/s interface (Figure15/G.703)

5.3.2.2 Return Loss of Input Port

The attenuation of this pair should be assumed to follow a f law and the loss of a frequency of 1024 kHz should be in the range 0 thru 6 dB. The return loss at the input port should have the following provisional minimum values:

Frequency (kHz) Return Loss (dB)

51 thru 102 12

102 thru 2048 18

2048 thru 3072 14


Specification 5-21

5.3.3 34M Interface


Item Waveform

Pulse shape (rectangular when standard) All marks of valid signal should conform to figure 17/G.703 template in spite of the symbols

Line pairs in every transmission direction A co-axis line pairs

Impedance of testing load 75, resistance Nominal peak voltage value (having pulse) 1.0V

Peak voltage value (no pulse) 00.1V

Standard pulse width 14.55ns

Ratio of the amplitudes of positive and negative pulses at the center of the pulse interval

0.95 to 1.05

Ratio of width of positive and negative pulses at the nominal half amplitude

0.95 to 1.05

Mask of pulse G.703 figure 17


Specification 5-22

Pulse mask at the 34 368 kbit/s interface (Figure17/G.703)

5.3.3.2 Return Loss of Input Port

The attenuation of this cable should be assumed to follow approximately a f law and the loss at a frequency of 17184 kHz should be in the range 0 to 12dB.

The return loss at the input port should have the following provisional minimum values:

Frequency (kHz) Return Loss (dB)

860 thru 1720 12

1720 thru 34368 18

34368 thru 51550 14


Specification 5-23

5.3.4 45M Interface

ITEM SPECIFICATION

Basic SPEC Conforms to G.703 (10/98) Section8 (same as GR-499-CORE)

Bit rate 44.736 Mbit/s 20 ppm

Conforms to G.703 (10/98) Section 8.1 Table 6

Code B3ZS

Conforms to G.703 (10/98) Section 8.1: Table 6

Frame constructor Conforms to G.703 (10/98) Section 8.1: Table 6 required to meet G.752 (6M mapping) only

Conforms to GR-499-CORE (1995) Section10.5 (no frame)

Output pulse mask G.703 (10/98) Section 8/

Table6/Fig.14 conformity

Impedance 75 5%


Connect cord 75 imbalance Coaxial cable

(GR-253-CORE Issue2 (12/95) conformity)

Transmit distance 450 feet (137.2m)

[Conforms to GR-253-CORE Issue2 (12/95)]

Pulse amplitude 0.36 V thru 0.85 V


Power level LPF (200 MHz): 4.7 dBm thru +3.6 dBm (225~450 feet, including cable ) or It requires that the power in a 3 kHz 1 kHz band centered at 22368 kHz be between 1.8 dBm and +5.7 dBm. It further requires that the power in a 3 kHz 1 kHz band centered at 44736 kHz be at least 20 dB below that at 22368 kHz.


Pulse imbalance NA

Jitter tolerance Conforms to G.752 (1988): Fig 4

Conforms to G.824 (03/93): Fig. 3, Table 2 (f110Hz) as well

Output jitter Conforms to G.783 (04/97) Section 10.2.3

Mapping jitter BPF (10 Hz thru 400 kHz): 0.40 UIp-p

BPF (30kHz thru 400 kHz):0.10 UIp-p

Conforms to G.783 (04/97) Table 10-1

(BPF: 30 kHz thru 400 kHz is in further study, according to G.783PR (10/00) Table 15-3)


Specification 5-24

(Continued) ITEM SPECIFICATION

Combined jitter 1: BPF (10 Hz thru 400 kHz): 0.40 UIp-p 2: BPF (10 Hz thru 400 kHz): 0.75 UIp-p 3: BPF (30 kHz thru 400 kHz): 0.075 UIp-p

Refer to 34M specification; G.783 (04/97) Table 10-2 conformity requires further study

1, 2 are different because of different pointer sequence 1: Fig. 10-2a), b), c) action 2: Fig. 10-2d) action

Conforms to G.783 (10/00)

Jitter transfer Conforms to G.755 (11/88): Fig. 1

Jitter tolerance Conforms to GR-499-CORE (12/95): Fig 7-1

Conforms to G.824 (03/93) Section 3.1.1: Fig. 3, Table 2

Parameter modify: f1 10Hz to conform both the above specification

Wander generation Conforms to G.783 (04/97) Section 10.2.3

Conforms to G.783 PR (10/00) Section 15.2.3.3.1/15.2.3.3.2


Specification 5-25

5.3.5 STM-1 Electrical Interface


ITEM SPECIFICATION

Pulse shape Nominally rectangular and conforming to the masks shown in Figures 22 and 23

Pair(s) in each direction One coaxial pair Test load impedance 75 ohms resistive Peak-to-peak voltage 1 0.1 V Rise time between 10% and 90% amplitudes of the measured steady state amplitude

2 ns

Transition timing tolerance referred to the mean value of the 50% amplitude points of negative transitions

Negative transitions: 0.1 ns Positive transitions at unit interval boundaries: 0.5 ns Positive transitions at mid-unit intervals: 0.35 ns

Return loss 15 dB over frequency range 8 MHz to 240 MHz Maximum peak-to-peak jitter at an output port Refer to 4.2/G.825

The waveform of output port can be tested to G.703 reference.

1 n s

V

1 n s 1 ns1 n s

1 n s 1 ns

T 1 8 1 8 9 3 0 - 9 2

Positive transition at mid-unit i n t e r v a l N e g a t i v e transitions

(Note 1)

(Note 1)(No t e 1 ) N o m i n alp u l s e

N o m i n a l z e r o l e v e l ( N o t e 2 )

( N o t e 1 )

( N o t e 4 )

0 . 6 0 0 . 5 5 0 . 5 0 0 . 4 5 0 . 4 0

0 . 0 5

0 . 0 5

0 . 4 0 0 . 4 5

0 . 5 5 0 . 6 0

0 . 5 0

0 . 1 n s 0 . 1 ns

0.35 ns 0.35 ns 0. 1 n s

1 . 6 0 8 ns 1.608 ns

0 . 1 n s

T = 6.43 ns

1.608 ns 1.608 ns

Mask of a pulse corresponding to a binary 0


Specification 5-26

NOTE:

1. The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V.

2. For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 mF, to the input of the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed 0.05 V. This may be checked by removing the input signal again and verifying that the trace lays within 0.05 V of the nominal zero level of the masks.

3. Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding or succeeding pulses, with both pulse masks fixed in the same relation to a common timing reference, i.e. with their nominal start and finish edges coincident.

The masks allow for HF jitter caused by intersymbol interference in the output stage, but not for jitter present in the timing signal associated with the source of the interface signal.

When using an oscilloscope technique to determine pulse compliance with the mask, it is important that successive traces of the pulses overlay in order to suppress the effects of low frequency jitter. This can be accomplished by several techniques [e.g. a] triggering the oscilloscope on the measured waveform or b) providing both the oscilloscope and the pulse output circuits with the same clock signal.

4. For the purpose of these masks, the rise time and decay time should be measured between 0.4 V and 0.4 V, and should not exceed 2 ns.


Specification 5-27

Mask of a pulse corresponding to a binary 1

NOTE:

1. The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V.

2. For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 F, to the input of the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed 0.05 V. This may be checked by removing the input signal again and verifying that the trace lays within 0.05 V of the nominal zero level of the masks.


Specification 5-28

3. Each pulse in a coded sequence should meet the limits of the relevant mask, irrespective of the state of the preceding or succeeding pulses, with both pulse masks fixed in the same relation to a common timing reference, i.e. with their nominal start and finish edges coincident. The masks allow for HF jitter caused by intersymbol interference in the output stage, but not for jitter present in the timing signal associated with the source of the interface signal. When using an oscilloscope technique to determine pulse compliance with the mask, it is important that successive traces of the pulses overlay in order to suppress the effects of low frequency jitter. This can be accomplished by several techniques [e.g. a] triggering the oscilloscope on the measured waveform or b] providing both the oscilloscope and the pulse output circuits with the same clock signal].

4. For the purpose of these masks, the rise time and decay time should be measured between 0.4 V and 0.4 V, and should not exceed 2 ns.

5. The inverse pulse will have the same characteristics, noting that the timing tolerance at the level of the negative and positive transitions are 0.1 ns and 0.5 ns respectively.

5.3.5.2 Return Loss

The attenuation of the coaxial pair should be assumed to follow an approximate f law and to have a maximum insertion loss of 12.7 dB (for STM-1) at a frequency of 78MHz. The return loss of output port is equivalent to that of input port.


Specification 5-29

5.4 Ethernet Interface

5.4.1 10BASE-T interface specification Parameter Criterion

Output Signal Level 2.2V-2.8V

Output Signal Waveform ISO8802-3 Table 14-1

TP_IDL Start Output Signal Waveform ISO8802-3 Figure14-10

Link Test Pulse Waveform ISO8802-3 Figure14-12

Output Timing Jitter ISO8802-3 Table 14-1

Allowable Cable Length 100m

5.4.2 100BASE-TX interface specification

Parameter Specification Criteria

AOI Template ANSI X3.263-1995 : Annex J AOI Template

Waveform Overshoot


Specification 5-30

5.4.3 GBE interface specification 1000BASE-LX 1000BASE-SX

Parameter 62.5m MMF

50m MMF

10m SMF

62.5m MMF

50m MMF

Unit

Transmitter Type Longwave Laser Shortwave Laser

Signaling speed (range) 1.25100ppm 1.25100ppm GBd

Wavelength (, range) 1270~1355 770~860 Nm

Trise/Tfall (max;20%-80%;>830nm) - 0.26 Ns

Trise/Tfall (max;20%-80%;>830nm) - 0.21 Ns

Trise/Tfall (max,20%-80% response time) 0.26 - Ns

RMS spectral width(max) 4 0.85 Nm

Average launch power(max) -3 See footnote (a) dBm

Average launch power(min) -11.5 -11.5 -11.0 -9.5 dBm

Average launch power of OFF transmitter(max) (b)

-30 -30 dBm

Extinction Rate(min) 9 9 dB

RIN(max) -120 -117 dB/Hz

Coupled Power Ratio(CPR) (c) (d) 28


Specification 5-31

Notes of the 1000BASE-SX transmit characteristic: a: The 1000BASE-SX launch power shall be the lesser of the class 1 safety limit as defined by 38.7.2 or the average receive power (max) defined by Table 38-4

b: Examples of an OFF transmitter are: no power supplied to the PMD, laser shutdown for safety conditions, activation of a transmit disable or other optional module laser shut down conditions. During all conditions when the PMA is powered, the ac signal (data) into the transmit port will be valid encoded 8B/10B patterns (this is a requirement to the PCS layers ) except for short durations during system power-on-reset or diagnostics when the PMA is placed in a loopback mode.

c: Radial overfilled launches as described in 38A.2, while they may meet CPR ranges, should be avoided.

Notes of the 1000BASE-LX transmit characteristic:

d: Due to the dual media (single-mode and multimode) support of the LX transmitter, fulfillment of this specification requires a single-mode fiber offset-launch mode-conditioning patch cord described in 38.11.4 for MMF operation. This patch cord is not used for single-mode operation.

Notes of the 1000BASE-CX and 1000BASE-LX receive characteristic:

a1: Measured with conformance test signal at TP3 (see 38.6.11) for BER=10-12 at the eye center.

b1: Measured with a transmit signal having a 9 dB extinction ratio. If another extinction ratio is used, the stressed receive sensitivity should be corrected for the extinction ratio penalty.

c1: Vertical eye-closure penalty is a test condition for measuring stressed receives sensitivity. It is not a required characteristic of the receiver.


Specification 5-32

5.5 The Jitter Index of Interface

5.5.1 Input Jitter and Wander Tolerance

5.5.1.1 PDH Interface

The input jitter and wander tolerance of PDH interface are shown below:

Interface 2048 kbit/s 34368 kbit/s 44736 kbit/s

A0 36.9 137.5 805.4

A1 18 1.5 5.0

A2 1.5 0.15 0.1

Maximum Peak-Peak

Value (UIp-p)

A3 0.2 34.4 f0 1.2 105 Hz 0.01Hz 1.2 105 Hz

f10 4.88 103 Hz 0.032Hz f9 0.01 Hz 0.13Hz f8 1.667 Hz 4.4Hz f1 20 Hz 100 Hz 10 Hz

f2 2.4 kHz 1 kHz 600 Hz

f3 18 kHz 10 kHz 30 kHz

Frequency

f4 100 kHz 800 kHz 400 kHz

Pseudo Random Signal 215 1 223 1 220 1

Characteristic of classic regulator

slope-20dB/10 A0

A3

A1

A2

0 f0 f10 f9 f8 f1 f2 f3 f4Jittering frequency (log)


Specification 5-33

5.5.1.2 SDH Interface

The input jitter and wander tolerance of SDH interface are shown below:

Interface STM-1 STM-4 STM-16

A0 (18 s) 2800 11200 44790 A1 (2 s) 311 1244 4977

A2 (0.25 s) 39 156 622 A3 1.5 1.5 1.5

Maximum Peak-Peak

Value (UIp-p)

A4 0.15 0.15 0.15

f0 1.2 105 Hz 1.2 105 Hz 1.2 105 Hz f12 1.78 104 Hz 1.78 104 Hz 1.78 104 Hz f11 1.6 103 Hz 1.6 103 Hz 1.6 103 Hz f10 1.56 102 Hz 1.56 102 Hz 1.56 102 Hz f9 0.125 Hz 0.125 Hz 0.125 Hz

f8 19.3 Hz 9.65 Hz 12.1

f1 500 Hz 1 kHz 5 kHz

f2 6.5 kHz 25 kHz 100 kHz

f3 65 kHz 250 kHz 1M Hz

Frequency

f4 1.3 MHz 5 MHz 20M Hz

Peak-p jitter and wander

(log)

A0

A1

A2

A3

Slope -20dB/10

Frequency (log)

A4

0 f0 f12 f11 f10 f9 f8 f1 f2 f3 f4


Specification 5-34

5.5.2 Jitter Generation

5.5.2.1 PDH Interface

Frequency of band-pass filter for examination, and the maximum jitter for allowable values in PDH network are shown below.

As to SDH equipment, the PDH interface jitter measured over a 60 second interval shall not exceed these values. On the edge of SDH and PDH system, jitter accepts these values.

Interface Rate 2048 kbit/s 34368 kbit/s 44736 kbit/s

f1 thru f4 1.5 1.5 5.0 Maximum Peak-Peak Value (UIp-p)

f3 thru f4 0.2 0.15 0.1

f1 20 Hz 100 Hz 10 Hz


Frequency of Band-pass Filter

f4 100 kHz 800 kHz 400 kHz

5.5.2.2 SDH Interface

When inputting no jitters, the jitter measured at output port on SDH relay with high-pass filter is not greater than 0.01 UIrms. While no jittering in synchronous input port, the jitters produced at terminal equipment interface should conform to values in the table below, for measuring time surpass 60 seconds.

Interface Tester Filter Maximum Peak-Peak Value (UIp-p) 500 Hz thru 1.3 MHz 0.50 STM-1e

65 kHz thru 1.3 MHz 0.075

500 Hz thru 1.3 MHz 0.50 STM-1

65 kHz thru 1.3 MHz 0.10

1 kHz thru 5 MHz 0.50 STM-4

250 kHz thru 5 MHz 0.10

5 kHz thru 20 MHz 0.50 STM-16

1 MHz thru 20 MHz 0.10


Specification 5-35

5.5.3 Jitter Generation by Mapping

When PDH is mapped into SDH, a mapping jitter is generated. The testing values are smaller than values listed in table below:

G.703 2048

kbit/s G.703 34368

kbit/s G.703 44736

kbit/s

Tolerance 50 ppm 20 ppm 20 ppm

f1 20 Hz 100 Hz 10 Hz Filter Characteristic

-20 dB/dec


f4 100 kHz 800 kHz 400 kHz

f1 thru f4 0.25 0.4 Further study Maximum Peak-Peak Value for Mapping Jitter (UIp-p)

f3 thru f4 0.075 0.075 0.075

5.5.4 Combined Jitter and Wander

Generally, SDH system provides mapping jitter and pointer adjusting jitter whose combinations are called combined jitter. As for combined jitter, four types of the testing series temporarily designated by ITU-T, can basically represent number of conditions for combined jitter.

5.5.4.1 Testing Series

Single pointer with opposite polarity:

T1

a

Regular single pointer adding a double pointer: T20.75s T3=2ms

T2

T3

b NOTE: T2 and T3 are defined f only for 2M. Definition for 34M/45M is further

study.


Specification 5-36

Regular single pointer that leaks a pointer: T2>0.75s

T2 T2 T2 T2 T2 2*T2

c

Double pointer with opposite polarity: T3=2ms

interval>=10s T3T3

d

5.5.4.2 Criterion of Combined Jitter

G.703 2048

kbit/s G.703 34368

kbit/s G.703 44736

kbit/s

Tolerance 50 ppm 20 ppm 20 ppm High-Through Filter f1 20 Hz 100 Hz 10 Hz

f3 18 kHz 10 kHz 30 kHz 20 dB/dec f4 100 kHz 800 kHz 400 kHz

Maximum Peak-Peak Value f1 thru f4 0.4* 0.4/0.75* 0.4/0.75*

for Combined Jitter(UIp-p) f3 thru f4 0.075 0.075 0.075

*: The extreme value 0.4 UI corresponds to pointer testing series shown in a, b and c; the extreme value 0.75 UI corresponds to pointer testing series shown in d, while the extreme value 0.075 UI corresponds to pointer testing series shown in a, b, c and d.

5.5.4.3 MTIE and TDEV

MTIE and TDEV are measured through an equivalent 10 Hz, first-order, low-pass measurement filter, at a maximum sampling time 0 of 1/30 seconds. The minimum measurement period for TDEV is twelve times the integration period (T = 12).


Specification 5-37

When the SEC is in the locked mode of operation, the MTIE measured using the synchronized clock configuration defined in Figure 1a/G.810 should have the limits in Table 5-1, if the temperature is constant (within 1 K):

Table 5-1. Wander Generation (MTIE) with Temperature Stable

MTIE limit Observation interval 40 ns 0.1 < 1 s

40 0.1 ns 1 < 100 s 25.25 0.2 ns 100 < 1000 s

The resultant requirement is shown by the thick solid line in Figure 5-1.

When temperature effects are included, the allowance for the total MTIE contribution of a single SEC increases by the values in Table 5-2.

Table 5-2. Additional Wander Generation (MTIE) with Temperature Affecting

Additional MTIE allowance Observation interval 0.5 ns 100 s 50 ns > 100 s

The resultant requirements are shown by the thin solid line in Figure 5-1.

Figure 5-1. Wander Generation (MTIE)


Specification 5-38

When the SEC is in the locked mode of operation, the TDEV measured using the synchronized clock configuration defined in Figure 1a/G.810 should have the limits in Table 5-3, if the temperature is constant (within 1 K):

Table 5-3. Wander Generation (TDEV) with Temperature Stable

TDEV limit Observation interval 3.2 ns 0.1 < 25 s

0.64 0.5 ns 25 < 100 s 6.4 ns 100 < 1000 s

The resultant requirements are shown in Figure 5-2.

Figure 5-2. Wander Generation (TDEV) with Temperature Stable


Specification 5-39

5.6 External Interface

5.6.1 Orderwire

z E1 OH (overhead): Handset 600 balanced Rx: 2 dBm Tx: 0 dBm

z E2 OH (overhead): Handset 600 balanced Rx: 2 dBm Tx: 0 dBm

z Connector: RJ-11

5.6.2 User Channel

z Accessible OH: F1 or E2; one per SDH interface z Logical Interface: 64 kbit/s V.11

Contra-directional Co-directional

z Connector: RJ-45

5.6.3 Office Alarm

z Accessible Output: One per equipment z Output: PM

DM AB AL

z Type: Relay contact; Open/Loop z Maximum Current: AB/AL: 1A

PM,DM: 500 mA

z Connector: RJ-45


Specification 5-40

5.6.4 Housekeeping Alarm/Control

z Accessible port: Eight for Housekeeping Alarm Four for Housekeeping Control

z Type: HKA [photo-coupler], HKC [relay contact] Open/Loop

z Connector: RJ-45 z Maximum Current/Voltage: (HKC) 0.5 A / 200 V


Specification 5-41

5.7 Environmental Conditions

5.7.1 Temperature

z Intra-Station Range: 0 to +45C

z Intra-Station Short Time: 5 ~ +50C (within 72 consecutive hours; within 15 days a year)

z Storage: 5 to +50C z Transportation: 5 to +50C

5.7.2 Humidity

z Intra-Station Range: 5 to 95 % z Storage: 5 to 95 % z Transportation: 5 to 95 %

5.7.3 Vibration

z Intra-Station Use: 1.5 mm/s2 2-9 Hz 5 m/s2 9-200 Hz 40 m/s2 peak

z Storage: 1.5 mm/s2 2-9 Hz 5 m/s2 9-200 Hz 40 m/s2 peak

z Transportation: 3.5 mm/s2 2-9 Hz 10 m/s2 9-200 Hz 15 m/s2 200-500 Hz 300 m/s2 peak


Specification 5-42

5.8 Power Distribution

5.8.1 Power Interface

z Input Voltage: 38.4 V DC thru 72V DC z Power Input: 100 ~ 380W z Protection: Fuse (15 A DC) z Ground: FG/BG NOTE: FG: Frame ground; or protected ground

BG: Battery return ground

z Maximum Power Supply: Less than 350 W per system.


Specification 5-43

5.8.2 Power Consumption

z Total Equipment Power Consumption: 100 to 380W z PWR Board Capacity: 15A (DC)

The board consumption is shown as below:

Board Max Power Consumption(W) Amount Total Power Consumption(W)

CS 33 2 66 MCP 6.6 1 6.6 STM-16 14.7 6 88.2 STM1/4 (use as STM-1) 6.8 13 88.4 S1E 9.7 10 97 STM1/4 (use as STM-4) 7.2 13 93.6 E12 9.7 11 106.7 E31 6.4 10 64.0 E32 6.4 10 64.0 FE-2 13 13 169 FE-4 16 13 208 GE_A 29.93 13 389.09 THR_E12W 0 11 0 TPS_E12 12 10 120 TPS_S1EW 0.75 5 3.75 TPS_S1EP 0.75 5 3.75 TPS_E3W 0.98 5 4.9 TPS_E3P 0.98 5 4.9 FAN 15 3 45


Specification 5-44

5.9 User Interface

5.9.1 CID Interface

z Physical Layer: f port: RS232C F port: 10BASET

z Protocol: Both OSI and TCP/IP z Connector: f port: the pin assignment between RJ45 and D-sub 9pin

F port: the pin assignment between RJ45 and RJ45 (Shown as below figure)

z Connection: f port: RS232C Cable (Detail refers to Chapter 8) F port: UTP Straight cable (via HUB)

Figure 5-3. RJ45 Connector for f Port

Figure 5-4. D-sub 9-pin Connector for f Port

Figure 5-5. RJ45 Connector for F Port


Specification 5-45

E

5.9.2 NMS

z Physical Layer: F port: 10BASET (Half/10M) z Protocol: Both OSI and TCP/IP z Connector: F port: the pin assignment between RJ45 and RJ45

(Shown as Figure 5-5)

z Connection: F port: UTP Straight cable (via HUB)

5.10 Physical Specification

5.10.1 V-NODE Subrack Dimensions

z Height: 487.6 mm z Width: 524.4 mm (with rack ear) z Depth: 272.3 mm z Weight: 11 Kg (with back panel and filter box, without rear panel)

NOTE:

1. Above dimension includes any projection of subrack.

2. The rearpanel means the PCB board in the back of the V-Node equipment, and the backpanel is a steel board on the back of the V-Node equipment subrack.


1. Overview 2. Reference Standards 3. Equipment Characteristic 4. Network Design using V-Node 5. Specification

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