Fabrication of Very-High-Aspect-Ratio Micro Metal Posts

876 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 20, NO. 4, AUGUST 2011

Fabrication of Very-High-Aspect-Ratio Micro MetalPosts and Gratings by Photoelectrochemical

Etching and ElectroplatingGuangyi Sun, Janet I. Hur, Xin Zhao, and Chang-Jin “CJ” Kim, Member, IEEE

Abstract—A high-yield fabrication process for dense arrays ofvery-high-aspect-ratio (VHAR) freestanding metal posts and grat-ings is developed. Silicon molds of regularly arranged through-holes or trenches are first fabricated by photoelectrochemicaletching. By studying the etching parameters, including geometryconstraint, current density and potential, electrolyte concentra-tion, and etching time, we succeed to produce dense arraysof VHAR holes (depth = 610 μm; diameter = 5 μm;pitch = 14 μm) and trenches (depth = 320 μm; width = 4 μm;pitch = 8 μm) with yields higher than 99% on 2-cm2 processingareas. The VHAR molds are then filled with metals using anew bottom-up electroplating technique, which features anintermittent vacuum degassing to remove the air and hydrogenbubbles from such deep and narrow voids during the plating.Zinc and nickel are successfully electroplated in high quality, andthe freestanding metal structures are obtained by removing thesilicon molds by XeF2 etching. Obtained are maximum aspectratios of 120 : 1 for posts (height = 600 μm; diameter = 5 μm;pitch = 14 μm) and over 60 : 1 for gratings (height = 250 μm;width = 4 μm; pitch = 8 μm) with yields higher than 99% on∼0.5−1-cm2 samples. [2011-0022]

Index Terms—Electroplating, high aspect ratio (HAR), photo-electrochemical (PEC) etching, vacuum degassing, very high as-pect ratio (VHAR), 3-D microbatteries.

I. INTRODUCTION

THE FABRICATION of high-aspect-ratio (HAR) metalstructures is of high interest for many applications of

microelectromechanical systems. For an example, 3-D inte-grated circuits require an array of HAR metal (e.g., copperand nickel) vias formed through a silicon or glass wafer tointerconnect multiple devices or circuit layers [1], [2]. SuchHAR electrical feedthroughs offer significant improvementsover 2-D packaging in response time, integration density, and

Manuscript received January 24, 2011; revised March 25, 2011; acceptedMarch 31, 2011. Date of publication May 27, 2011; date of current versionAugust 3, 2011. This work was supported in part by the Defense AdvancedResearch Projects Agency through Brewer Science, in part by a UC DiscoveryGrant, and in part by the Hughes Research Laboratories. The work of G. Sunand J. Hur was supported in part by the China Scholarship Council (CSC) andNSF IGERT through MCTP, respectively. Subject Editor M. Wong.

G. Sun, J. I. Hur, and C.-J. Kim are with the Mechanical and AerospaceEngineering Department, University of California at Los Angeles, Los Angeles,CA 90095-1597 USA (e-mail: [email protected]; [email protected]; [email protected]).

X. Zhao is with the Institute of Robotics and Automatic Information System,Nankai University, Tianjin 300071, China (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/JMEMS.2011.2148163

reliability. For another example, dense arrays of HAR metal(e.g., zinc and nickel) posts were fabricated to serve as theelectrodes of 3-D microbatteries [3], [4], which produce moreenergy and power than the traditional (i.e., 2-D) batteries on agiven footprint area while sustaining high discharge rates [5].For both the examples, one typically makes a mold by etchingHAR through-holes and fills it with metals by electroplating.However, for the latter example (i.e., the 3-D battery), the moldshould subsequently be removed so that the metals are releasedas freestanding 3-D electrodes.

To fabricate HAR metal structures as demanding as in thesecond example above, two key technological challenges mustbe addressed. One is how to form the mold with HAR through-holes that are only a few micrometers in diameter and in spac-ing. The other is how to fill such deep and narrow through-holeswith no defect. Although deep reactive-ion etching (DRIE) hasbeen widely used for through-wafer etching [1], [2], [6], theopening size is limited to several tens of micrometers, limitingthe aspect ratio to mostly below 20 : 1. Through-wafer DRIEhas other shortcomings, e.g., distortion in the hole diameter(i.e., nonvertical sidewall), local bowing due to the erosion ofetching mask, and footing effect, which affect the quality ofsubsequent metal fillings. An alternative process for through-wafer etching is photoelectrochemical (PEC) etching, whichcan produce deep holes with an aspect ratio greater than100 : 1 [7]. In this paper, we report an optimized PEC etchingof silicon, which can produce dense arrays of very-high-aspect-ratio (VHAR) holes (depth = 610 μm; diameter = 5 μm;pitch = 14 μm) and trenches (depth = 320 μm; width = 4 μm;pitch = 8 μm) with yields higher than 99% on 2-cm2 process-ing areas. On the other hand, such VHAR holes present anunprecedented challenge to fill them with minimal defects (e.g.,voids) by electroplating. Although successful filling through aPEC-etched silicon mold has been reported [8], [9], one cannotassess the structural quality of the metal without removing themold. Moreover, most such fillings were limited to ∼200 μm indepth. To the best of our knowledge, there has been no reportof a dense array of freestanding VHAR micro metal structures,which would demand a high-quality (i.e., defect free and stressfree) filling.

So far, many electroplating techniques, most notably pulseplating [1], [2], [6], have been used to achieve a defect-freefilling, but none reported an aspect ratio close to 100 : 1. Inan effort to obtain dense arrays of VHAR metal structures,we have recently obtained promising preliminary results: densearrays of VHAR (up to 85 : 1) freestanding nickel posts with

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SUN et al.: FABRICATION OF MICRO METAL POSTS AND GRATINGS BY PEC ETCHING AND ELECTROPLATING 877

Fig. 1. Overall process to fabricate the VHAR micro metal posts and gratings, drawn schematically and not to scale. (a) Formation of sharp pits on silicon.(b) PEC etching of VHAR holes or trenches. (c) Deposition of a seed layer and filling the holes or trenches by vacuum-degassed electroplating. (d) Removing thesilicon mold by XeF2 etching.

a high yield (∼97%) obtained by filling an ∼425-μm-thickPEC-etched silicon mold using a vacuum-degassing-assistedelectroplating [10]. Unlike the continuous [11] or on–off [12]vacuum degassing, we used an intermittent degassing mech-anism to remove the trapped air and hydrogen bubbles. Inthis paper, we report further advances: improvement in thePEC etching process to obtain an ∼610-μm-thick silicon mold,leading to dense arrays of freestanding nickel and zinc postsof an increased VHAR (120 : 1) with a higher yield (∼99%).In addition, we report PEC etching of HAR trenches (versuspores) for the mold, leading to a new type of HAR metalstructure—gratings (versus posts), also in dense arrays, for thefirst time.

II. FABRICATION

The overall fabrication processes used to fabricate the VHARmicro metal posts and gratings in this paper are schematicallyshown in Fig. 1. The four principal steps are formation of sharppits [Fig. 1(a)], PEC etching of silicon [Fig. 1(b)], metal filling

by electroplating [Fig. 1(c)], and silicon removal by XeF2

etching [Fig. 1(d)].The first step [Fig. 1(a)] is to form the sharp pits on a silicon

surface needed to start the subsequent PEC etching. An n-type(100) silicon wafer with 40–60-Ω · cm resistivity was used, and∼1500-Å SiO2 was thermally grown on the surface. An arrayof squares or parallel lines of stripes were opened on the oxidelayer using photolithography and a plasma etching, followedby a few seconds of dipping in buffered oxide etch (BOE), toserve as the etching windows for the subsequent KOH etching.Nominally (i.e., on the photomask), the square openings were7 μm on a side in a pitch of 14 μm, and the stripe openingswere 4 μm wide, 8 μm in pitch, and 25 mm long along the〈110〉 direction. The silicon was then etched in 30% KOH at78 ◦C for ∼15 min to form the V-shape pits, which served asthe nucleation sites for the subsequent PEC etching.

After removing the SiO2 layer in BOE, PEC etching startedon a 2-cm-diameter circular area (i.e., ∼3 cm2) of silicon[Fig. 1(b)], dictated by the etching apparatus. A platinum sheetserved as the cathode, and the sample was illuminated from the



back side using a high-power light source (Marubeni AmericaCorporation) operating at 870 nm. The silicon was exposed tothe electrolyte in a 2-cm-diameter circle. The electrolyte was5-wt% hydrofluoric acid (HF) in deionized (DI) water (26 mLof 49% HF in a total volume of 300 mL) for the square patternsand 2.5-wt% HF in DI water (13 mL of 49% HF in a totalvolume of 300 mL) for the stripe patterns. A few droplets of awetting agent (Kodak Photo-Flo) were added to the electrolyteto help remove the hydrogen bubbles generated during theetching, which is very important for VHAR etching. For thePEC etching, a current density of 2 mA/cm2 was used forthe square patterns, and 6 mA/cm2 was used for the stripe pat-terns, while the anodic voltage was independently kept constantat 2 V. After growing to a desirable depth into the silicon, thepores or trenches were opened from the back side by DRIE.

In preparation for the electroplating [Fig. 1(c)], all the sur-faces were covered with a 2000-Å SiO2 by thermal oxidationto prevent metal growth on them during the subsequent electro-plating. Then, the sample was broken into ∼0.5- and ∼1-cm2

rectangular pieces for posts and gratings, respectively, to satisfythe 3-D microbattery project that the process was developed for.Using the small samples, a 100-Å/1000-Å Ti/Ni was depositedon the back side in an e-beam evaporation system (CHA Mark40) as a seed layer, and an ∼30-μm-thick nickel was grownby electroplating at 5 mA/cm2 for 6 h to seal the openings andform the base plate for the eventual freestanding 3-D structures.Next, the back side of the mold was covered with a red polyplating tape 350F (Echo Engineering and Production Supplies,Inc.) to passivate the nickel surface on the back side. Thisnickel, exposed at the bottom of the deep pores or trenches, thenserves as the seed layer for the subsequent bottom-up electro-plating to fill the mold. For the nickel, a commercially availableplating solution (Technic Inc.) was used, and a nickel sheet wasused as the counter electrode during the electroplating. For thezinc, a plating solution was prepared by dissolving zinc sulfate(240 g), ammonium chloride (15 g), aluminum sulfate (30 g),and saccharin (1 g) in 1 L of DI water [13], and a zinc sheetwas used as the counter electrode. To fill the VHAR siliconmolds, we have developed an intermittently vacuum-degassedelectroplating technique, described in the following.

An important challenge against the mold-based fabricationof metal microstructures has been the gas trapped in themold, which would introduce voids in the metal or even blockthe growth of the metal. So far, most known electroplatingprocesses use a small amount of surfactant to help wet the plat-ing mold. This simple method works well for relatively low as-pect ratio and even HAR molds in some cases but unfortunatelynot for VHAR molds (e.g., 100 : 1). Alternatively, vacuumdegassing has been known to be effective in removing the gasesduring electroplating. An early solution [11] was to evacuatethe air space above the plating bath and maintain the pressurelower than the atmospheric pressure during the electroplating.Although a smooth and pit-free surface was reported on a flatsurface (i.e., no holes), the evaporation of water was significantdue to the vacuum bath, requiring a complex apparatus andoperation for feedback control. More importantly, if adopted forthe electroplating of VHAR molds, this vacuum-plating methodwould hurt rather than help because the vacuum would make

even a small amount of gas expand to form bubbles and blockthe electroplating in the mold. Another degassing method [12]repeated vacuum and venting several times before electroplat-ing started, drawing the initially trapped air bubbles out fromthe cavities and dislodging them from the surface. However,without an effective degassing during the electroplating, it wasdifficult to remove the hydrogen accumulated after the platingprocess started. Unlike all the existing vacuum-electroplatingmethods, our technique, first introduced preliminarily in [10],uses an intermittent degassing mechanism, as schematicallyshown in Fig. 2. To remove the air initially trapped when themold was immersed in the plating solution, the pressure inthe plating bath is lowered before electroplating started. Oncethe electroplating starts, on the other hand, the bath is evacuatedand vented periodically (e.g., hourly) to remove the hydrogenaccumulated. Both nickel and zinc were electroplated using thistechnique.

Finally, to obtain the freestanding micro VHAR metal struc-tures, the silicon molds were removed by a gas-phase XeF2

etching at 3000 mtorr for ∼1.5 h (60 cycles of a 90-s pulse). Thethin SiO2 surrounding the metal sidewalls was also removedduring the XeF2 etching mostly due to the poor adhesion to themetal surface and not-optimized etching selectivity [Fig. 1(d)].

III. RESULTS AND DISCUSSION

A. PEC Etching of the Pore Structure

The PEC etching of pores has been widely studied, andaspect ratios over 100 : 1 have been reported multiple times[7], [14], [15]. However, most reported etching depths werelimited to less than 500 μm. According to the discussionin [16], the maximum obtainable pore depth can be around500 μm, using a low-concentration electrolyte, low temper-ature, and long etching time. The main limitation is a longdiffusion of the electrolyte as the pores grow deeper. In thisstudy, first, we performed the PEC etching using an ∼540-μm-thick silicon wafer at a current density of 2 mA/cm2. Fig. 3(a)shows the cross-sectional picture of the 530-μm-deep poresformed after 750 min of etching while maintaining the porediameters at ∼5 μm, which is similar to the maximum depthreported in [10]. We encountered no fundamental reason for thepores to not grow deeper as long as a proper current density isused. Therefore, we further performed the PEC etching using a680-μm-thick silicon wafer to explore deeper pores, using thesame current density of 2 mA/cm2. Fig. 3(b) shows 610-μm-deep pores formed after 960 min of etching while maintain-ing the same pore diameters of ∼5 μm. Although it mayseem that the pores can grow even deeper by simply increas-ing the etching time, further exploration revealed that thepores tend to degenerate eventually. Fig. 3(c) shows such alimitation—degenerated pores after growing ∼630 μm deep at1140 min of etching. As the pores grow deeper, the electrolyteconcentration at the etching front continues to decrease, causingthe degeneration eventually, as reported in [16]. A possiblesolution is to use a current density adjusting as the holes deepenor to devise a mechanism to refresh the electrolyte, preventingthe rapid decrease in electrolyte concentration.



Fig. 2. Schematic illustration of vacuum-degassed electroplating with intermittent vacuuming, first introduced in [10].

Fig. 3. Formation of VHAR pores (diameter = 5 μm; pitch = 14 μm) by PEC etching of silicon under the conditions detailed in the main text. (a) After750-min etching (depth = 530 μm) of 540-μm-thick silicon. (b) After 960-min etching (depth = 610 μm) of 680-μm-thick silicon. (c) Degeneration of poresafter growing ∼630 μm deep at 1140 min of etching mostly due to the decreasing electrolyte concentration in the pores.

B. PEC Etching of the Trench Structure

Unlike deep pores, deep trenches by PEC etching have notbeen studied much until recently [17]–[19]. In addition to theneed of V-grooves (rather than reverse pyramids) for nucleation,the etching of trenches is different from that of pores in termsof the required current density. For pores, the current densityJ can be much smaller than the critical current density Jps,

which is exclusively dependent on the electrolyte concentration.For example, the pores in the previous section were formedwith J = 2 mA/cm2 and Jps ≈ 43 mA/cm2 (i.e., 5-wt% HF).However, one cannot form deep trenches properly under thesame condition. Fig. 4 shows the result with J = 2 mA/cm2

and 2 V in 5-wt% HF. Not trenches but some randomly locatedpores were formed. After detailed examinations, we explain the



Fig. 4. Unsuccessful PEC etching of trenches. (a) Cross-sectional view of silicon diced perpendicular to the stripes. (b) Cross-sectional view of silicon dicedparallel to the stripes.

Fig. 5. Schematic top views of the V-grooves, illustrating the unsuccessful and successful initial PEC etching to form trenches. (a) Insufficient current densityleads to discrete pores, some of which grow deep. (b) Sufficient current density leads to merged pores, which grow as trenches.

failure as follows. Because the etching current density was toosmall (J = 2 mA/cm2) compared with the critical current den-sity (Jps = 43 mA/cm2), the initial PEC etching could not formcomplete trenches along the nucleation grooves, resulting inmany discrete pores starting to form in the grooves, as describedschematically in Fig. 5(a) viewed from the top. To succeed, thepores must be dense enough to merge as a continuous trench,as shown in Fig. 5(b), which would require a higher currentdensity. In our study, a ratio of J/Jps = 0.4 was found goodenough to etch 4-μm-wide trenches spaced by 4 μm (i.e., apitch of 8 μm). Following this ratio, we applied J = 6 mA/cm2

at 2 V, using 2.5-wt% HF (Jps ≈ 15 mA/cm2). Fig. 6(a) and(b) shows 220- and 320-μm-deep trenches after etching for540 and 840 min, respectively. The obtained trenches werefound to have good uniformity (in width, depth, and sidewallsmoothness) over the entire processing area (∼3 cm2).

Compared with the deep pore etching, the deep trench etch-ing degenerates more easily, which limits the etching depth.As described previously, the trench etching is more sensitiveto the current density and the ratio of J/Jps. Although anoptimized current density can alleviate the degeneration, Jps

changes appreciably as the pores grow deep. If J is kept

constant, the trenches will modify their widths according tothe changing J/Jps. Once the parameters deviate from a stableetching condition, some adjacent trenches will start to merge,and others branch out and stop growing eventually. Anotherissue limiting the etching depth is that the etching rate in2.5-wt% HF is much lower than that in 5-wt% HF. Currently,for the 5-wt% HF electrolyte (Jps = 43 mA/cm2), our appara-tus could not provide a stable and high enough current densityto fulfill a ratio of J/Jps = 0.4 during the etching, mostly dueto the insufficient light intensity. We expect deeper trenches inthe future by utilizing an adjustable current density, devisingan electrolyte refreshment mechanism, and resorting to a morepowerful light source.

C. Freestanding Micro Metal Posts

To fill the VHAR molds (e.g., Figs. 3 and 6), the exist-ing electroplating techniques were unsatisfactory, mostly be-cause the gases trapped inside the narrow and deep voidsbecome more difficult to remove as the aspect ratio increases.Successful fillings of HAR holes and release of HAR metalstructures have been reported [20], [21], but the aspect ratioswere mostly lower than 20 : 1. Although filling of VHAR holes



Fig. 6. Formation of deep trenches (width = 4 μm; pitch = 8 μm) by PEC etching of silicon under the conditions detailed in the main text. (a) After 540 minof etching (depth = 220 μm; aspect ratio = 55 : 1). (b) After 840 min of etching (depth = 320 μm; aspect ratio = 80 : 1).

Fig. 7. HAR metal posts obtained using regular electroplating (i.e., without vacuum degassing), showing many missing posts. (a) Zinc posts (height = 250 μm).(b) For an intended height of 500 μm, only a few short posts were found standing.

Fig. 8. Dense array of 500-μm-tall freestanding Zn posts (diameter = 5 μm; pitch = 14 μm; aspect ratio = 100 : 1) processed over a 0.5-cm2 rectangularsample with 99% yield.

(200-μm-deep holes of 100 : 1 aspect ratio) has been reported[8], the metal was not released as freestanding structures.While the yield of through-hole etching is easily estimated byinspecting the openings on the opposite side, the quality offilling cannot be assessed reliably until the mold is removed.Fig. 7 shows the results for micro posts without using a vacuumdegassing. Fig. 7(a) is for Zn posts made from a mold with250-μm-deep pores. Although the aspect ratio shown here isnot very high (< 50 : 1), many posts were found missing, bent,

and having different heights. Fig. 7(b) is for Ni posts made froma VHAR mold of 500-μm-deep pores of 100 : 1 aspect ratio.Few posts were found standing, and they were even shorter than100 μm.

Using the intermittently vacuum-degassed electroplating, wewere able to obtain a high-quality filling of both zinc andnickel. To obtain high hardness and low internal stress, rela-tively low current densities of 5–30 mA/cm2 for nickel and15–30 mA/cm2 for zinc were used. Fig. 8 shows the VHAR zinc



Fig. 9. Dense array of 600-μm-tall freestanding Ni posts (diameter = 5 μm; pitch = 14 μm; aspect ratio = 120 : 1) processed over a 0.5-cm2 rectangularsample with 99% yield.

posts (diameter = 5 μm; pitch = 14 μm; height = 500 μm;aspect ratio = 100 : 1) freestanding after XeF2 etching of thesilicon mold. After placing the mold in the plating bath andbefore the electroplating, the plating tank (the gas above thesolution, to be exact) was pumped out to remove the air trappedin the pores. The plating started at a lower current density of15 mA/cm2 for 2 h and continued at a higher current densityof 30 mA/cm2 for 10 h at a room temperature. During theelectroplating, the plating tank was pumped out hourly toremove the H2 accumulation. Fig. 9 shows the VHAR nickelposts (diameter = 5 μm; pitch = 14 μm; height = 600 μm;aspect ratio = 120 : 1) freestanding after XeF2 etching of thesilicon mold. In this case, the plating consisted of three sequen-tial phases: 5 mA/cm2 for the first 20 h, 10 mA/cm2 for themiddle 20 h, and 30 mA/cm2 for the last 8 h. The degassingwas performed every 2 h during the plating. The lowest currentdensity in the beginning was for slow H2 generation at thebottom of the pores, where the gas is most prone to be trapped.As the metal starts to grow up from the bottom and the poresbecome shorter, the current density was raised to increase theplating speed and reduce the total plating time (i.e., 48 h).Compared with our previous result of the micro metal posts [3],the aspect ratio has increased significantly (25 : 1 → 120 : 1),as has the yield (∼ 40% → ∼ 99% over a similar sample sizearound 0.5 cm2) and uniformity, which is critical for manyapplications.

Note that the metal posts (Figs. 8 and 9) appear irregularcompared with the holes of the silicon mold (Fig. 3). Wewould like to emphasize that the deformation was caused by the“postprocessing” performed to prepare cross-sectional surfacesfor the visualization rather than by the inherent properties ofthe plated metal. First, note that the posts are a metal and gointo plastic deformation above a yield stress, while the siliconmold is a ceramic and returns to the original shape after anydeformation (unless broken). Most of all, the process of makinga cross-sectioned sample deformed some of the electroplatedmetal structures. During the procedures of cleaving the metal-filled mold samples and polishing their cleaved side surfaces,the metals must have experienced strains above their yieldpoints. Note that the cleaving caused a strain of more than ∼5%needed to fracture silicon; this is much larger than the yieldstrain of most metals (e.g., 0.02% for nickel). While silicon

(a ceramic) goes through a large strain for the cleavage andcomes back to the original shape with no memory, metals builda residual stress in them when they deform plastically andreturn to the original shape. When the VHAR structures arefreed by removing the silicon, the built-in stress in them wouldmake them bend. In addition, the SEM process caused an imagedistortion because the VHAR posts bent under the high electricfield inside the SEM chamber. For example, the posts in Fig. 8looked much straighter under different viewing angles.

D. Freestanding Micro Metal Gratings

Next, we filled the trench mold [Fig. 6(b)] with nickelby electroplating and released it as freestanding gratings (orplates) by etching silicon. Fig. 10 shows the obtained nickelgratings (width = 4 μm; pitch = 8 μm; height = 250 μm;aspect ratio > 60 : 1) with a 100% yield and a very gooduniformity over the entire sample area of ∼1 cm2. Duringthe plating, a current density of 10 mA/cm2 was applied for20 h, and vacuum degassing was applied hourly. For our3-D battery applications, this type of electrodes is expected toprovide a better mechanical stability over the post electrodeswhile maintaining a similar battery performance.

E. Further Discussion

The PEC etching setup used in this paper was developed in-house for laboratory research and can process samples up to2 cm2. The electroplating setup was also developed in-houseand produced VHAR metal structures of ∼0.5 and 1 cm2 inarea—the sample size needed for our 3-D microbattery research[3], [4]. All the results in this paper, including the yields, havebeen based on 20 samples produced for the 3-D microbatteryproject through at least 15 times of different fabrication runs.To our knowledge, no wafer-scale apparatus is commerciallyavailable yet that can produce our reported results.

Material properties of the VHAR metal structures, e.g.,hardness, stress, and electrical conductivity, are important formost applications. Full measurement and characterization havenot been attempted in this paper because of the challengesassociated with their small features (e.g., diameter = 5 μmand pitch = 14 μm). Instead, we inquired into the mater-ial properties through high-magnification visual inspections



Fig. 10. Dense array of 250-μm-tall freestanding Ni gratings (width = 4 μm; pitch = 8 μm; aspect ratio > 60 : 1) processed over an ∼1-cm2 rectangularsample with 100% yield. Some plates were stuck together by Ni plastic deformation and stiction when the sample was cleaved to reveal the cross section. All theplates were found freed away from the cleaved edges.

Fig. 11. Visual inspection using SEM pictures concluded that the electroplated metals were of good quality. No void was found.

(e.g., Fig. 11). The plated metal was found to be of high qualitywith no crack or voids and of very fine grains estimated lessthan 50 nm in size.

With respect to applications, although we do not report here,the results obtained in this paper can be immediately appliedto our 3-D microbattery research [3], [4]. For example, a sig-nificant increase in the charge per area (mAh/cm2), commonlycalled areal energy density, can be obtained by increasing theaspect ratio of the electrodes in a 3-D zinc–air battery, whichrepresents an important design criterion for 3-D batteries. Thereported fabrication is also useful to other applications, e.g., athrough-silicon via and a microcooling device.

IV. CONCLUSION

Dense arrays of micro metal posts and gratings of VHARwere fabricated with a high yield (> 99% on an ∼0.5−1-cm2

sample) by a well-tuned PEC etching of silicon and a custom-developed electroplating of metals. Silicon molds with through-holes (diameter = 5 μm; pitch = 14 μm; depth = 600 μm;aspect ratio = 120 : 1) and trenches (width = 4 μm; pitch =8 μm; depth = 320 μm; aspect ratio = 80 : 1) have first beenprepared by PEC etching with a high yield (99% on 2-cm2

processing areas). By developing an intermittently vacuum-degassed electroplating and filling the deep voids in the VHARmold using the new plating technique, after removing the mold,we were able to obtain freestanding micro metal posts of aspect

ratio up to 120 : 1 and gratings over 60 : 1. Compared withthe previous report, the aspect ratio of the posts was signifi-cantly improved (25 : 1 → 120 : 1 for posts). Often more impor-tantly for applications, e.g., 3-D microbatteries, the processingyield and structure uniformity were dramatically improved(∼40% → ∼ 99%). This reporting of the micro metal gratingsis the first to our knowledge. Our immediate goal is to utilize thetechnology to fabricate VHAR zinc posts and gratings as 3-Delectrodes to develop zinc–air microbatteries of higher energydensity and discharge rate.

ACKNOWLEDGMENT

The authors would like to thank Prof. B. Dunn and his groupfor the many helpful discussions.

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Guangyi Sun received the B.S. degree in computerscience and technology from Tianjin University,Tianjin, China, in 2004, and the M.S. and Ph.D.degrees in control theory and control engineeringfrom Nankai University, Tianjin, in 2007 and 2010,respectively.

From 2008 to 2010, he was an Exchange Stu-dent at the University of California at Los Angeles,where he is currently a Postdoctoral Researcher.His research interests are in microelectromechanicalsystems and nanotechnology.

Janet I. Hur received the B.S. degree in mechanicalengineering from Sogang University, Seoul, Korea,in 2007, and the M.S. degree from the Universityof California at Los Angeles in 2009, where sheis currently working toward the Ph.D. degree inmechanical and aerospace engineering.

Her research interest is in miniature power sourcessuch as microbatteries and micro fuel cells.

Xin Zhao received the B.S. degree in control the-ory and control engineering from Nankai University,Tianjin, China, in 1991, the M.S. degree in controltheory and control engineering from the ShenyangInstitute of Automation, Chinese Academy of Sci-ences, Shenyang, China, in 1994, and the Ph.D. de-gree in control theory and control engineering fromNankai University in 1997.

In 1997, he joined the faculty of Nankai Univer-sity, where he is currently a Professor and the ViceDirector of the Institute of Robotics and Automatic

Information System and the Vice Chairman of the Department of Automationand Intelligence Science. His research interests are in micromanipulation andnanomanipulation systems, including the visualization, design, and fabricationof microsystems and nanosystems, and numerical simulation in biology.

Prof. Zhao was the recipient of the 1999 Excellent Professor Award fromNankai University, the 2000 Inventory Prize from the Tianjin Municipal Gov-ernment, the 2002 Excellent Professor Award of the “College Key TeachersFund,” Ministry of Education, the 2002 Excellent Professor Award of the“Baogang Fund,” and the 2007 Program for New Century Excellent Talentsin University of the Ministry of Education.

Chang-Jin “CJ” Kim (S’89–M’91) received theB.S. degree in mechanical engineering from SeoulNational University, Seoul, Korea, the M.S. degree inmechanical engineering from Iowa State University,Ames, and the Ph.D. degree in mechanical engineer-ing from the University of California at Berkeley,in 1991.

Since joining the faculty at the University ofCalifornia at Los Angeles (UCLA) in 1993, he hasdeveloped several microelectromechanical systems(MEMS) courses and established a MEMS Ph.D.

major field in the Mechanical and Aerospace Engineering Department in 1997.Directing the Micro and Nano Manufacturing Laboratory, he is also a FoundingMember of the California NanoSystems Institute, UCLA. He has also beenactive in the commercial sector as a Board Member, a Scientific Advisor,a Consultant, and the Founder of start-up companies. His research interestsare in MEMS and nanotechnology, including the design and fabrication ofmicrostructures/nanostructures, actuators, and systems, with a focus on the useof surface tension.

Prof. Kim has served on numerous technical committees and panels, includ-ing Transducers, the IEEE International Conference on MEMS, and the Na-tional Academies Panel on Benchmarking the Research Competitiveness of theU.S. in Mechanical Engineering. He is currently serving on the Editorial Advi-sory Board for the IEEJ Transactions on Electrical and Electronic Engineeringand on the Editorial Board for the JOURNAL OF MICROELECTROMECHAN-ICAL SYSTEMS. He was the recipient of the Graduate Research ExcellenceAward from Iowa State University, the 1995 TRW Outstanding Young TeacherAward, a 1997 NSF CAREER Award, the 2002 ALA Achievement Award, andthe 2008 Samueli Outstanding Teaching Award. He is a Fellow of the AmericanSociety of Mechanical Engineers (ASME).


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