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Fall 2012: FCM 708 Fall 2012: FCM 708 Foundation IFoundation I
Prof. Shamik Sengupta
Email: [email protected]
What is the course about?
An accelerated and selective introduction to three cornerstones of computer science
Introduction to Computer Architecture Computer Networking Operating systems
Goals: Learning design and implementation of modern computer systems and
networks… Concepts and Practice Enjoy…
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Timing and Contact Information
Class meeting time: Thursday (6:15pm – 8:15pm)
Office hours and location:
– Office # 06.65.18 New Building – Thursday, 5pm – 6 pm or whenever my office door is open or by appointment
Email: [email protected] (Subject: FCM 708) Office Phone: 212-237-8826 Instructor’s Website: http://jjcweb.jjay.cuny.edu/ssengupta/ Blackboard Website: http://doitapps.jjay.cuny.edu/blackboard/
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Course Material Information
No single textbook Class notes and slides References to current materials from journals and magazines Reading materials from Ebooks from Library
– Make sure to have active account at library
Optional Reference Texts: 1. Computer Organization and Design: The Hardware/Software Interface (The
Morgan Kaufmann Series in Computer Architecture and Design), by David A. Patterson and John L. Hennessy
2. Operating System Concepts, by Abraham Silberschatz, Peter B. Galvin, Greg Gagne
3. Computer Networking: A Top-Down Approach by James F. Kurose and Keith W. Ross
4. Computer Networks by Andrew S. Tanenbaum
5. Fundamentals of Digital Logic and Microcomputer Design, 5th Edition by Mohamed Rafiquzzaman (also partially available in google extended preview)
6. http://www.ece.rutgers.edu/~marsic/books/QoS/ (online available)
7. http://inl.info.ucl.ac.be/CNP3 (online available)
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Course Syllabus Overview
Introduction to Computer Architecture Number systems, Boolean logic gates, Hardware Logic Simulator Assembly language programming
Introduction to Computer Networks Internet Protocol Stack Application layer, Transport layer, Network layer, Link layer Practical understanding with wireshark
Intro to Operating systems Process management Memory management Distributed systems, protection and security
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Method of Assessment
Course work approx %
Two non-cumulative examinations 40%
One final cumulative examination 20%
Homework assignments 20%
One term project 20%
Late policy Submission will not be accepted after due date Permission needed for exceptional circumstances
Attendance needed.
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Project & Presentation
Project: (Approx. 15 weeks time)– Individual Project or 2-person team project– Collaborated project is expected to show synergy– The project paper is due at the last day of class along with presentation
– Dec 6, 2012
Decide your topic as soon as possible and discuss with me. Start as early as possible.
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Grading Scale
Final Grade Final Range
A >=85 & <=100
A- >=80 & <85
B >=75 & <80
B- >=70 & <75
C >=65 & <70
C- >=60 & <65
D >=50 & <60
F <50
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Questions…??Questions…??
Lecture 1Lecture 1Intro to Computer ArchitectureIntro to Computer Architecture
What is in a Computer System?
Computer system structure can be divided into three components:
– Hardware – provides basic computing resources– CPU, memory, I/O devices
– Without the hardware, computation would have been impossible
– Application programs – define the ways in which the system resources are used to solve the computing problems of the users
– Word processors, compilers, web browsers, database systems, video games
– Operating system – “the manager”– Controls and coordinates use of hardware among various applications
and users
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Computer System Structure
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Computer System Structure• Major components of the computer hardware - the processor, the control unit, one or more
memory ICs, one or more I/O ICs, and the clock
• A single printed circuit board usually connects the ICs, making it a microprocessor
• Microprocessor – brain of the computers (analogous to human brains)
• Responsible for processing of the instructions coming from the software
An interesting fact!– At the lowest hardware level, every operation is performed using logic gates and electric signals
(presence or absence of electric signal)
Image courtesy: Google
FCM 708: Sengupta
Number SystemsNumber Systems
Representation of Numbers
Human: decimal number system– Radix-10 or base-10
– Base-10 means that a digit can have one of ten possible values– 0 through 9.
Computer: binary number system– Radix-2 or base-2
– Each digit can have one of two values– 0 or 1
FCM 708: Sengupta
Decimal
These number systems are positional
Multi-digit numbers are interpreted as in the following example
79310
= 7 x 100 + 9 x 10 + 3= 7 x 100 + 9 x 10 + 3
= 7 x 10= 7 x 1022 + 9 x 10 + 9 x 1011 + 3 x 10 + 3 x 1000
We can get a general form of this– ABCbase
– A x (base)2 + B x (base)1 + C x (base) 0
Indicate positionsIndicate positions
Remember that the position index starts
from 0.
Remember that the position index starts
from 0.
FCM 708: Sengupta
Binary
Numbers are represented using the digits 0 and 1.
Multi-digit numbers are interpreted as in the following example
101112
= 1 x 2= 1 x 244 + 0 x 2 + 0 x 233 + 1 x 2 + 1 x 222 + 1 x 2 + 1 x 211 + 1 x 2 + 1 x 200
= 1 x 16 + 0 x 8 + 1 x 4 + 1 x 2 + 1 x 1 = 1 x 16 + 0 x 8 + 1 x 4 + 1 x 2 + 1 x 1
Bit: Each digit is called a bit(Binary Digit) in binary
Important! You must write all bits including leading 0s, when we say 8-bit binary.– E.g., 000000101112 (8-bit binary)
EX: Interpret the binary number 010101102 in decimal
FCM 708: Sengupta
We have now learnt how to convert from binary to decimal– Using positional representation
But how about decimal to binary– Simply keep dividing it by 2
– Remainders give the digits, starting from the last remainder
Let’s look at some examples…
Conversion
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Hexadecimal
Computers use binary number system because of the electric voltage (high or low voltage)– Mostly 8-bit (1 byte)
– Very difficult to express
Hexadecimal to rescue– Hexadecimal system is interface between human brain and computer brain
– 4 bits are read together and represented using a single digit– Such 4-bits are known as nibble
How many different numbers can be represented using 4 bits?– 16
– Represented by the symbols 0-9 and A-F where the letters represent values: A=10, B=11, C=12, D=13, E=14, and F=15
Thus each byte is two hex digits
EX: Binary: 110010102
– How to represent this in hex?
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Conversion: Hex and decimal
Hex to decimal– Exact similar to binary to decimal
– Use base 16
– Try CA16
Decimal to Hex– Divide by 16
– Try 20210
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Notes on Bases
Subscript is mandatory at least for a while.– We use all three number bases.
– When a number is written, you should include the correct subscript.
Pronunciation– Binary and hexadecimal numbers are spoken by naming the digits
followed by “binary” or “hexadecimal.”
FCM 708: Sengupta
Ranges of Number Systems
System Lowest Highest Number of values
4-bit binary
(1-digit hex)
00002
010
016
11112
1510
F16
1610
8-bit binary
(2-digit hex)
0000 00002
010
0016
1111 11112
25510
FF16
25610
16-bit binary
(4-digit hex)
0000 0000 0000 00002
010
000016
1111 1111 1111 11112
6553510
FFFF16
6553610
n-bit binary ? ? ?Ranges of Unsigned Number Systems
FCM 708: Sengupta
How about negative numbers
Decimal systems have a minus sign to represent negative numbers
No such scope in binary system– How to solve the problem?
Use the leftmost bit to represent sign (positive or negative)– ‘0’ means positive
– ‘1’ means negative
Rest of the bits represent the actual number– For a n-bit number, leftmost bit is the sign bit and rest (n-1) the content
– Two approaches were introduced– sign magnitude approach
– One’s complement approach
FCM 708: Sengupta
Both the approaches have a major limitation!
+0 and -0 have two different representations!
To overcome the problem, a new system was proposed– Two’s complement
– Similar to one’s complement system
– Solves the drawback.
How about negative numbers (contd.)
FCM 708: Sengupta
Representing two’s Complement Number
Negate a number:– Generate a number with the same magnitude but with the opposite
sign.
– Ex: 41 -41
Two steps in binary systems– 1. Perform the 1’s complement (flip all the bits)
– 2. Add 1.
– Ex: Negate 001010012c (4110)– 1. Flip all the bits: 110101101. Flip all the bits: 11010110
– 2. Add 1: 11010110 + 1 2. Add 1: 11010110 + 1 11010111 110101112c2c (- 41 (- 411010))
FCM 708: Sengupta
2’s Complement Binary Numbers
Bin Decimal
0000 0000 0
0000 0001 1
0000 0010 2
… …
0111 1110 126
0111 1111 127
1000 0000 -128
1000 0001 -127
… …
1111 1110 -2
1111 1111 -1
FCM 708: Sengupta
Ranges of Signed Number Systems
System Lowest Highest Number of values
4-bit binary 10002
-810
01112
710
1610
8-bit binary 1000 00002
-12810
0111 11112
12710
25610
16-bit binary 1000 0000 0000 00002
-3276810
0111 1111 1111 11112
3276710
6553610
FCM 708: Sengupta
Hardware ArchitectureHardware Architecture
Intro to Comp Architecture
A simplified model of the structure Central Processing Unit (CPU)
– Arithmetic & Logic Unit (ALU)
– Control Unit (CU)
– Register Array
System Bus Memory
ALU Control
Unit
RegistersProgram Counter (PC)
Instruction Register (IR)
Accumulator (ACC)
Memory Address Register (MAR)
Memory Buffer Register (MBR)
Flag registers
Memory
Control Bus Data Bus Address Bus
System Bus
CPU Bus
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Arithmetic & Logic Unit (ALU)
ALU responsible for executing operations of arithmetic or logical nature
– Works with register array, specifically accumulator and flag registers
– Accumulator holds the results of operation performed by ALU
– Flag registers indicate through several bit flags the nature of the result
Computation tasks performed by ALU– Addition and subtraction
– Multiplication and division
– Comparisons and logical tests
– Bit shifting
An interesting fact!– At the lowest hardware level, every operation is performed using logic gates and
electric signals (presence or absence of electric signal)
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Control Unit (CU)
Control Unit (CU) responsible for controlling the processor operations– Heart of the CPU
CU divided into three components– Decoder
– Decode the instructions that make up a program
– Break every instruction into three components– Opcode
– Operand
– Addressing mode
– Clock– Responsible for keeping synchronization throughout the microprocessor
– Send pulse at regular intervals
– Governed by processor clock speed
– Control Logic Circuits– Depending on the decoded instructions, create simple logic circuits and send around
processor
– These control signals inform ALU and register array about what actions they need to perform
By using various logic gates, we will study control logic circuits using Multimedia logic simulator (next class)
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Register Array
Register array – memory locations within CPU itself– Different from actual memory
– Register access are faster than memory access
– Processors normally contain a register array for accessing quick information during the execution of a program
ALU Control
Unit
RegistersProgram Counter (PC)
Instruction Register (IR)
Accumulator (ACC)
Memory Address Register (MAR)
Memory Buffer Register (MBR)
Flag registers
Memory
Control Bus Data Bus Address Bus
System Bus
CPU Bus
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Register Array (2)
Register types– Program counter (PC)
– Used to hold the memory address of the next instruction that would be executed
– Instruction register (IR)– Used to hold the current instruction in the processor while it is being decoded and executed
– Accumulator (A or ACC)– Used to hold the result of operations performed by ALU
– Depending on microprocessor architecture, there might be more than one ALU
– The size of the accumulator corresponds to the size of the processor– 16-bit or 32-bit microprocessor
– Memory address register (MAR)– Used to hold memory addresses of the instructions held in the IR
– Memory Buffer Register (MBR)– When an instruction or data is obtained from the memory, it is first placed in the MBR
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Register Array (3)
Register types– Flag registers (also known as status registers)
– Mostly bit registers– Z-flag (zero flag): indicates if the result of an operation is zero
– C-flag (carry flag): indicates if there is a carry in an operation
– S-flag (sign flag): used to indicate sign of the result
– P-flag (parity flag): used for parity checking
– V-flag (overflow flag): used for overflow checking
– Index register, X and Y, primarily used to hold addresses
– General purpose registers
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System Bus
System bus responsible for data communication between the major components of the microprocessor
Three components– Control bus
– Address bus
– Data bus
Control bus carries the signal relating to the control and co-ordination– Example: read, write, reset control signaling
Address bus carries the signal relating to the addresses in the memory– Unidirectional (from control unit to memory)
– Width of the address bus corresponds to the memory capacity
Data bus used for carrying data– Bidirectional
– Width of the data bus can be 8-bit, 16-bit, 32-bit etc.
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Memory Model
Programmers usually visualize memory as a bunch of sequential spaces
Each space has a unique address that is used to refer the location
Bit size of the address– The number of bits used for the address
bus limits the number of memory location
The way in which the microprocessor stores data
0000
B6A128
A129
A12A
FFFE
FFFF
C1
12
.
.
.
73
B6
.
.
.
32
FCM 708: Sengupta
CPU operation
What we have covered so far– Structure and architecture of the microprocessor
Now– How the microprocessor is used to execute a program
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Program execution
Program – a series of instructions for performing some particular task along with data
The executable is nothing other than machine code in binaries understandable by microprocessor
When the user chooses to execute the program, the code is first loaded into the memory
The CPU then executes the program from memory, processing each instruction in turn
This process is called instruction execution cycle
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The instruction set is a collection of pre-defined machine codes recognizable by the CPU
– Different processors have different instruction sets for different features, different operational capabilities
– But the general structure is same
– Opcode, addressing mode and Operand
– Opcode: a short code to indicate which operation to perform– Opcodes are also given short names (known as mnemonics) for assembly language purpose and human
readability
– Operand: indicate the data or where the data can be found
– Addressing mode: govern the mode of the addressing, help to specify whether the operand is the data itself or the address where the data can be found (will cover more)
– Length of machine code can vary, common length vary from 2 bytes to 12 bytes
Instruction set
OpcodeAddr
modeOperand(s)
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Instruction execution cycle
Instruction execution cycle is the cycle by which each instruction in a program is processed
The cycle is divided in three parts– Fetch instruction
– Decode instruction and
– Execute instruction
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How “Fetch” works
ALU Control
Unit
RegistersPC:
IR:
ACC:
MAR:
MBR:
Memory
C000. Instr1
C001. Instr2
C002. Instr3
C003. …
C004. …
C005. …
Control Bus Data Bus Address Bus
System Bus
CPU Bus
C000
C000
Instr1
CU checks MAR and requests the corresponding
address content in memory (Fetch)Fetched instruction (Insrt1) is stored in MBR And then in IR
Instr1C001
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Decode & Execute
Once the instruction has been fetched, the next step is to decode and then execute
Decode– Check the unique opcode
– Example, opcode mnemonic: LDAA, STAA etc. (of course these will be in machine code binary for the microprocessor)
– Next check the addressing mode bits
The addressing mode along with operand specifies where the data can be found
The most common addressing modes– Immediate addressing
– The data is located within the operands itself, no extra lookup is necessary
– Fastest but most inflexible
– Direct addressing– The operand specifies the address in the memory where the data is located
– Indexed addressing– Addressing is used with relative to index registers, most popular use in arrays
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Hands-on Practice
Let us have some hand-on experience of what we have learnt so far
We will use a simple microprocessor simulator– Motorola 68HC11
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Reading
1. Representation of numbers (In BB)
2. Tips for bits, bytes and other conversions (In BB)
3. Computer design and architecture by Sajjan G. Shiva (John Jay Library electronic resource)– Chapter 4: A simple computer: organization and Programming
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