Flash Eprom Am29f010b

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  • July 2003

    The following document specifies Spansion memory products that are now offered by both AdvancedMicro Devices and Fujitsu. Although the document is marked with the name of the company that orig-inally developed the specification, these products will be offered to customers of both AMD andFujitsu.

    Continuity of SpecificationsThere is no change to this datasheet as a result of offering the device as a Spansion product. Anychanges that have been made are the result of normal datasheet improvement and are noted in thedocument revision summary, where supported. Future routine revisions will occur when appropriate,and changes will be noted in a revision summary.

    Continuity of Ordering Part NumbersAMD and Fujitsu continue to support existing part numbers beginning with Am and MBM. To orderthese products, please use only the Ordering Part Numbers listed in this document.

    For More InformationPlease contact your local AMD or Fujitsu sales office for additional information about Spansionmemory solutions.

    Am29F010BData Sheet

    Publication Number 22336 Revision C Amendment +1 Issue Date November 18, 2002

  • This Data Sheet states AMDs current technical specificaSheet may be revised by subsequent versions or modificaAm29F010B1 Megabit (128 K x 8-bit) CMOS 5.0 Volt-only, Uniform Sector Flash MemoryDISTINCTIVE CHARACTERISTICS Single power supply operation

    5.0 V 10% for read, erase, and program operations

    Simplifies system-level power requirements

    Manufactured on 0.32 m process technology

    Compatible with Am29F010 and Am29F010A device

    High performance

    45 ns maximum access time

    Low power consumption

    12 mA typical active read current

    30 mA typical program/erase current

  • GENERAL DESCRIPTIONThe Am29F010B is a 1 Mbit, 5.0 Volt-only Flashmemory organized as 131,072 bytes. The Am29F010Bis offered in 32-pin PDIP, PLCC and TSOP packages.The byte-wide data appears on DQ0-DQ7. The de-vice is designed to be programmed in-system with thestandard system 5.0 Volt VCC supply. A 12.0 volt VPP is notrequired for program or erase operations. The device canalso be programmed or erased in standard EPROMprogrammers.

    This device is manufactured using AMDs 0.32 m pro-cess technology, and offers all the features and benefitsof the Am29F010 and Am29F010A.

    The standard device offers access times of 45, 55, 70,90, and 120 ns, allowing high-speed microprocessorsto operate without wait states. To eliminate bus conten-tion the device has separate chip enable (CE#), writeenable (WE#) and output enable (OE#) controls.

    The device requires only a single 5.0 volt power sup-ply for both read and write functions. Internallygenerated and regulated voltages are provided for theprogram and erase operations.

    The device is entirely command set compatible with theJEDEC single-power-supply Flash standard. Com-mands are written to the command register usingstandard microprocessor write timings. Register con-tents serve as input to an internal state machine thatcontrols the erase and programming circuitry. Writecycles also internally latch addresses and data neededfor the programming and erase operations. Readingdata out of the device is similar to reading from otherFlash or EPROM devices.

    Device programming occurs by executing the programcommand sequence. This invokes the EmbeddedProgram algorithman internal algorithm that auto-

    matically times the program pulse widths and verifiesproper cell margin.

    Device erasure occurs by executing the erase com-mand sequence. This invokes the Embedded Erasealgorithman internal algorithm that automatically pre-programs the array (if it is not already programmed)before executing the erase operation. During erase,the device automatically times the erase pulse widthsand verifies proper cell margin.

    The host system can detect whether a program orerase operation is complete by reading the DQ7 (Data#Polling) and DQ6 (toggle) status bits. After a programor erase cycle has been completed, the device is readyto read array data or accept another command.

    The sector erase architecture allows memory sectorsto be erased and reprogrammed without affecting thedata contents of other sectors. The device is erasedwhen shipped from the factory.

    The hardware data protection measures include alow VCC detector automatically inhibits write operationsduring power transitions. The hardware sector protec-tion feature disables both program and eraseoperations in any combination of the sectors of memory,and is imp lemented us ing s tandard EPROMprogrammers.

    The system can place the device into the standby mode.Power consumption is greatly reduced in this mode.

    AMDs Flash technology combines years of Flashmemory manufacturing experience to produce thehighest levels of qual i ty, re l iab i l i ty, and costeffectiveness. The device electrically erases all bitswithin a sector simultaneously via Fowler-Nordheimtunneling. The bytes are programmed one byte at atime using the EPROM programming mechanism ofhot electron injection.2 Am29F010B November 18, 2002

  • TABLE OF CONTENTSProduct Selector Guide . . . . . . . . . . . . . . . . . . . . . 4Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9

    Table 1. Am29F010B Device Bus Operations .................................9Requirements for Reading Array Data ..................................... 9Writing Commands/Command Sequences .............................. 9Program and Erase Operation Status .................................... 10Standby Mode ........................................................................ 10Output Disable Mode .............................................................. 10

    Table 2. Am29F010B Sector Addresses Table ...............................10Autoselect Mode ..................................................................... 10

    Table 3. Am29F010B Autoselect Codes (High Voltage Method) ....11Sector Protection/Unprotection ............................................... 11Hardware Data Protection ...................................................... 11

    Low VCC Write Inhibit ......................................................................11Write Pulse Glitch Protection ........................................................11Logical Inhibit ..................................................................................11Power-Up Write Inhibit ....................................................................11

    Command Definitions . . . . . . . . . . . . . . . . . . . . . . 12Reading Array Data ................................................................ 12Reset Command ..................................................................... 12Autoselect Command Sequence ............................................ 12Byte Program Command Sequence ....................................... 12

    Figure 1. Program Operation ..........................................................13Chip Erase Command Sequence ........................................... 13Sector Erase Command Sequence ........................................ 13Erase Suspend/Erase Resume Commands ........................... 14

    Figure 2. Erase Operation ...............................................................14Command Definitions ............................................................. 15

    Table 4. Am29F010B Command Definitions ...................................15Write Operation Status . . . . . . . . . . . . . . . . . . . . . 16

    DQ7: Data# Polling ................................................................. 16Figure 3. Data# Polling Algorithm ...................................................16

    DQ6: Toggle Bit I .................................................................... 16Reading Toggle Bit DQ6 ......................................................... 17

    Figure 4. Toggle Bit Algorithm .........................................................17

    DQ5: Exceeded Timing Limits ................................................ 17DQ3: Sector Erase Timer ....................................................... 18

    Table 5. Write Operation Status ..................................................... 18Absolute Maximum Ratings . . . . . . . . . . . . . . . . 19

    Figure 5. Maximum Negative Overshoot Waveform ...................... 19Figure 6. Maximum Positive Overshoot Waveform ........................ 19

    Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 19DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 22

    Figure 7. Test Setup ....................................................................... 22Table 6. Test Specifications ........................................................... 22

    Key to Switching Waveforms . . . . . . . . . . . . . . . 22AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23

    Figure 8. Read Operations Timings ............................................... 23Erase and Program Operations ......................................................... 24

    Figure 9. Program Operation Timings ............................................ 25Figure 10. Chip/Sector Erase Operation Timings .......................... 25Figure 11. Data# Polling Timings (During Embedded Algorithms) . 26Figure 12. Toggle Bit Timings (During Embedded Algorithms) ...... 26

    Erase a