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Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
1
Heterogeneity-Aware Peak Power Management for
Accelerator-Based Systems
Gui-Bin Wang, Yi-Song Lin
2011 IEEE 17th International Conference on Parallel and Distributed Systems (ICPADS)
Presented by Po-Ting Liu2013/10/24
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Outline
• Introduction• Motivation• Mathematical Analyze and Algorithms• Experiment• Conclusion
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Introduction
• Introduction• Motivation• Mathematical Analyze and Algorithms• Experiment• Conclusion
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Introduction
• Importance of energy efficiency
Coolingoverhead
Reducereliability
Enlargesystem running
cost
Problem ofHigh power consumption
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Introduction (cont.)
• Related work– Most for homogeneous system– None application-aware
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Motivation
• Introduction• Motivation• Mathematical Analyze and Algorithms• Experiment• Conclusion
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Motivation
• Same power budget– Different partition ratio could produce different performance
• Different power budgets– The best partition ratio may be different
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms
• Introduction• Motivation• Mathematical Analyze and Algorithms• Experiment• Conclusion
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms
• Dynamic power consumption
(In general situation, =3)
– Scaling the frequency could cubically effect the dynamic power consumption
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
• Real dynamic power for the th processor could be described as
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
• Definition of schedule unit and work space– A loop iteration in a parallel loop is a basic schedule unit– Work space defined as
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
• Execution time
• Total power consumption
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Target:Minimizing ,with the constraint
¿𝑤𝑜𝑟𝑘¿𝑝𝑟𝑜𝑐𝑒𝑠𝑠𝑜𝑟 ×𝑠𝑝𝑒𝑒𝑑
¿𝑝𝑟𝑜𝑐𝑒𝑠𝑠𝑜𝑟 ×𝑝𝑜𝑤𝑒𝑟
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
Minimizing is equal to
Maximizing the total processing speed
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
• Use Lagrange multiplier
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
• Result of Lagrange multiplier – Parameter ,• Determine the power that processor can use
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
• The model predict the power usage
– Some processors can run at their peak frequency
– The frequency of residual processors should be smaller than peak : Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Mathematical Analyze and Algorithms (cont.)
: Different kinds of processors: Number of th processor: Peak power consumption of th processor: Real dynamic power of th processor: BIPS (billion instructions per second) : Speed of one th processor: Ratio of the real frequency to its peak frequency : Work subspace mapped to the th processor set : Number of schedule unit in
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment
• Introduction• Motivation• Mathematical Analyze and Algorithms• Experiment• Conclusion
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment
• Experimental Environment
P.S. One CPU core to manage and schedule the GPU, other cores for executing program
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment (cont.)
• Tools– Tuning frequency• CPU: ACPI (Advanced Configuration and Power Interface)• GPU: AMD’s ADL interface (AMD Display Library)
– Performance measure • CPU: PCM (Performance Counter Monitor)• GPU: Calculate from the speed on CPU and the relative speedup of GPU
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment (cont.)
• Experimental Application
Memory-intensive
Compute-intensive
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment (cont.)
• Validate Model– Parameter
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment (cont.)
• Power Control Accuracy
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Experiment (cont.)
Baseline: Peak frequency
frequency
Best
Choose
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Conclusion
• Introduction• Motivation• Mathematical Analyze and Algorithms• Experiment• Conclusion
Heterogeneity-Aware Peak Power Management for Accelerator-based Systems
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Conclusion
• Power management for heterogeneous system• Application-aware power management• Maximize the system performance within a given power
budget• Improves the performance with 7.3% compared with existing
method in average