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High-speed Serial Interface
Lect. 2 – Channel Characteristic
2013-1High-Speed Circuits and Systems Lab., Yonsei University1
Block diagram
2013-1High-Speed Circuits and Systems Lab., Yonsei University2
Serializer TxDriver
RxEqualizer Sampler
ClockRecovery
Deserializer
PLL
Channel
Tx Rx
• Where are we today?
Interface Channels• Chip-to-chip
– PCB– Chip packages
2013-1High-Speed Circuits and Systems Lab., Yonsei University3
PCB
Chip package
• PCB
Interface Channels
2013-1High-Speed Circuits and Systems Lab., Yonsei University4
- PCB Stack-UpCore (Copper traces with FR4)+ Prepreg + Copper Foil
- Various stack-up schemes(Signal, Power, Ground planes)
- Vias connect different layers
• Backplane and Linecard
Interface Channels
2013-1High-Speed Circuits and Systems Lab., Yonsei University5
Interface Channels• Box-to-box
- Cables
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Coaxial cable
Twisted pair
Laptop
AudioEffector
AudioAmp.
Headphone
• Box-to-box - Cables
• Coaxial cable• Mineral-insulated copper-clad cable• Twinax cable• Flexible cables• Non-metallic sheathed cable• Metallic sheathed cable• Multicore cable• Shielded cable• Single cable• Twisted pair• Twisting cable
Interface Channels
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Coaxial cable
Twisted pair
• Twisted Pair
Interface Channels
2013-1High-Speed Circuits and Systems Lab., Yonsei University8
Twisted pair
Chip package• Wire bonding
– Bonding wires connectpads and package lead frames
Inductance due to wires
2013-1High-Speed Circuits and Systems Lab., Yonsei University9
Limited pin number
Ball Grid Array
Chip package• Flip Chip
2013-1High-Speed Circuits and Systems Lab., Yonsei University10
- Package type often decides the maximum data rate!
Interface Channels• Relatively-large SNR and Bandwidth
– Compared with wireless application Simple modulation such as ASK, NRZ is often sufficient
• Frequency-Dependent Loss– Dielectric loss– Skin effect
• Reflection– Broadband impedance matching
2013-1High-Speed Circuits and Systems Lab., Yonsei University11
Channel loss• Two main loss components
– Dielectric loss– Skin effect
• In the view of transmission line,– Dielectric loss G↑– Skin effect R↑
2013-1High-Speed Circuits and Systems Lab., Yonsei University12
R L
G C
Channel loss• Dielectric loss
– Loss between 2 metal separated by insulation material– Occurs in any kind of channels including insulation– Loss increases as f ↑
2013-1High-Speed Circuits and Systems Lab., Yonsei University13
∙
Channel loss• Skin effect
– As frequency increases, less current flows at the center of conductor.
– Loss increases as ↑
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• Total loss– In low frequency, skin effect > dielectric loss– In high frequency, skin effect < dielectric loss
• Bandwidth limitation due to f-dependent loss!
Channel loss
2013-1High-Speed Circuits and Systems Lab., Yonsei University15
frequency
Loss
Impedance mismatch
- Ideally Zs = Zc = ZL
- Practically not possible to achieve this due to PVT variations for ICs, manufacturing uncertainties for PCB traces and vias, connectors
2013-1High-Speed Circuits and Systems Lab., Yonsei University16
Impedance mismatch• Reflection
2013-1High-Speed Circuits and Systems Lab., Yonsei University17
Inter-symbol interference• Channel with f-dependent loss, reflection
distorts pulse response– Pulse response outside bit period becomes non-zero.– Waveform of present bit is affected by former bits.
2013-1High-Speed Circuits and Systems Lab., Yonsei University18
Channel
Bit period Bit period
Inter-symbol interference
2013-1High-Speed Circuits and Systems Lab., Yonsei University19
• Waveform example: ideal case– Given data pattern: 1010110011110000
Inter-symbol interference
2013-1High-Speed Circuits and Systems Lab., Yonsei University20
• Waveform example: w/ ISI– Given data pattern: 1010110011110000
Inter-symbol interference
2013-1High-Speed Circuits and Systems Lab., Yonsei University21
• How ISI affects performance?– Receiver has sampling circuits (ADC or D-FF).– Sampling circuits require
setup/ hold time to meetrequired BER spec.
1. ISI distorts position of edge2. Setup/ hold margin
of sampling circuit ↓3. Error sampling ↑4. BER performance ↓
NormalBit period
DecreasedBit period