HMC797APM5E - Analog Devices

HMC797APM5Ev06.0418

GaAs pHEMT MMIC1 WATT POWER AMPLIFIER, DC - 22 GHz

For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106Phone: 781-329-4700 • Order online at www.analog.com

Application Support: Phone: 1-800-ANALOG-D

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General Description

Features

Functional Diagram

The HMC797APM5E is a GaAs MMIC pHEMT Dis-tributed Power Amplifier which operates between DC and 22 GHz. The amplifier provides 15 dB of gain, +29 dBm of output power at 1 dB gain compression, +31 dBm of saturated output power, and 25% PAE while requiring 400 mA from a +10 V supply. With up to +41 dBm of output IP3, the HMC797APM5E is ideal for high linearity applications in military and space as well as test equipment where high order modulations are used. This versatile PA exhibits a positive gain slope from 2 to 20 GHz making it ideal for EW, ECM, Radar and test equip-ment applications. The HMC797APM5E amplifier I/Os are internally matched to 50 Ohms facilitating integration into mutli-chip-modules (MCMs), is packaged in a lead-less QFN 5x5 mm surface mount package, and requires no external matching components.

High P1dB Output Power: +29 dBm

High Psat Output Power: +31 dBm

High Gain: 15 dB

High Output IP3: +41 dBm

Supply Voltage: +10 V @ 400 mA

50 Ohm Matched Input/Output

32 Lead 5x5 mm SMT Package: 25 mm²

Typical Applications

The HMC797APM5E is ideal for:

• Test Instrumentation

• Military & Space

• Fiber Optics

Electrical Specifications, TA = +25° C, Vdd = +10 V, Vgg2 = +3.5 V, Idd = 400 mA*

Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units

Frequency Range DC - 12 12 - 18 18 - 22 GHz

Gain 12.5 14.5 13 15 13 15.5 dB

Gain Flatness ±0.7 ±0.5 ±0.5 dB

Gain Variation Over Temperature 0.014 0.018 0.02 dB/ °C

Input Return Loss 15 15 15 dB

Output Return Loss 13 15 13 dB

Output Power for 1 dB Compression (P1dB) 27 29 27 29 26 29 dBm

Saturated Output Power (Psat) 31 31 31 dBm

Output Third Order Intercept (IP3)*Measurement taken at Pout/Tone = + 18 dBm

42 41 41 dBm

Noise Figure 3.0 3.5 4 dB

Supply Current (Idd) 400 400 400 mA

Supply Voltage (Vdd) 8 10 11 8 10 11 8 10 11 V

* Adjust Vgg1 between -2 to 0 V to achieve Idd = 400 mA typical, Vgg1 = -0.55V Typical to achieve Idd = 400 mA.

For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106Phone: 781-329-4700 • Order online at www.analog.comApplication Support: Phone: 1-800-ANALOG-D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

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Gain vs. Vdd

Broadband Gain and Return Loss Low Frequency Gain and Return Loss

Gain vs. Idd

Gain vs. Temperature

Input Return Loss vs. Temperature

-25

-20

-15

-10

-5

0

5

10

15

20

0 5 10 15 20 25 30

S21S11S22

RE

SP

ON

SE

(dB

)

FREQUENCY (GHz)

-25

-20

-15

-10

-5

0

5

10

15

20

0.1 1 10 100 1000

S21S11S22

RE

SP

ON

SE

(dB

)

FREQUENCY (MHz)

6

8

10

12

14

16

18

0 4 8 12 16 20 24

+25C+85C-40C

GA

IN (

dB

)

FREQUENCY (GHz)

6

8

10

12

14

16

18

0 4 8 12 16 20 24

8V9V10V11V

GA

IN (

dB

)

FREQUENCY (GHz)

6

8

10

12

14

16

18

0 4 8 12 16 20 24

300 mA

350 mA

400 mA

GA

IN (

dB

)

FREQUENCY (GHz)

-25

-20

-15

-10

-5

0

0 4 8 12 16 20 24

+25C+85C-40C

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

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Reverse Isolation vs. Temperature

Output Return Loss vs. Temperature Output Return Loss vs. Vdd

Output Return Loss vs. Idd

Input Return Loss vs. Vdd Input Return Loss vs. Idd

-25

-20

-15

-10

-5

0

0 4 8 12 16 20 24

8V9V10V11V

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-25

-20

-15

-10

-5

0

0 4 8 12 16 20 24

300mA

350mA

400mA

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-25

-20

-15

-10

-5

0

0 4 8 12 16 20 24

+25C+85C -40C

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-25

-20

-15

-10

-5

0

0 4 8 12 16 20 24

8V9V10V11V

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-25

-20

-15

-10

-5

0

0 4 8 12 16 20 24

300mA

350mA

400mA

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-70

-60

-50

-40

-30

-20

-10

0

0 4 8 12 16 20 24

+25C+85C-40C

ISO

LA

TIO

N (

dB

)

FREQUENCY (GHz)

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P1dB vs. Idd

Noise Figure vs. Idd

Low Frequency P1dB vs. Temperature

P1dB vs. Vdd

Noise Figure vs. Temperature

P1dB vs. Temperature

0

2

4

6

8

10

0 2 4 6 8 10 12 14 16 18 20 22 24

+25C+85C-40C

NO

ISE

FIG

UR

E(d

B)

FREQUENCY (GHz)

0

2

4

6

8

10

0 2 4 6 8 10 12 14 16 18 20 22 24

300mA350mA400mA

NO

ISE

FIG

UR

E(d

B)

FREQUENCY (GHz)

20

22

24

26

28

30

32

0 4 8 12 16 20 24

+25C+85C -40C

P1dB

(dB

m)

FREQUENCY (GHz)

20

22

24

26

28

30

32

0 0.3 0.5 0.8 1 1.3 1.5

+25C+85C -40C

P1dB

(dB

m)

FREQUENCY (GHz)

20

22

24

26

28

30

32

0 4 8 12 16 20 24

8V9V10V11V

P1dB

(dB

m)

FREQUENCY (GHz)

20

22

24

26

28

30

32

0 4 8 12 16 20 24

300mA350mA400mA

P1dB

(dB

m)

FREQUENCY (GHz)

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Psat vs. Vdd Psat vs. Idd

Low Frequency Psat vs. Temperature Psat vs. Temperature

Power Compression @ 2 GHz Power Compression @ 6 GHz

20

22

24

26

28

30

32

34

0 4 8 12 16 20 24

+25C+85C -40C

Psat (d

Bm

)

FREQUENCY (GHz)

20

22

24

26

28

30

32

34

0 0.3 0.5 0.8 1 1.3 1.5

+25C+85C -40C

Psat (d

Bm

)

FREQUENCY (GHz)

20

22

24

26

28

30

32

34

0 4 8 12 16 20 24

8V9V10V11V

Psat (d

Bm

)

FREQUENCY (GHz)

20

22

24

26

28

30

32

34

0 4 8 12 16 20 24

300 mA350 mA400 mA

Psat (d

Bm

)

FREQUENCY (GHz)

0

5

10

15

20

25

30

35

360

390

420

450

480

510

540

570

0 2 4 6 8 10 12 14 16 18 20 22

Pout

Gain

PAE

IddPo

ut

(dB

m),

GA

IN (

dB

), P

AE

(%

)

Idd

(mA

)

INPUT POWER (dBm)

0

5

10

15

20

25

30

35

360

390

420

450

480

510

540

570

0 2 4 6 8 10 12 14 16 18 20 22

Pout

Gain

PAE

IddPo

ut

(dB

m),

GA

IN (

dB

), P

AE

(%

)

Idd

(mA

)

INPUT POWER (dBm)

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0

5

10

15

20

25

30

35

360

390

420

450

480

510

540

570

0 2 4 6 8 10 12 14 16 18 20 22

Pout

Gain

PAE

IddPo

ut

(dB

m),

GA

IN (

dB

), P

AE

(%

)

Idd

(mA

)

INPUT POWER (dBm)

0

5

10

15

20

25

30

35

360

390

420

450

480

510

540

570

0 3 6 9 12 15 18 21

Pout

Gain

PAE

IddPo

ut

(dB

m),

GA

IN (

dB

), P

AE

(%

)

Idd

(mA

)

INPUT POWER (dBm)

0

5

10

15

20

25

30

35

360

390

420

450

480

510

540

570

0 2 4 6 8 10 12 14 16 18 20 22

Pout

Gain

PAE

IddPo

ut

(dB

m),

GA

IN (

dB

), P

AE

(%

)

Idd

(mA

)

INPUT POWER (dBm)

0

5

10

15

20

25

30

35

360

390

420

450

480

510

540

570

0 2 4 6 8 10 12 14 16 18 20

Pout

Gain

PAE

IddPo

ut

(dB

m),

GA

IN (

dB

), P

AE

(%

)

Idd

(mA

)

INPUT POWER (dBm)

0

5

10

15

20

25

30

0 4 8 12 16 20 24

+25C+85C -40C

PA

E (

%)

FREQUENCY (GHz)

0

1

2

3

4

5

6

0 2 4 6 8 10 12 14 16 18 20 22

2GHz6GHz10GHz14GHz18GHz20GHz22GHz

PO

WE

R D

ISS

IPA

TIO

N (

W)

INPUT POWER (dBm)

PAE @ Psat vs. Frequency Power Dissipation @ 85 C

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Gain & Power vs. Idd @ 10 GHz Gain & Power vs. Idd @ 22 GHz

Gain & Power vs. Idd @ 2 GHzGain &Power vs. Vdd @ 22 GHz

10

15

20

25

30

35

300 320 340 360 380 400

GainP1dBPsat

Idd (mA)

Gain

(dB

), P

1dB

(dB

m),

Psat (d

Bm

)

10

15

20

25

30

35

8 9 10 11

GainP1dBPsat

Vdd (V)

Gain

(dB

), P

1dB

(dB

m),

Psat (d

Bm

)

10

15

20

25

30

35

300 320 340 360 380 400

GainP1dBPsat

Idd (mA)

Gain

(dB

), P

1dB

(dB

m),

Psat (d

Bm

)

10

15

20

25

30

35

300 320 340 360 380 400

GainP1dBPsat

Idd (mA)

Gain

(dB

), P

1dB

(dB

m),

Psat (d

Bm

)

10

15

20

25

30

35

8 9 10 11

GainP1dBPsat

Vdd (V)

Gain

(dB

), P

1dB

(dB

m),

Psat (d

Bm

)

10

15

20

25

30

35

8 9 10 11

GainP1dBPsat

Vdd (V)

Gain

(dB

), P

1dB

(dB

m),

Psat (d

Bm

)

Gain & Power vs. Vdd @ 2 GHz Gain & Power vs. Vdd @ 10 GHz

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OIP3 vs. Temperature@ Pout / Tone = +18 dBm

Output IM3 @ Vdd = +8 V Output IM3 @ Vdd = +9 V

Low Frequency OIP3 vs. Temperature@ Pout / Tone = +18 dBm

OIP3 vs. Vdd@ Pout / Tone = +18 dBm

OIP3 vs. Idd@ Pout / Tone = +18 dBm

30

32

34

36

38

40

42

44

46

0 4 8 12 16 20 24

+25C+85C -40C

IP3 (

dB

m)

FREQUENCY (GHz)

30

32

34

36

38

40

42

44

46

0 0.3 0.5 0.8 1 1.3 1.5

+25C+85C -40C

IP3 (

dB

m)

FREQUENCY (GHz)

30

32

34

36

38

40

42

44

46

0 4 8 12 16 20 24

8V9V10V11V

IP3 (

dB

m)

FREQUENCY (GHz)

30

32

34

36

38

40

42

44

46

0 4 8 12 16 20 24

300 mA350 mA400 mA

IP3 (

dB

m)

FREQUENCY (GHz)

0

20

40

60

80

10 12 14 16 18 20 22

2GHz6GHz10GHz14GHz18GHz22GHz

IM3 (

dB

c)

Pout/TONE (dBm)

0

20

40

60

80

10 12 14 16 18 20 22


IM3 (

dB

c)

Pout/TONE (dBm)

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Second Harmonics vs. Temperature@ Pout = +18 dBm

Output IM3 @ Vdd = +11 VOutput IM3 @ Vdd = +10 V

0

10

20

30

40

50

0 4 8 12 16 20 24

+25C+85C -40C

SE

CO

ND

HA

RM

ON

IC (

dB

c)

FREQUENCY(GHz)

0

20

40

60

80

10 12 14 16 18 20 22


IM3 (

dB

c)

Pout/TONE (dBm)

0

20

40

60

80

10 12 14 16 18 20 22


IM3 (

dB

c)

Pout/TONE (dBm)

OIP2 vs. Temperature@ Pout / Tone = +18 dBm

OIP2vs. Vdd@ Pout / Tone = +18 dBm

OIP2 vs. Idd@ Pout / Tone = +18 dBm

0

10

20

30

40

50

60

0 4 8 12 16 20 24

+25C+85C -40C

IP2 (

dB

m)

FREQUENCY(GHz)

0

10

20

30

40

50

60

0 4 8 12 16 20 24

8V9V10V11V

IP2 (

dB

m)

FREQUENCY(GHz)

0

10

20

30

40

50

60

0 4 8 12 16 20 24

300 mA350 mA400 mA

IP2 (

dB

m)

FREQUENCY(GHz)

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Igg1 vs. Input Power

Second Harmonics vs. Vdd@ Pout = +18 dBm

Second Harmonics vs. Idd@ Pout = +18 dBm

Second Harmonics vs. Pout

Igg2 vs. Input Power

0

10

20

30

40

50

0 4 8 12 16 20 24

8V9V10V11V

SE

CO

ND

HA

RM

ON

IC (

dB

c)

FREQUENCY(GHz)

0

10

20

30

40

50

0 4 8 12 16 20 24

300 mA350 mA400 mAS

EC

ON

D H

AR

MO

NIC

(dB

c)

FREQUENCY(GHz)

0

10

20

30

40

50

60

0 4 8 12 16 20 24

+10 dBm+12 dBm+14 dBm+16 dBm+18 dBm+20 dBm

SE

CO

ND

HA

RM

ON

IC (

dB

c)

FREQUENCY(GHz)

-0.2

-0.15

-0.1

-0.05

0

0.05

0.1


0 2 4 6 8 10 12 14 16 18 20

Igg1 (

mA

)

INPUT POWER (dBm)

-1

-0.5

0

0.5

1

1.5

2


0 2 4 6 8 10 12 14 16 18 20

Igg2 (

mA

)

INPUT POWER (dBm)

Idd vs. Vgg1, Representative of a Typical Device

-400

4080

120160200240280320360400440480520560600640

-1.6 -1.4 -1.2 -1 -0.8 -0.6 -0.4

IDD

(m

A)

Vgg1 (V)

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Outline Drawing

Part Number Package Body Material Lead Finish MSL Rating Package Marking

HMC797APM5E RoHS-compliant Low Stress Pre-Molded Plastic NiPdAu MSL3 [1] HMC797A

[1] Max peak reflow temperature of 260 °C

Package Information

Absolute Maximum RatingsNominal Drain Supply to GND +12.0 V

Gate Bias Voltage (Vgg1) -3.0 to 0 Vdc

Gate Bias Voltage (Vgg2) +2.5 V to (Vdd - 5.5 V)

Continuous Pdiss (T= 85 °C)(derate 60 mW/°C above 85 °C)

5.37 W

RF Input Power +27 dBm

Output Load VSWR 7:1

Storage Temperature -65 to 150 °C

Operating Temperature -40 to +85 °C

Max Peak Reflow Temperature 260 °C

ESD Sensitivity (HBM) Class 1A - Passed 250V

ELECTROSTATIC SENSITIVE DEVICEOBSERVE HANDLING PRECAUTIONS

Junction Temperature to Main-tain 1 Million Hour MTTF

175 °C

Nominal Junction Temperature (T=85 °C, Vdd = 10 V)

152 °C

Thermal Resistance (channel to ground paddle)

16.75 °C/W

Reliability Information

32-Lead Lead Frame Chip Scale Package, Premolded Cavity [LFCSP_CAV]5 x 5 mm Body and 1.25 mm Package Height

(CG-32-2)Dimensions shown in millimeters

04-1

9-20

17-A

1

0.50BSC

BOTTOM VIEWTOP VIEW

SIDE VIEW

PIN 1INDICATOR

32

916

17

24

25

8

0.300.250.20

5.105.00 SQ4.90

FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.

0.450.400.35

3.203.10 SQ3.00

PKG

-005

068

3.50 REF

EXPOSEDPAD

1.351.251.15 0.050 MAX

0.035 NOM

0.203 REF

0.400.60 REF

COPLANARITY0.08SEATING

PLANE

PIN 1INDICATOR AREA OPTIONS(SEE DETAIL A)

DETAIL A(JEDEC 95)

Stresses at or above those listed under Absolute Maxi-mum Ratings may cause permanent damage to the prod-uct. This is a stress rating only, functional operation of the product at these or any other conditions above those indi-cated in the operational section of this specification is not implied. Operation beyond the maximum operating condi-tions for extended periods may affect product reliability.

32-Lead Lead Frame Chip Scale Package [LFCSP_CAV]5 mm × 5 mm and 1.25 mm Package Height

(CG-32-2)Dimensions shown in millimeters

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Pin Number Function Description Interface Schematic

1, 4, 6, 8, 9, 16, 17, 20, 22, 24,

25, 32Package Bottom

GNDThese pins & exposed ground paddle must be connected to

RF/DC ground.

2 VGG2Gate control 2 for amplifier. Attach bypass

capacitor per application circuit herein. For nominal operation +3.5V should be applied to Vgg2.

3, 7, 10 - 12, 14, 18, 19, 23, 26 -

28, 31N/C

No connection required. These pins may be connected to RF/DC ground without affecting performance.

5 RFINThis pad is DC coupled and matched

to 50 Ohms. Blocking capacitor is required.

13 VGG1

Gate control 1 for amplifier. Attach bypass capacitor per application circuit herein. Please

follow “MMIC Amplifier Biasing Procedure” application note.

15 ACG3Low frequency termination. Attach bypass

capacitor per application circuit herein.

21 RFOUT & VDDRF output for amplifier. Connect DC bias (Vdd) network to provide drain current (Idd). See application circuit herein.

29 ACG2Low frequency termination. Attach bypass

capacitor per application circuit herein.30 ACG1

Pin Descriptions

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Evaluation PCB

List of Materials for Evaluation BoardItem Description

J1, J2 SMA Connectors

J3, J4 DC Pins

C1 - C4 100 pF Capacitor, 0402 Pkg.

C5, C8 10 kpF Capacitor, 0402 Pkg.

C9 - C11 4.7 µF Capacitor, Tantalum

R1, R2 0 OHM Resistor, 0402 Pkg

U1 HMC797APM5E Power Amplifier

PCB [1] 600-01711-00 Evaluation PCB

[1] Circuit Board Material: Rogers 4350 or Arlon FR4

The circuit board used in the application should use RF circuit design techniques. Signal lines should have 50 Ohm impedance while the package ground leads and exposed paddle should be con-nected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Analog Devices, Inc.

600-01711-00-1CTNLGND

VGG

RFIN RFOUT

THRUCAL

GND

C11 + C4

C2C6

C8

C3C7

C1

C10

+

+

C9

C5

J1 J2

R1

J3

J4

U1

Item Contents Part Number

Evaluation PCB only

HMC797APM5E Evaluation PCB EV1HMC797APM5

Evaluation Order Information

Note:VGG = VGG1CTNL = VGG2

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Application Circuit

NOTE 1: Drain Bias (Vdd) must be applied through a broadband bias tee or external bias network.NOTE 2: Optional Capacitors to be used if part is to be operated below 200MHz.

Documents

HMC797APM5E - Analog Devices