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IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
Contact
Reinier A. van Mourik, MScPhD ResearcherSpintronics DevicesIBM / Eindhoven University of Technology
IBM Almaden Research Center650 Harry RdSan Jose, CA 95120USA
Tel +1 408 927 2501Fax +1 408 927 2510Mobile +1 408 821 4559
© 2009 IBM CorporationNanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
Reliability of Signal Propagation in Magnetostatically Coupled Arrays of Magnetic Nanoelements
Reinier van Mourik1,2, Li Gao1, Brian Hughes1, Charles Rettner1, Bert Koopmans2, Stuart Parkin1
1. IBM Almaden Research Center, San Jose, CA2. Eindhoven University of Technology, Eindhoven, the Netherlands
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
1. Introduction
Nanomagnetic logic - principle
• Energy-efficient• Non-volatile• Fast• Radiation resistant
Majority gateA
B D
C
M
A
B
C
DM
Majority gate is programmable NAND/NOR gate Full logic set
output read
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
1. Introduction
Outline
Experiment and simulation: inherent unreliability
Alternative for conventional NML: Domain wall clocking
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
2. Error rate in N
ML devices
Experiment setup fabrication measurement
Artificial input biases first dot according to reset direction
Reset:
0o
180o
-150 -100 -50 0 506.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
Resis
tance
(k)
Field (Oe)
d916
~70Oe
d514
MFM shows state of each dot
The RH curve of the MTJ shows output of device
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
2. Error rate in N
ML devices
Single device: shot-to-shot results
Output MTJ state alternates accordingly when alternating input direction.
0 100 200 300 400 500 600 700 800
9
10
11
12
R (k
)
Cycles (#)
0 100
9
10
11
12
R (k
)
Cycles (#)
input
output
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
2. Error rate in N
ML devices
Many devices: device-to-device results
Success/error is highly reproducible, thus inherent in device.
68/158 (43%) of devices contain errors
repeat clocking cycle, input +x
clocking cycle, input +x
clocking cycle, input -x
116/123 (94%) of devices evolve to exact same state
66/79 (84%) of devices evolve to exact inverse state
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
2. Error rate in N
ML devices
Error rate in signal propagation - simulations
Device-to-device error rate tends to 50% as length increases
Last NM evolves before signal reaches it
Errors are caused by last magnet evolving early.
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
3. Dom
ain wall clocking
Domain wall clocking - principle
Fringing field from domain wall in perpendicularly magnetized material can reset nanomagnets.
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
3. Dom
ain wall clocking
DW clocking – experimental setup
PMA nanowire 60-180nm wide
Dom
ain wall injection line
Hall barnanodots Py 60x90x20nm
AMR read
hall bar read
�⃑� �⃑�
DW
�⃑�
1. inject DW
2. propagate DW by H field 3. read resistance change in AMR and Hall bar
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
3. Dom
ain wall clocking
DW clocking - resultsPrepare device in incorrect state
Pass DW underneath
End in correct state
DW clocking demonstrated in 1- and 2-magnet devices
IBM Research
Nanomagnetic Logic | Mar 18 2013 | IBM/TUe © 2013 IBM Corporation
Conclusion
Nanomagnetic Logic is magnetic alternative to CMOS logic
Analysis done of reliability of NML devices with integrated output
Errors are reproducible per device and tend to 50% among devices.
Domain Wall clocking is demonstrated as alternative clocking scheme
slides & contact: http://tinyurl.com/RvM-IBM
