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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Chapter 4Chapter 4Introduction to Computer Introduction to Computer
OrganizationOrganization
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Chapter OutlineChapter Outline
• System OrganizationSystem Organization
• CPU OrganizationCPU Organization
• Memory Organization and InterfacingMemory Organization and Interfacing
• I/O Organization and InterfacingI/O Organization and Interfacing
• Relatively Simple ComputerRelatively Simple Computer
• 8085-based Computer8085-based Computer
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Basic Computer OrganizationBasic Computer Organization
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System ComponentsSystem Components
• CPU/MicroprocessorCPU/Microprocessor
• Memory SubsystemMemory Subsystem
• I/O SubsystemI/O Subsystem
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System BusesSystem Buses
• Address BusAddress Bus
• Data BusData Bus
• Control BusControl Bus
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Instruction CycleInstruction Cycle
• FetchFetch
• DecodeDecode
• ExecuteExecute
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Instruction FetchInstruction Fetch
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Types of I/O OrganizationTypes of I/O Organization
• Isolated I/OIsolated I/O
• Memory-mapped I/OMemory-mapped I/O
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CPU OrganizationCPU Organization
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Types of MemoryTypes of Memory
• Static RAMStatic RAM
• Dynamic RAMDynamic RAM
• ROMROM
• PROMPROM
• EPROMEPROM
• EEPROMEEPROM
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Memory Chip Organization - Memory Chip Organization - LinearLinear
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Memory Chip Organization - Memory Chip Organization - Two DimensionalTwo Dimensional
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Combining Memory Chips to Combining Memory Chips to Increase Word SizeIncrease Word Size
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Combining Memory Chips to Combining Memory Chips to Increase Address SpaceIncrease Address Space
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Low-order InterleavingLow-order Interleaving
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von Neumann Architecturevon Neumann Architecture
• Instructions and data mixedInstructions and data mixed
• Used in modern computersUsed in modern computers
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Harvard ArchitectureHarvard Architecture
• Instructions and data separateInstructions and data separate
• Used in low-level cache memory designUsed in low-level cache memory design
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Big Endian Data OrganizationBig Endian Data Organization
• Most significant byte firstMost significant byte first
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Little Endian Data Little Endian Data OrganizationOrganization
• Least significant byte firstLeast significant byte first
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Input Device OrganizationInput Device Organization
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Output Device OrganizationOutput Device Organization
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Bidirectional I/O Device Bidirectional I/O Device OrganizationOrganization
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I/O Interface EnhancementsI/O Interface Enhancements
• READY signalREADY signal
• InterruptsInterrupts
• DMADMA
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Relatively Simple Computer Relatively Simple Computer SpecificationsSpecifications
• Relatively Simple CPURelatively Simple CPU
• 8K ROM starting at 0000H8K ROM starting at 0000H
• 8K RAM starting at 2000H8K RAM starting at 2000H
• Memory-mapped, bidirectional I/O port Memory-mapped, bidirectional I/O port at 8000Hat 8000H
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Relatively Simple Computer Relatively Simple Computer Organization - CPU DetailsOrganization - CPU Details
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Relatively Simple Computer Relatively Simple Computer Organization - Memory DetailsOrganization - Memory Details
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Relatively Simple Computer Relatively Simple Computer Organization - Final DesignOrganization - Final Design
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INCLUDE EXTERNAL INCLUDE EXTERNAL ANIMATION FROM JAVA ANIMATION FROM JAVA
SIMULATOR HERESIMULATOR HERE
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8085-based Computer 8085-based Computer SpecificationsSpecifications
• 2K EPROM starting at 0000H2K EPROM starting at 0000H
• 256 bytes RAM starting at 2000H256 bytes RAM starting at 2000H
• Four 8-bit I/O ports at 00H, 01H, 19H, Four 8-bit I/O ports at 00H, 01H, 19H, and 1AHand 1AH
• One 6-bit I/O port at 1BHOne 6-bit I/O port at 1BH
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Demultiplexing the AD signalsDemultiplexing the AD signals
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8085-based Computer Organization8085-based Computer Organization
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SummarySummary
• Basic Computer OrganizationBasic Computer Organization
• CPU OrganizationCPU Organization
• Memory Chip Internal OrganizationMemory Chip Internal Organization
• Memory Subsystem OrganizationMemory Subsystem Organization
• I/O Port Organization and InterfacingI/O Port Organization and Interfacing