Impact of Power Density Maximization on Efficiency …...288 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 1, JANUARY 2009 Impact of Power Density Maximization on Efﬁciency

Impact of Power Density Maximization on Efficiency of DC–DC Converter Systems

Juergen Biela, Member, IEEE, Uwe Badstuebner, Student Member, IEEE, and

JohannW. Kolar, Senior Member, IEEE „This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of ETH Zürich’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promo-tional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document you agree to all provisions of the copyright laws protecting it.”

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288 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 1, JANUARY 2009

Impact of Power Density Maximization on Efficiencyof DC–DC Converter Systems

Juergen Biela, Member, IEEE, Uwe Badstuebner, Student Member, IEEE, and Johann W. Kolar, Senior Member, IEEE

Abstract—The demand for decreasing costs and volume leadsto a constantly increasing power density of industrial convertersystems. In order to improve the power density, further differ-ent aspects, like thermal management and electromagnetic effects,must be considered in conjunction with the electrical design. There-fore, a comprehensive optimization procedure based on analyticalmodels for minimizing volume of dc–dc converter systems has beendeveloped at the Power Electronic Systems Laboratory of the SwissFederal Institute of Technology (ETH Zurich). Based on this pro-cedure, three converter topologies—a phase-shift converter withcurrent doubler and with capacitive output filter and a series–parallel resonant converter—are optimized with respect to powerdensity for a telecom supply (400 V/48 V). There, the characteris-tic of the power density, the efficiency, and the volume distributionbetween the components as functions of frequency are discussed.For the operating points with maximal power density, the lossdistribution is also presented. Furthermore, the sensitivity of theoptimum with respect to junction temperature, cooling, and corematerial is investigated. The highest power density is achieved bythe series–parallel resonant converter. For a 5-kW supply, a den-sity of approximately 12 kW/L and a switching frequency of ca.130 kHz are obtained.

Index Terms—DC–DC power conversion, optimization, phase-shift converter, power density, resonant converter.

I. INTRODUCTION

THE POWER density of power electronic converters hasroughly doubled every ten years since 1970. Propelling

this trajectory has been the increase of converter switching fre-quencies by a factor of 10 every decade, due to the continuousadvancement of power semiconductor device technology. Thisincrease in power density has been especially important in thedesign of telecom power supplies that have to operate in a lim-ited space and have maximum weight requirements.

In the near future, the short-term operating costs of tele-com power supplies will outweigh their capital cost. Alongwith the high operating cost, due to rising energy prices, thenegative environmental effects of increasing energy consump-tion will demand power supplies with the highest possible ef-ficiency. Therefore, an optimization of power supplies with re-spect to power density and efficiency for future “Green DataCenters” [1], which enables a reduction of cost and coolingeffort, is required. The main question that arises is, “to what ex-

Manuscript received June 25, 2008; revised August 25, 2008. Current versionpublished February 6, 2009. Recommended for publication by Associate EditorM. Vitelli.

The authors are with the Power Electronic Systems Laboratory, Swiss FederalInstitute of Technology (ETH Zurich), CH-8092 Zurich, Switzerland (e-mail:[email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2009.2006355

Fig. 1. Prototype of an optimized series–parallel resonant converter for tele-com applications with a power density of 10 kW/L and the specification givenin Table I.

tent does a power density optimization influence the efficiencyof the converter system?” In order to address this question, anoptimization of the converter design is required.

Modern power supply design must consider thermal is-sues (thermal interfaces, heat distribution, and fluid dynamics)and electromagnetic effects (parasitic elements, electromagneticcoupling, HF-losses, and electromagnetic interference (EMI) fil-tering) in conjunction with the electrical design since all theseareas significantly influence the size and efficiency of the sys-tem. Therefore, an automatic optimization procedure is appliedin this paper to maximize efficiency and/or power density. Withthis procedure, the efficiency, the power density, and their mu-tual influence on two widely used telecom power supplies con-cepts, i.e., a resonant converter and a phase-shift converter withcapacitive/inductive output filtering, are investigated.

The optimization procedure is based on analytic approacheswith sufficient accuracy but limited calculation effort insteadof general finite-element method (FEM)/computational fluiddynamics (CFD) simulations in order to limit the calculationtime. Consequently, analytical models and equations, which in-clude the magnetic devices, zero-voltage switching (ZVS)/zero-current switching (ZCS) losses, and HF-losses in the inte-grated transformer, have been derived and validated for thetwo converter types. Moreover, thermal models for the trans-former/inductor with integrated cooling system and models forthe volume of the required cooling system including fan havebeen developed [2], [3]. The optimization procedure also in-cludes methods for calculating the volume of the resonant andoutput capacitors.

Based on this procedure, power supplies (cf., Fig. 1) areoptimized with respect to power density for the parametersgiven in Table I. There, the characteristic of the powerdensity, the efficiency, and the volume distribution between the

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BIELA et al.: IMPACT OF POWER DENSITY MAXIMIZATION ON EFFICIENCY OF DC–DC CONVERTER SYSTEMS 289

TABLE ISPECIFICATIONS OF THE TELECOM POWER SUPPLIES CONSIDERED IN THE

OPTIMIZATION PRESENTED IN THIS PAPER

Fig. 2. Schematic of the phase-shift converter with (a) CDR and (b) capacitiveoutput.

components as functions of frequency are discussed. Forthe operating points with maximal power density, the lossdistribution is also presented. Furthermore, the sensitivity ofthe optimum with respect to junction temperature, cooling, andcore material is investigated.

Before the optimization procedure is presented in Section III,the current and voltage waveforms of the three topologiesand the main differences are explained in Section II. InSection IV, the models applied in the optimization procedureare briefly described. Thereafter, the results of the optimizationand comparison of the topologies are presented in Section V,and the two converter concepts are compared with respect to themaximal achievable power density and efficiency.

II. CONVERTER TOPOLOGIES

In order to find the limits of the achievable power densityand efficiency with an optimization procedure, those topologiesmust be identified first that show the best potential for volumeminimization while maintaining high efficiency. In literature,many different topologies have been proposed for telecom ap-plications [4]–[11], which could be basically divided into hardswitched, soft switched, and resonant converters. Due to highswitching losses, the hard-switched topologies do not allowto reduce the volume of the passive components by increas-ing the switching frequency and simultaneously having a highefficiency.

In the area of soft-switched converters, phase-shift convert-ers with current doubler (CDR) or with capacitive output filter(CTC) (cf., Fig. 2) [12] are promising representatives, whichshow low switching losses/high efficiency, a simple control, a

TABLE IIMAIN DIFFERENCE BETWEEN THE THREE CONSIDERED TOPOLOGIES

low number of components, and the potential for high powerdensity. Therefore, this concept and a series–parallel resonantconverter (SPR) are optimized in this paper (cf., Table II). TheSPR with capacitive or LC output filter, as shown in Fig. 4,is a promising converter structure since it combines the ad-vantages of the series resonant converter and the parallel res-onant converter. On one hand, resonant current decreases withthe decrease of the load and the converter can be regulatedat no load; on the other hand, good part load efficiency canbe achieved [13], [14]. Furthermore, the converter is naturallyshort-circuit-proof.

A. Phase-Shift Converter

In Fig. 2, a phase-shift converter with the two considered rec-tifier structures—a CDR and a center-tapped transformer withCTC is shown. The primary side of these converters and also thecontrol of switches are the same for both rectifier topologies.However, the current waveforms (cf., Fig. 3), and the relatedswitching and conduction losses, as well as the transformer de-sign are significantly influenced by the rectifier stage.

With a CDR on the secondary side, a transformer with twostandard windings can be applied. There, the turns ratio isNP /(2NS )—in the considered case 2.75:1—which leads to ahigh secondary voltage, which must be blocked by the rectifierdiodes (here, worst case 400 V/2.75 ≈ 145 V). The average cur-rent in the output inductors is half of the output current, which isalso roughly true for the secondary winding of the transformer.During states 1 and 3 (cf., Fig. 3), the current in the secondarywinding is equal to the output inductor current, which rises fromI1,CDR to Ioff ,CDR ,B , which is turned off by a MOSFET of legB. During states 2 and 4, the current is determined by the leakageinductance of the transformer. There, the current is decreasingrelatively slowly down to Ioff ,CDR ,A , since the voltage acrossthe leakage inductance is approximately equal to the forwardvoltage drop of the conducting power transistors. The value ofthe leakage inductance and the current at the switching instantmust not be too small in order to guarantee ZVS conditions forall four switches. For determining the power density/efficiencylimit, only the operating point with nominal output power isconsidered. Part load efficiency is neglected, since the aim isto determine the upper achievable limits. Consequently, a rela-tively low leakage inductance value (here, ≈2 µH) is sufficientfor charging/discharging the parasitic output capacitors of theMOSFETs. This inductance is realized by spatial separation ofthe transformer windings.


Fig. 3. Switching states and primary currents of the phase-shift converter with(a) CDR, (b) CTC and SPR with (c) LC filter and (d) C filter. Here, a smallerduty cycle has been used than nominal in order to improve the readability of thefigure.

In case the full bridge is combined with a center-tapped trans-former and a CTC, the series inductance, which is integrated asleakage inductance Lσ into the transformer, must be larger inorder to limit the rise of the current IP (cf., Fig. 3), since twovoltage sources are directly connected via the transformer. Dur-ing states 1 and 3, the voltage across Lσ is VIN − NP /NS VOUTand the current rises up to Ioff ,CTC ,B , which must be turnedoff by a MOSFET of leg B. In states 2 and 4, the voltage−NP /NS VOUT lies across Lσ and the current decreases downto Ioff ,CTC ,A , which is turned off by a MOSFET of leg A. Atthe beginning of the following state 3 or 1, the current in theleakage inductance must be decreased first down to zero beforeit could rise again. During this period, the energy stored in theleakage inductance is fed back to the dc link, which results ina reactive power flow. This reactive power flow is required forobtaining the ZVS condition in leg A. With the CDR, analogbehavior could be observed, but the energy is lower since theinductance is smaller.

The required turns ratio of the CTC transformer isNP :NS :NS —in the considered case 5.5:1:1 (assumed maxi-mum duty cycle < 0.85; cf., Table V)—resulting in maximal2VOUT across the rectifier diodes during the blocking state ifringing is neglected.

Fig. 4. Schematic of the SPR with (a) LC filter and (b) capacitive output.

B. Series–Parallel Resonant Converter

For the SPR, two different rectifier circuits are considered—acenter-tapped transformer with LC output filter and with capac-itive filter, as shown in Fig. 4, where, the output filter topol-ogy influences the behavior of the dc–dc converter significantly,since the LC filter acts more like a current source at the outputand the capacitive filter as voltage source. The current and volt-age waveforms are shown in Fig. 3, where besides the resonantcurrent IP , the voltage across the parallel capacitor VCP

and thecurrent IR1 + IR2 in the rectifier diodes are also shown.

In case of the LC output filter, the continuous (CCV) and thediscontinuous (DCV) capacitor voltage modes must be distin-guished [15]. Since the DCV mode usually occurs at heavy loadconditions, in Fig. 3, the waveforms for this mode are shown. Inthe figure, the voltage waveform of the parallel capacitor VCP

is clamped by the output current to zero for a certain period oftime, which leads to a discontinuous parallel capacitor voltageVCP

showing a large deviation from the purely sinusoidal shape.At the time when VCP

falls to zero, the resonant current IS issmaller than IOUT . As long as IS is smaller, the capacitor volt-age VCP

is clamped to zero by the negative difference betweenIS and IOUT [−(IS − IOUT], which flows through the rectifierdiodes. In other words, when IS is larger than IOUT , the pos-itive difference between the currents (IS − IOUT ) charges thecapacitor CP .

Due to the sinusoidal resonant current and the output inductorLOUT , the current in the rectifier diodes starts more smoothly re-sulting in a lower diode turn-on stress. In the secondary winding,however, flows a constant dc current along with an ac componentcausing higher transformer losses.

With the CTC, the current in the rectifier steps from zero tothe value of the output current. This could result in higher diodeforward recovery losses, depending on the diode semiconductortechnology, and an increased EMI noise level. The transformersecondary rms current, however, is lower, thus resulting in lowerlosses and a more compact transformer design.

Based on the required output voltage ripple of maximum300 mVpp and a maximum inductor ripple current of ±7.5%for the LC filter, the component values for the two topologiescan be determined (cf., Table III). The ripple current in the filtercapacitor in the topology with capacitive filter is much higherthan that for the LC filter. Applying electrolytic capacitors, thishigh ripple current results in a large filter volume due to the


TABLE IIICOMPONENT VALUES OF THE LC AND THE CTC SHOWN IN FIG. 4 FOR AN

OUTPUT VOLTAGE RIPPLE OF 300 mVpp

TABLE IVCOMPARISON OF LC AND CTC WITH ELECTROLYTIC OR CERAMIC

CAPACITORS

relatively high equivalent series resistance (ESR)/low currentcarrying capability of electrolytic capacitors. This is shown inthe second line of row “LC-Filter Size” in Table IV. The firstline represents the volume of the capacitor if just the capacitancevalue is considered and the ripple current is neglected. With theripple current, the capacitor volume increases more than by afactor of 10. Both values are based on the cuboid volume ofcylindrical electrolytic capacitors.

If the capacitance is realized by ceramic capacitors, the vol-ume decreases down to 0.32 cm3 including ripple current con-siderations. In both cases, the volume of the inductor (40.9 cm3)is based on very compact commercially available inductors,e.g., [16] and [17]. Due to the large inductor volume, the sizeof the LC filter is relatively large and would consume approxi-mately 10% (including interconnection) of the volume if a powerdensity of 10 kW/L is assumed.

With a capacitive filter and ceramic capacitors, the volumeof the filter elements decreases down to 5.4 cm3 , including thevolume of the printed circuit board (PCB) for mounting, and themaximum thermally possible ripple current increases to 233 A.A capacitive filter with electrolytic capacitors would result in afilter volume of 273 cm3 and a capacitance value of 36 mF if theripple current is considered. Taking just the required capacitancevalue into account, this volume decreases to 3.7 cm3 .

Since with the CTC, the volume of the filter is much smallerand the current in the secondary winding is lower, in the follow-ing section, only the resonant converter with CTC is consideredin the optimization performed with the optimization procedure.

Fig. 5. Automatic procedure for optimizing the volume/efficiency of an SPRwhile keeping the device temperatures below given limits.

III. OPTIMIZATION PROCEDURE

After identification of the topologies with the best potentialfor high power density and high efficiency, the componentsvalues must be chosen, so that the system volume becomesminimal and/or the efficiency maximal. Since the volume of thesingle components, which are mainly limited by the respectivemaximum operation temperature, depend, to some extent, oneach other, the optimization of the overall volume/efficiency isa quite involved task with many degrees of freedom.

Therefore, an automatic optimization procedure is appliedfor determining the optimal component values of the telecomsupply.

In Fig. 5, a possible flowchart of such a procedure is given,where the specification of the design parameters, like the inputand output voltage, the output power, temperature limits, mate-rial characteristics, etc., is the starting point of the procedure.These parameters as well as starting values for the free param-eters like NP , NS or CS , CP , LS /LOUT must be specified bythe user.

Based on the values for the series/leakage, respectively, theoutput inductance and the turn numbers of the magnetic com-ponents are modeled. In case of the phase-shift converter, themodels mainly consist of analytic expressions for the flux dis-tribution and the optimal thickness/diameter of the foil/wiresfor the windings [18]. For the resonant converter, a reluctancemodel of the transformer with integrated series inductance iscalculated. This model is combined with the converter modelfor calculating the flux distribution in the core [15], [20].


The converter model for the phase-shift converters is basedon analytic expressions with which the currents and the voltagesas well as the duty cycle and the constraints for ZVS conditionsare calculated. For the resonant converter, the operating point ofthe dc–dc converter is first estimated by an approximated fun-damental frequency analysis [21]. With the estimated values,the solution space for the analytic converter model [20] is re-stricted and the calculation time is reduced. The converter modelis based on a set of equations that are derived with the extendedfundamental frequency analysis [22] and solved numerically.The solutions are the operating frequency, the voltages, and thecurrents as well as the flux distribution of the integrated trans-former including phase information.

With the currents in the converter, the switching and conduc-tion losses of the MOSFETs and rectifier diodes are determined.These losses, the ambient temperature, and the maximum junc-tion temperatures of the semiconductor devices are used for cal-culating the volume of the semiconductor heat sink includingthe fan based on the cooling system performance index (CSPI),which is defined by

CSPI[W/K · L] =Gth,S -A [W/K]VolHS,Magn. [L]

(1)

and has been introduced in [3] (Gth,S -A is the thermal con-ductivity of the heat sink). Here, it is important to check theresulting volume of the cooling system, since with the scalingfactor CSPI, quite small volume for the heat sink/fan can result,which is difficult to manufacture. A possible solution is to com-bine heat sinks that are on comparable temperature levels, sothat one larger fan could be used for both heat sinks.

Besides the losses in the semiconductors, the volume andlosses in the resonant tank capacitors and/or output capacitorsare also calculated with the voltages/currents. These losses in thecapacitors must be limited to the maximum admissible values.

The volume and shape of the transformer/inductor core andtwo windings is determined in a second, inner optimization pro-cedure (light-gray-shaded region in Fig. 5). Here, the volume ofthe transformer/inductor is minimized while keeping the tem-peratures below the allowed limits. For this purpose, first thegeometrical degrees of freedom are reduced to 3 by determin-ing the core window width using the optimal winding thicknessand the turns number [21]. In case of transformers with inte-grated leakage inductance, the width of the leakage path (LFP)is also fixed by setting the flux density in the LEP to the samevalue as in the middle leg conducting the main flux.

Thereafter, the core and winding losses are calculated as func-tions of the three remaining geometrical variables [a, b, d; cf.,Fig. 7(a)]. With the losses and the thermal model of the trans-former/inductor, the temperature distribution in the core andwinding could also be calculated as a function of the variablesa, b, and d. The peak temperatures in the windings and thecore are, together with the maximum allowed temperatures, theconstraints for the following minimization of the volume includ-ing the volume of cooling system for the magnetic device [cf.,Fig. 7(b)]. Furthermore, the variables a–e, defining the trans-former/inductor geometry, can be restricted in order to preservecertain limitations resulting from the manufacturing process.

Fig. 6. Equivalent circuit of the SPR with CTC.

In the inner optimization loop, it is also possible to maximizethe efficiency of the transformer/inductor, if an upper limit forthe volume is given.

Together with the volumes of the capacitors/heat sink, theminimized transformer/inductor volumes are passed to theglobal optimization algorithm. This algorithm systematicallyvaries the values of the free parameters until a minimal systemvolume or maximal efficiency is obtained. This procedure is rel-atively fast/simple for the phase-shift converters since the num-ber of interdependencies is small, but in case of the resonant con-verter, the models are complex and the calculation/computationeffort is huge.

This optimization procedure could also be applied to otherproblems by extending and/or replacing the utilized models,which are presented in the following section.

IV. MODELS

In the subsequent paragraphs, the different models of the opti-mization procedure are explained. First, the analytical convertermodel is derived, and then the equations for the semiconductorlosses and the model for the resonant tank capacitor volumes. Fi-nally, the loss equation and the thermal model of the transformerare presented.

A. Analytical Converter Model

With the analytical converter models, the currents and thevoltages as well as the operating point (duty cycle, frequency,phase shift, etc.) for the phase shift full bridge with CDR orcenter-tapped transformer and the series–parallel resonant con-verter with CTC are calculated.

In case of the SPR [cf., Fig. 4(b)], the models are partlybased on the extended fundamental frequency analysis (E-FFA)proposed in [15], [20], and [22], where the currents and voltagesare represented by their fundamentals, as shown in Fig. 6. In themodel, the control method described in [15] with ZVS conditionin one leg and ZCS condition in the other leg as well as controlby frequency and duty cycle are also considered in the equations.This control method significantly reduces the switching losses.

For the resonant converter with purely CTC, the E-FFA hasbeen improved so that not only the fundamental component isconsidered but also the third harmonic, since it significantlyinfluences the behavior of the converter. Thus, both the pri-mary resonant current IP and the secondary resonant current IS

are sinusoidal with a superimposed third harmonic component.Furthermore, it is assumed that the output voltage is constantand that the components are ideal. The major procedure of the


analysis is to determine the impedance ZC pR of the parallelconnection of CP and the rectifier at first. With this impedance,the input impedance Z of the resonant circuit, seen by the H-bridge/voltage source VAB (cf., Fig. 6), could be calculated. Inthe impedance Z, the reluctance model of the transformer is alsoincluded.

In the next step, two equations for each harmonic can beset up. The first equation describes the relation between thephase shift of the primary current IP and the fundamental com-ponent of the H-bridge voltage VAB (1) , which is determined,on one hand, by the duty cycle D, and on the other hand,by the impedance Z. The second expression relates the inputimpedance of the resonant tank to the amplitude of the reso-nant current. These equations are derived in [20] and are solvednumerically in the optimization procedure.

B. Semiconductor Losses

For calculating the volume of the heat sink for the semi-conductors with (1), the maximum operating temperature andthe thermal resistance between junction and heat sink of thesemiconductors are required. These values can be derived fromthe data sheets of the applied semiconductors. Furthermore, thelosses in the four MOSFETs including antiparallel diode andtwo rectifier diodes must be calculated. Based on the currentscalculated with the converter models, the rms currents in theMOSFETs and the resulting conduction losses can be calcu-lated. Here, it is assumed that always one MOSFET per leg isturned on, so that the current does not flow via the antiparalleldiode but in reverse direction through the MOSFET.

For the rectifier diodes, an approximately constant forwardvoltage drop is assumed, so that the conduction losses can becalculated with the average currents. The switching losses of thediodes are neglected since it is assumed that Schottky diodes areused.

Due to the ZVS condition, the switching losses cannot becalculated based on the data sheet information. Instead, themeasured values, which have been performed with the appliedAPT50M75 MOSFETs from Microsemi (former AdvancedPower Semiconductors) [21], are used in the optimization pro-cedure. Based on these measurements, the losses per MOSFETcan be determined by

PZVS[W]=(1.9e−7I2

off [A] − 3.8e−6Ioff [A] + 1.4e−5) f [Hz]

in case the current turned off by the MOSFET is

Ioff ≥ 15 A (2)

and they are negligible if the current Ioff is below 15 A.With the applied control method, one leg of the resonant con-

verter would switch at ZCS condition. However, if the ZCS leg,which should switch at the zero crossing of the resonant current,is switched slightly before the zero crossing, the MOSFET hasto turn off a small current. Because of the fast switching andthe large output capacitance of the MOSFET, this current doesnot cause relevant turn-off losses. In case the turned off currentis large enough, so that it charges the MOSFET capacitancesduring the interlocking delay [15], the opposite MOSFET turns

on at zero voltage. Consequently, the switching losses in theZCS leg are negligible [21].

With the explained approaches, the semiconductor losses canbe calculated and the heat sink temperature and volume [cf., (1)]can be determined so that the maximal junction temperatureis not exceeded. For the efficiency calculation, the losses inthe gate drive circuits, which can be calculated with the gate-charge/capacitance and which increase linearly with frequency,must also be considered.

C. Resonant Tank Capacitors

The capacitors of the resonant tank and the CTC carryinghigh-frequency currents with a relatively high amplitude. Inorder to limit the losses and the temperature rise, dielectricswith a low-loss factor tan δ are required. There are basicallytwo good choices: either foil capacitors with polypropylene orC0G/NP0-type ceramic capacitors. Since the resulting volumewith foil capacitors is significantly larger than for ceramics ascould be derived from data sheets, the latter are chosen for theconsidered telecom power supply.

For calculating the volume required for realizing the seriesand parallel capacitor, a commercial 3.9-nF/800-V C0G ceramiccapacitor in a 1210 SMD housing from Novacap [23] has beenchosen as reference component, since it offers the highest capac-itance per volume rating at ac voltages with a high frequencyand amplitude. Based on this capacitor, the resulting volumecould be calculated by scaling. Here, the volume for mountingthe components on a double-sided PCB is also considered in theoptimization procedure.

In case of the filter capacitor, a 2.2-µF/100-V X7R ceramiccapacitor in a 1210 housing manufactured by muRata [24] isused as reference element. The capacitance value is calculatedwith the currents based on the maximum allowed ripple voltageof 300 mVpp at the output.

With the currents, the losses in the capacitors can also bedetermined with the loss factor. These are compared with themaximal allowed values, which can be derived by the loss limitof 0.35 W per 1210 housing at 40 C ambient temperature and125 C maximal dielectric temperature. Here, the decrease of thecapacitance with temperature and dc voltage is also consideredin the optimization procedure.

D. Transformer Model

In the optimization procedure shown in Fig. 5, the shape ofthe transformer is also optimized for minimal volume in theinner loop while the hot spot temperatures are kept below thelimits. For this inner optimization loop, the volume, the losses,and the temperature distribution in the transformer are neededas function of the geometry. The geometry could be describedby five variables, as shown in Fig. 7(a), where the constructionof the transformer and the definition of the variables are given.Here, it is assumed that copper foil is used for realizing theprimary and secondary windings, since the thermal resistancebetween the winding layers is lower. Furthermore, per layer,only one turn is realized.


Fig. 7. (a) Geometry of transformer with integrated series inductance andHTC/heat sink for cooling. Parameters a, b, and d are the degrees of freedomin the optimization. (b) Distributed thermal model of the cooling system shownbefore with the heat sink on the left-hand side, a gap between heat sink bridgedby the HTC and transformer, and the transformer with winding on the right-handside.

In Fig. 7(a), a transformer with integrated leakage inductanceis shown [25], where the secondary winding encloses the middleleg and the primary winding the middle and one outer leg, whichconducts the leakage flux. This type of transformer is used in theresonant converter and in the phase-shift converter with CTC. Incase of the phase-shift converter with CDR, a transformer whereboth windings enclose only the middle leg is assumed, and therequired series inductance is integrated by spatial separation ofthe windings.

In order to maximize the power density of the transformer, anadvanced cooling method as described in [2] has been applied.With this method, the losses in the windings and the core aretransferred via a heat transfer component (HTC) to an additionalheat sink for the transformer.

For calculating the temperature rise, the losses in the windingsand the core are required. The winding losses are calculatedby a 1-D approach, which includes skin and proximity effectlosses, and the thickness of the foil is optimized as describedin [18]. The core losses are calculated by the approach presentedin [26], which is based on Steinmetz parameter [27] and therate of magnetization (dB/dt). The flux density in the core isdetermined by the optimization algorithm of the transformer, sothat a minimal volume results and the flux density is below themaximal allowed one [19].

With the losses, the temperature distribution in the trans-former could be calculated based on the thermal model shown inFig. 7. This model describes the heat flow from the winding/core

via the thermal interfaces and HTC to the heat sink/ambient bydistributed thermal resistances (Rth per length). The calculationof the temperature profile is based on transmission-line equa-tions, which is described in detail and validated in [2].

For improving the heat flow within the windings made of foiland also from the winding to the HTC, a thermally conductiveinsulating material is used [28]. Moreover, thermal grease be-tween the core and the HTC and a cover pressing the windingon the HTC are used. This cover is not shown in Figs. 1 and7(a).

After the volume has been minimized, it is passed to theglobal optimization algorithm, where it is used for calculatingthe system volume and varying the parameters systematically.

V. CALCULATION RESULTS

Based on the procedure shown in Fig. 5, the three consid-ered topologies have been optimized for a telecom supply withthe specification given in Table I. As already mentioned, dur-ing the optimization, only the nominal operating point has beenconsidered—part load efficiency, etc., have not been consid-ered. The results presented are based on the following compo-nents/limitations if not stated differently:

1) core material: N87 from Epcos (Tmax ≤ 115 C);2) windings: foil windings (Tmax ≤ 125 C);3) center-tapped secondary winding;4) MOSFETs: APT50M75 from Microsemi (former APT);5) rectifier diode: APT100S20 from Microsemi;6) capacitors CS and CP : reference 3.9-nF 800-V COG se-

ries from Novacap;7) CSPI: 23 (for transformer and semiconductor heat sink);8) maximal junction temperature Tj,max ≤ 140 C.A further requirement is the overall height of the supply that

should be below 1 U (≈44 mm), which significantly influencesthe design of the transformer/inductors [especially the height b;cf., Fig. 7(a)] as well as the cooling system.

In order to obtain the dependency of the power den-sity/efficiency on the operating frequency, the global optimiza-tion algorithm (cf., Fig. 5) is replaced by manual parametervariation, which allows to calculate the power density/efficiencyfor various frequencies. In Fig. 8, the resulting characteristic ofthe power density and efficiency as functions of frequency areshown. The maximal achievable power density is 19.1 kW/Lfor the resonant converter and 15/11.7 kW/L for the phase-shiftconverter with CTC/CDR (1 kW/L = 16.4 W/in3). Here, onlythe net volume of the components including PCBs/housings isconsidered. The volume between the components required formounting/insulation and due to not fitting housings (e.g., cubetype and cylindrical shapes) is not considered, since it dependssignificantly on the 3-D arrangement of the components and thedesign of the supply. This volume adds significantly to the totalconverter volume, so that the resulting power density is lowerthan the calculated value.

In case of the resonant converter prototype shown in Fig. 1,the calculated power density is 15 kW/L, which is lower thanthe calculated 19.1 kW/L due to the newer components appliedin the presented optimization. The power density of the final


Fig. 8. (a) Power density and (b) efficiency of the phase-shift converter withCTC, CDR, and SPR with C-filter (SPR-C) as a function of switching frequency.

assembled prototype system is 10 kW/L if a similar scaling fac-tor (2/3×) is assumed for the three optimized converter topolo-gies, 12.7 (SPR-C), 10 (CTC), and 7.8 kW/L (CDR). The powerdensity of the CDR could be increased a bit by using integratedmagnetics, where the two inductors and the transformer couldbe realized with only one core [29], [30].

The efficiencies at the operating point with maximal powerdensity are 96.2% for the resonant converter and 95%/94.8% forthe CTC/CDR, as shown in Fig. 8(b). At the operating point withminimal losses, an efficiency of 96.3% at a switching frequencyof approximately 220 kHz could be reached with the resonantconverter. The switching frequency is higher than that at theoperating point for maximal power density, since the losses ofthe passive components reach a minimum at this frequency. Dueto the increased volume for the semiconductor heat sink, thisoperating point results in a power density of only 17.1 kW/L.

In case of the phase-shift converter with CTC, the maximalefficiency is achieved at the lowest considered operating fre-quency of 25 kHz. Here, the CTC reaches 95.4%. The maximalefficiency for the CDR is 95.1%, which is achieved at 100 kHz.

In Fig. 9, the distributions of the volumes on the magnetic de-vices (transformer and inductor), the capacitors (resonant tankand output), the heat sink for the semiconductors, and the re-maining components like housings, control board, or gate drivefor the three topologies are shown. It can be seen that withrising switching frequency, the volume of the semiconductors’heat sink increases due to rising switching losses. The shape ofthe volume distribution as function of frequency is strongly de-termined by the passive components, which define a frequencyrange from approximately 100 to 300 kHz of high power den-sity. Outside this range, the volume of the magnetic devicesincreases, and at higher frequencies, the volume of the semi-conductor heat sink also rises significantly, which limits theachievable power density. At lower frequencies, the volume ofthe magnetics rises due to increasing volt-seconds and a lim-ited maximum allowed flux density of the core materials. On

Fig. 9. Volume versus frequency for the phase-shift converter with (a) CDR,(b) CTC, and (c) SPR-C, split in transformer, heat sink, and others, i.e., thevolume of the control, the auxiliary, the gate drive, the semiconductor hous-ings, and the dc-link/output capacitor. For the CDR, the volume of both outputinductors is shown.

the other hand, rising core and winding losses result in a risingvolume for higher operating frequencies.

In case of the CDR, the increase of the inductor volume forlower frequencies is relatively high (cf., Fig. 9(a): 25–50 kHz),so that one output inductor including cooling system becomeslarger than the transformer. This is caused by the significantlyincreasing inductance value of the output inductor, which isrequired in order to limit the current ripple. For 25 kHz, aninductance value of approximately 50 µH, and for 200 kHz,approximately 6.7 µH are obtained. Due to the high inductancevalue, the number of turns increases from 5 to 51, so that thelosses increase by a factor of 5 between 25 and 200 kHz. Withthe losses, the volume of the cooling system for the inductorsalso increases significantly. At the optimal operating frequencyof 200 kHz, the volume of one output inductor (71 cm3) issmaller than the transformer volume (90 cm3).

Although the series inductance, which is integrated in thetransformer, of the resonant converter (26.5 µH) is larger thanthat of the CTC (12.4 µH), the transformer of the SPR-C(110.8 cm3) is smaller than that of the CTC (140.9 cm3). Thisresults from the fact that the volts-seconds on the primary side ofthe CTC transformer are larger (74 µV·s) than that of the SPR-C


Fig. 10. Distribution of the losses and volumes of the phase-shift converterwith CTC/CDR and SPR-C.

(51 µV·s), since the optimal switching frequency is lower (CTC:100 kHZ/SPR-C: 135 kHz), and the voltage waveform (CTC:rectangular/SPR-C: sinusoidal) of the CTC also leads to highervolts-seconds. The higher volt-seconds require a larger corearea, which leads to a larger core volume and a larger windinglength. The larger winding length and the fact that the turns ra-tio of the CTC (11:2) is lower than that of the SPR-C (14:2)cause higher winding losses in the primary winding (CTC:PWdg ,P = 13 W/SPR-C 5.7 W). Since the losses of the primarywinding must flow via the secondary winding to the HTC/heatsink (cf., Fig. 7), this causes higher temperature drops in thewinding, which requires a better/larger cooling system.

The volume of the other components, i.e., the volume of thecontrol board, the gate drive, the auxiliary supply, the semicon-ductor housings, the dc-link capacitor (=88 µF), and the outputfilter capacitor, is relatively constant for all three converter types,since only the volume of the output capacitors, which has only asmall share of the other components’ volume, is significantly de-pendent on the operating frequency. This volume decreases withincreasing frequency. Since the output capacitor of the CDR isrelatively small due to the filter inductors, the volume of theother components is approximately independent of frequency.

A more detailed distribution of the volume as also the lossesof the three optimized considered topologies is given in Fig. 10,where, the volume and the losses of the magnetic devices, the ca-pacitors, the semiconductors/heat sink, and the remaining com-ponents for the operating point with maximal power density arepresented. Further details are shown in Table V.

In Fig. 11, the losses of the transformer, MOSFETs, and rec-tifiers as functions of the frequency are shown. It can be seenthat the shape of the switching loss curve resembles approxi-mately the function volume of the heat sink versus frequency.The conduction losses of the MOSFETs and rectifier diodes arealmost constant, since the turns ratio and the duty cycle are ap-proximately constant. This is especially true for the CTC, sincethere the turns ratio and the duty cycle, which are independentof frequency, directly determine the conduction losses. In caseof the resonant converter, the switching losses are very small for

TABLE VRESULTING SPECIFICATION OF THE OPTIMIZED 5-KW TELECOM SUPPLIES

the whole frequency range, since the switched current is closeto 15 A [cf., (2)].

For the CDR, the switching losses increase significantly athigher frequencies. This is related to the fact that the CDRat the secondary side causes a short circuit during the free-wheeling period, since both rectifier diodes are conducting (cf.,Fig. 3/Fig. 2). During this period of time, no energy is trans-ferred to the output and the current in the leakage inductance(here, 2 µH) decreases only slightly due to the voltage dropof the MOSFETs. The current in the leakage inductance at theend of the freewheeling period is required for achieving ZVScondition for leg A. After the freewheeling period, the currentin the leakage inductance must be reversed and the amplitudemust rise up to the current in the output inductor before onerectifier diode stops conducting. As long as both rectifier diodesare conducting, no energy is transferred, although the input volt-age of the transformer is equal to the dc link voltage. At higherfrequencies, the time for reversing the current in the leakage in-ductance takes a larger and larger share of the duty cycle, sincethis time is fixed by the value of the leakage inductance anddc link voltage. Therefore, the time share for transferring thepower becomes smaller and smaller, and the current amplitude


Fig. 11. Losses versus frequency for the phase-shift converter with (a) CDR,(b) CTC, and (c) SPR-C, split in winding, core conduction (MOSFET + recti-fier), and switching losses.

must increase, so that the output power is constant. Mainly thepeak values Ioff ,CDR ,A and IOff ,CDR ,B increase, and the rmsvalues increase only slightly. The increasing peak values leadto higher switching losses [cf., (2)] and also higher conductionlosses, since the rms values rise with higher peak currents whilethe average values are constant due to the shorter conductiontime. At higher frequencies, the value of the leakage inductancecould be slightly reduced, which would limit the increase of theswitching losses at higher frequencies a bit. Since the powerdensity is anyway low at higher frequencies, this has not beenconsidered during the optimization.

The relatively low optimal operating frequency for maximalpower density is achieved, since the whole system is consideredin the optimization. In case only the transformer for a fixed inputvoltage/current level would be considered, the optimal operatingfrequencies for maximal power density of the transformer wouldbe (significantly) higher.

Remark: For the earlier considerations and calculations, it hasbeen assumed that the windings of the transformers/inductorsfor the three considered systems are made of copper foil. Inorder to decrease the copper losses a little bit by increasingthe cross-sectional area, litz wire could be used instead of thecopper foil, which offers more degrees of freedom duringthe design process. However, the thermal resistance betweenthe single litz wires and an HTC/heat sink is much higher than

TABLE VICOMPONENTS PARAMETERS OF THE SIMULATION MODELS RESULTING FROM

THE OPTIMIZATION PROCEDURE

Fig. 12. Simulation results for the SPR with the parameters resulting from theoptimization procedure.

TABLE VIISIMULATION RESULTS FOR THE THREE CONSIDERED CONVERTER TOPOLOGIES

with foil, since the contact area is much smaller. Furthermore,the reproducibility of a certain value of the thermal resistance ismuch more difficult with litz wire than with foil. Therefore, litzwire has been not considered during the comparison.

A. Simulation-Based Results

With the component values and control parameters result-ing from the optimization procedure (cf., Table VI), simulationmodels for each of the three converters have been developed inSimplorer (Ansoft Corporation).

The most important simulated waveforms are given in Fig. 12,and the corresponding values for the SPR are given in Table VII.


Fig. 13. Simulation results for the phase-shift converter with capacitive outputwith the parameters resulting from the optimization procedure.

Fig. 14. Simulation results for the phase-shift converter with CDR output withthe parameters resulting from the optimization procedure.

For the phase-shift converter with capacitive output and for thephase-shift converter with CDR, the same waveforms are shownin Figs. 13 and 14, respectively. These waveforms correspondvery well with the theoretical waveforms presented in Fig. 3.Also, the numerical values in Table VII agree very well with theanalytically calculated ones. It can be seen that the simulatedvalues for the duty cycle are larger than the calculated ones, sincein the simulation, more “parasitic” effects—like the forwardvoltage drop of the rectifier diodes and parasitic resistors ofthe transformer—are considered. In the analytical model, thesehave been neglected in order to obtain simple, robust, and aboveall fast calculable equations.

B. Power Density Barriers

In the preceding paragraph, the power density values for avail-able components/technologies have been presented. Now, theinfluence of different parameters on the achievable power den-sity is investigated. In Table VIII, the achievable power den-sity and efficiency for the phase-shift converter with CTC isshown for different parameter variations. First, it is assumedthat the maximal allowed junction temperature is increased from150 C to 200 C (e.g., by applying SiC switches and appro-priate packaging)—the remaining parameters (also the RDS,ON)are not modified. By this means, the volume of the semicon-ductor heat sink significantly decreases, so that a power densityof 17.1 kW/L (before 14.7 kW/L) can be achieved. It is im-portant to note that with the heat sink, the size of the area formounting the semiconductors is also shrinking. Consequently,the thermal resistance between the semiconductors and the heatsink increases, so that the gain in power density is very limited.

TABLE VIIIINFLUENCE OF DEVICE PARAMETERS/MAXIMUM ALLOWED TEMPERATURES ON

MAXIMAL ACHIEVABLE POWER DENSITY FOR THE PHASE-SHIFT CONVERTER

WITH CTC

This effect has not been considered in Table VIII. In the secondrow, again the achievable power density for an increased powerdensity is shown. But here, the increase of the ON resistance ofthe MOSFET due to the higher junction temperature has beenconsidered. With the higher ON resistance and the resulting con-duction losses, the maximum power density decreases down to16 kW/L.

In the third row of Table VIII, it has been assumed that thethermal resistance between the chip and the heat sink is de-creased. Again, this measure allows to shrink the volume of thesemiconductor heat sink, since its temperature can be increased.The power density rises up to 16.1 kW/L. By increasing the op-erating temperature of the transformer, a value of 16.8 kW/Lcould be reached. The rising copper losses due to the risingresistivity limit the gain of power density.

Another option would be to decrease the switching losses by50%. Due to the ZVS condition, this measure results in onlysmall increase of the power density to 15.9 kW/L. A bigger stepcould be achieved by reducing the forward voltage drop of therectifier diodes by a factor of 2, which results in a smaller volumeof the heat sink. This would lead to a power density of 17 kW/Land an efficiency of 95.8%. A reduction of the conduction lossesof the rectifier could be achieved by synchronous rectification.The RDS,ON of the applied MOSFETs, however, must be verylow—in the considered case, ≈8 mΩ at 125 C for cutting thelosses in half. Since the rectifier diodes and their heat sink arealready quite small, a synchronous rectifier would not help toimprove the power density but only the efficiency.

In case all measures are combined (1+3+4+5+6—not 2), apower density of 21.6 kW/L and an efficiency of 96.3% can beachieved. Similar improvements can be expected for the othersystems in case the same measures are taken. A further aspectthat could influence the power density is the packaging of thecomponents [31], which is out of the scope of this paper.


Summing up, this leads to two possible ways to improve thepower density.

1) For components users/supply manufacturers:a) improve the thermal coupling between the semicon-

ductors and the heat sink (e.g., by low-temperaturesoldering);

b) apply advanced cooling methods for the passivecomponents [2].

2) For device manufacturers:a) further reduce the conduction losses of the power

semiconductors;b) reduce the magnetic materials HF losses;c) decrease the thermal resistance between chip and

housing/base plate;d) increase operating temperatures.

Increasing the junction temperature while decreasing the chipsize at the same time will not help to improve the power densityof the converter significantly, since the ON resistance increasesand the area of the heat sink, where the components could bemounted, is often a limiting factor.

VI. CONCLUSION

In this paper, three topologies for telecom supplies—a phase-shift converter with CTC and with CDR and a series–parallelresonant converter with CTC—have been optimized with re-spect to power density. Here, maximal 12 kW/L (19 kW/L purecomponent volume) is obtained for SPR. The optimal operatingfrequency with respect to the power density is approximately135 kHz. For the phase-shift converter, 10 kW/L is obtained fora CTC and 7.8 kW/L for a CDR. Again, the optimal operatingfrequencies are relatively low—approximately 100 kHz for theCTC and 200 kHZ for the CDR. Here, the efficiencies are 96.2%for the SPR, 95% for the CTC, and 94.8% for the CDR. Thesevalues slightly improve (≈0.8%) if the converter is optimizedfor efficiency, but the power density decreases significantly.

The presented optimizations have been performed for opera-tion at nominal output power—part load efficiency, soft switch-ing range, costs or EMI issues, etc., have been neglected. In casethese constraints are also considered, the achievable power den-sity will decrease to approximately 6–8 kW/L for the resonantconverter. Also, in combination of a PFC converter with a powerdensity of 6–8 kW/L, a system power density of 3–4 kW/L foran air-cooled supply would result.

For increasing the power density, thermal management is es-pecially decisive. Direct cooling of the magnetic components aspresented in [2], and improving the thermal resistance betweenthe chip and the heat sink by low-temperature solders, whichcould replace the thermal grease, are effective measures to re-duce the system volume. Semiconductors with reduced lossesor improved core materials are other possibilities to increase thepower density and efficiency. These approaches, however, canonly be followed by device/material manufacturers and are notdirectly accessible to supply manufacturers.

The largest gain results from optimizing the system parame-ters for the given specifications. The question which topology

should be applied is important, but does not influence the achiev-able power density as much as the optimization.

ACKNOWLEDGMENT

The authors would like to thank the European Center of PowerElectronics (ECPE) for supporting the work about the powerdensity limits presented in this paper.

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Juergen Biela (S’04–M’07) received the Diploma(with honors) in electrical engineering fromFriedrich–Alexander Universitat (FAU) Erlangen, Er-langen, Germany, in 2000, and the Ph.D. degree fromthe Power Electronic Systems Laboratory (PES),Swiss Federal Institute of Technology (ETH Zurich),Zurich, Switzerland, in 2005.

During his studies, he was engaged in resonant dc-link inverters at Strathclyde University, Scotland, andin the active control of series-connected integratedgate commutated thyristors (IGCTs) at the Technical

University of Munich. From January 2000 to July 2001, he worked on inverterswith very high switching frequencies, SiC components, and electromagneticcompatibility (EMC) at the Research Department, A&D Siemens, Germany.Since January 2006, he has been a Research Associate at the Power ElectronicSystems Laboratory, ETH Zurich.

Uwe Badstuebner (S’07) received the Diploma(M.S. degree) with honors from the Technical Uni-versity of Berlin, Germany in December 2006.

He is currently working toward his Ph.D. degreeat the Power Electronic Systems Laboratory, ETHZurich, Switzerland.

Johann W. Kolar (S’89-M’91–SM’02) received thePh.D. degree (summa cum laude) in industrial elec-tronics from the University of Technology Vienna,Vienna, Austria.

From 1984 to 2001, he was with the Univer-sity of Technology Vienna, where he was teachingand working in research in close collaboration withthe industry. In February 2001, he was appointed asa Professor and the Head of the Power ElectronicsSystems Laboratory, Swiss Federal Institute of Tech-nology (ETH) Zurich, Switzerland. He has proposed

numerous novel converter topologies, e.g., the VIENNA rectifier and the three-phase ac–ac sparse matrix converter concept. He has authored or coauthoredover 200 scientific papers published in international journals and conferenceproceedings, and has filed more than 50 patents. His current research interestsinclude ultracompact intelligent ac–ac and dc–dc converter modules employ-ing latest power semiconductor technology (SiC), novel concepts for coolingand active electromagnetic interference (EMI) filtering, multidisciplinary sim-ulation, bearing-less motors, power microelectromechanical systems (MEMS),and wireless power transmission.

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