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Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer Science and Computer Engineering

Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

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Page 1: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupts

Alexander Nelson

October 7, 2019

University of Arkansas - Department of Computer Science and Computer Engineering

Page 2: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

What is an Interrupt?

Interrupt – signals a request to CPU to handle an event

CPU can grant request & jump to separate instruction memory to

handle

When finished, CPU returns to code running prior to interrupt

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Page 3: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupts

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1https://virtualirfan.com/history-of-interrupts

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Page 4: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Overview

Sequence:

• Interrupt Event – What triggers the interrupt

• Interrupt Request – Flag set in register asking for handling

• ISR – Code executed to handle the interrupt event

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Page 5: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Service Routine

Interrupt Service Routine – ISR

Piece of code to handle a given interrupt event

Typically short and atomic (i.e. No Nested Interrupts)

Why?

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Page 6: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Service Routine

Interrupt Service Routine – ISR

Piece of code to handle a given interrupt event

Typically short and atomic (i.e. No Nested Interrupts)

Generally implemented inside a function with no parameters & no

return value

Why?

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Page 7: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Sources

Hardware Interrupts:

• Interact with external devices or peripherals

• May be with internal peripherals on chip (e.g. Timer/ADC)

Software Interrupts:

• Triggered by software commands – Usually special operating

system tasks

• e.g. Handling exceptions

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Page 8: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Common Interrupt Sources

Common sources for interrupts:

• Input pin change

• Hardware timer overflow/compare-match

• Serial Peripheral Communication

• UART/SPI/I2C – Receive/Transmit Ready/Complete

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Page 9: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Advantage over Software Polling

Avoid writing code that must frequently check status of pins/flags

Polling = “busy wait” – CPU executes executions waiting for an

event

Example:

while(!Timer1CompareFlag); //Wait for Timer1 to match

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Page 10: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Service Flow

After execution of each instruction, check any interrupts

If interrupt – save PC & jump to ISR

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Page 11: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Priority

Interrupt events can co-occur

Especially when waking from a sleep mode

How do you determine interrupt priority?

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Page 12: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Priority

Interrupt events can co-occur

Especially when waking from a sleep mode

How do you determine interrupt priority?

Static vs. Dynamic – Is priority defined at program or run time?

User vs. System defined – Is priority configurable?

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Page 13: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Vector Table

Interrupt Vector – “dedicated or configurable position in memory

specifying address to which execution should jump”

Interrupt Vector Table – Table of all program memory jumps for

each interrupt request

Maps events/requests to functions – Table of function pointers

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Page 14: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Nested Vectored Interrupt Controller (NVIC)

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Page 15: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupt Vector Table

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Page 16: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

NVIC Registers

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Page 17: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

How is it implemented?

Often IVT implemented as list of unconditional jumps at top of

program memory

AtMega 328P Interrupt Vector Code16

Page 18: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Keeping ISR Short

ISRs affect normal execution of program

• Can block handling other interrupts

Common strategy for ISR is to keep as short as possible

Creates stable timing and avoids system from starvation

• Not being able to service other interrupts fast enough

Each ISR should do only what it needs to do at time of event

If long ISRs are needed, consider allowing nested interrupts

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Page 19: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Interrupts and Tasks

Page 20: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Recall: Tasks

What is a task?

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Page 21: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Recall: Tasks

What is a task?

Task – Unique continuously executing behavior

e.g.

• Flash LED

• Sample Sensor Input at given frequency

• Refresh LCD

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Page 22: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Concurrent Tasks

Concurrent tasks – Tasks executed during same time window

How did we implement concurrency?

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Page 23: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Concurrent Tasks

Concurrent tasks – Tasks executed during same time window

How did we implement concurrency?

State machines with different tick frequencies

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Page 24: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Event-Driven Programming

Event-Driven – Flow of the program determined by events

Callback – executable code, passed as argument, expected to call

back argument at given time

Interrupt – signals a request to CPU to handle an event

ISR – executable code, determined by IVT, expected to call

function at given time

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Page 25: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Example

Design a concurrent state machine that determines if an active low

button on pin A0 is depressed

If the button is pressed, then three LEDs on PortB cycle clockwise;

otherwise they cycle counter clockwise

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Page 26: Interrupts - University of Arkansascsce.uark.edu/~ahnelson/CSCE4114/lectures/lecture12.pdf · Interrupts Alexander Nelson October 7, 2019 University of Arkansas - Department of Computer

Example

Modify the previous SM to do the same with event driven behavior

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