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Components:
Input (mouse, keyboard)Output, (display, printer),M (di k d i DRAM SRAM CD)Memory (disk drives, DRAM, SRAM, CD)Central processing unit (CPU)
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Languages
Program: a sequence of instructions describing how to perform a certain taskperform a certain task Three types of programming languages
– Machine languages
• Strings of numbers giving machine specific instructions• Example:
1300042774+1300042774
– Assembly languages
• English-like abbreviations representing elementary g p g ycomputer operations (translated via assemblers)
• Example:LOAD BASEPAY
– Other high-level languages: C, C++ 3
Example: C++ Environment
Phases of C++ Programs:1. Edit
Program is created inthe editor and storedon disk.
Editor Disk
1. Edit2. Preprocess(#include)3. Compile
Preprocessor programprocesses the code.
CompilerCompiler createsobject code and storesit on disk.
Preprocessor Disk
Disk
4. Link5. Load6 Execute
PrimaryMemory
Linker links the objectcode with the libraries,creates a.out andstores it on disk
Linker Disk
6. Execute Loadery
Loader puts programin memory.
.
...
Disk
CPU takes eachinstruction and
CPU
PrimaryMemory
..
executes it, possiblystoring new datavalues as the programexecutes..
.
.
.
.
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One method of executing a program written in L1 is firstto replace instruction in it by an equivalent sequence ofinstructions in L0---------------------------------------------------------------------------------translation------------------------------
Other technique is to write a program in L0 that takes programs in L1 as input data and carries them ------------
I t t ti-------------------------Interpretation------------------------------
Interpreter as we will see In ch2: A program that fetches p p g, examines, and executes the instruction.
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Contemporary Multilevel Machines
A six-level computer. pThe support method for each level is indicated below it .
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Level 0: Digital Logic Level• This level is where we find digital circuits (the chips).• Digital circuits consist of gates and wires• Digital circuits consist of gates and wires.• These components implement the mathematical logic of all other levels.
Level 1: Michroarchitecture level• Collection of registers that forms a local memory. • ALU (arithmetic logic unit). • Registers are connected to ALU to form (DATA PATH).• Its job is to implement the ISAIts job is to implement the ISA • A control unit decodes and executes instructions and moves data through thesystem. Control units can be microprogrammed or hardwired. A microprogram is a program written in a low-level language that is implemented by the h d (i t t f th i t ti t l l 2)hardware(interpreter for the instruction at level 2).
Level 2: Instruction Set Architecture (ISA)• Interface between hardware and low-level software• Consists of instructions that are particular to the architecture of the machine.• Programs written in machine language need no compilers, interpreters, or assemblers.• Modern instruction set architectures:• Modern instruction set architectures:IA-32, PowerPC, MIPS, SPARC, ARM, and others
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Level 3: operating system machine level
• Some of the level 3 instructions are interpreted by the operating system and some• Some of the level 3 instructions are interpreted by the operating system and some are interpreted directly by the microprogram.
Level 4: Assembly Language Level• Symbolic form for one of the underlying language.• Provide a method for writing a program for levels 1,2 or 3. • program in assembly Language is translated to levels 1 2 or 3 (assembler)• program in assembly Language is translated to levels 1,2 or 3 (assembler).
Level 5: High-Level Language Level•The level with which we interact when we write programs in languages such as C, Pascal, and Java.•Programs written in this level are translated into level 3 or 4 by a compilers.
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Evolution of Multilevel Machines
• Invention of microprogramming.• Invention of operating system(automate operator’s job).• Migration of functionality to microcode.(INC, ADD)• Elimination of microprogramming(hardware control of the
data path).
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Milestones in Computer Architecture (1)
Some milestones in the development of the modern digital computer. 11
Milestones in Computer Architecture (2)
Some milestones in the development of the modern digitalSome milestones in the development of the modern digital computer. 12
Computer GenerationsZ th G ti• Zeroth GenerationMechanical Computers (1642 – 1945)By a French scientist (Pascal), add and subtract
• First GenerationVacuum Tubes (1945 – 1955)Von NeumannVon Neumann
• Second GenerationTransistors (1955 – 1965)The PDP-8 omnibus
• Third GenerationIntegrated Circuits (1965 – 1980)g ( )IBM 360
• Fourth GenerationVery Large Scale Integration (1980 – ?)
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Von Neumann Machine
The original Von Neumann machineThe original Von Neumann machine.
ALU + Control unit = CPU
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Technological and Economic Forces
Moore’s law predicts a 60-percent annual increase in thenumber of transistors that can be put on a chip. p pThe data points given in this figure are memory sizes, in bits.
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The Computer Spectrum
The current spectrum of computers available. The prices should be taken with a grain (or better yet, a metric ton) of salt.
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Personal Computer1. Pentium 4 socket2. 875P Support chip3 Memory sockets3. Memory sockets4. AGP(Accelerated Graphic port) connector5 Di k i t f5. Disk interface6. Gigabit Ethernet7. Five PCI (PeripheralC ) l tComponent Interconnect) slots8. USB 2.0 ports9. Cooling technology
A printed circuit board is at the heart of every personal computer. This figure is a photograph of the Intel D875PBZ board. The
10. BIOS
photograph is copyrighted by the Intel Corporation, 2003 and is used by permission. 19
Example: Computer Families
• Pentium 4 by Intel (used in personal computer)• UltraSPARC III by Sun Microsystems (in servers)• The 8051 chip by Intel, used for embedded systems
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Intel Computer Family (1)
The Intel CPU family. Clock speeds are measured in MHz y p(megahertz) where 1 MHZ is 1 million cycles/sec.
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• 80486 had a floating point unit and 8K of cache memory on chip
Intel• 80486 had a floating-point unit and 8K of cache memory on chip.
• Cache memory is used to hold the most commonly used memory words inside or close to the CPU, to avoid (slow) accesses to main memory.
• The 80486 also had built in multiprocessor support, to allow manufacturers to build systems containing multiple CPUs
• Pentium (from the Greek word for five). Unlike the 80486, which had one internal pipeline, the Pentium had two of them.
P ti P ( t S i i L ti ) h d diff t i t l i ti• Pentium Pro( not Sexium, sex is Latin) had a very different internal organizationand could execute up to five instructions at a time. has two-level cache memory.The processor chip itself had 8 KB of memory to hold commonly-used instructionsand 8 KB of memory to hold commonly-used data. In the same cavity within they y yPentium Pro package (but not on the chip itself) was a second cache memory of256 KB.
Pentium II essentially a Pentium Pro with special MultiMedia eXtensions (called• Pentium II, essentially a Pentium Pro with special MultiMedia eXtensions (called MMX) instructions. These instructions were intended to speed up computations required to process audio and video. 22
• Pentium III adds more multimedia instructions called SSE( Streaming SIMD Extensions), (SIMD single instruction-stream multiple data stream)
• In early 1998, Intel introduced a new product line called the Celeron, whichwas basically a low-price, low-performance version of the Pentium II
I 2003 I t l i t d d th P ti M (A i M bil ) f th t b k• In 2003, Intel introduced the Pentium M (As in Mobile) for the notebook computers
• In 2004, Intel canceled the 4-GHz Pentium 4 due to problems dissipating heat , p p g
• All the Intel chips are backward compatible with their predecessors back asfar as the 8086.
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Intel Computer Family (2)
The Pentium 4 chip The photograph is copyrighted by the IntelThe Pentium 4 chip. The photograph is copyrighted by the Intel Corporation, 2003 and is used by permission.
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UltraSPARC III• In 1981, a German Stanford graduate student, Andy Bechtolsheim, who was frustrated at having to go to the computer center to use UNIX, decided to solve this problem by building himself a personal UNIX workstation out of off the shelf parts He called it the SUN 1 (Stanford University Network)of off-the-shelf parts. He called it the SUN-1 (Stanford University Network). which was powered by a Motorola 68020 CPU
• Their own CPU, called the SPARC (Scalable Processor ARChitecture), The initial SPARC was a full 32-bit machine, running at 36 MHz
• UltraSPARC I, a full 64-bit architecture, with 64-bit addresses and 64-bit registersregisters
• The successors to the UltraSPARC I were the UltraSPARC II and Ultra-SPARC III. These models differ primarily in clock speed
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MCS-51 Family(Microcontrollers)(Microcontrollers)
•All chips use read-only memory(ROM) for theAll chips use read only memory(ROM) for the program plus a small amount of read-write memory called random access memory (RAM).
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