Journal of ELECTRONIC MATERIALS, Vol. 37, No. 4, 2008

Platinum and Rhodium Silicide–Germanide Optoelectronics

M.P. LEPSELTER,1 A.T. FIORY,1,2,3 and N.M. RAVINDRA2

1.—BTL Fellows, Inc., Summit, NJ 07901, USA. 2.—Department of Physics, New Jersey Instituteof Technology, Newark, NJ 07102, USA. 3.—e-mail: [email protected]

Since the introduction of SiO2/Si devices in the 1960s, the only basic change inthe design of a MOSFET has been in the gate length. The channel thicknesshas fundamentally remained unchanged, as the inversion layer in a siliconMOSFET is still about 10 nm thick. Bipolar transistor base widths have beenof sub-micron dimensions all this time. It is time for a new property to beexploited in concert with the high mobility strained-silicon channels and sil-icon–germanium alloys. This property is the inherently low parasitic seriesresistance of Schottky barrier contacts. Schottky contacts, beam leads, andmicrobridges, while originally developed in silicon, have been successfullyintegrated into compound semiconductors for optoelectronics. Reintroductionof these technologies in optoelectronics based on silicon–germanium is pro-posed. Several new applications using platinum and rhodium compounds ofsilicon and germanium are presented.

Key words: Schottky-barrier detectors, high speed, infrared, wavelengthselectability, SiGe alloy semiconductors

INTRODUCTION

This article reviews Schottky-barrier detector(SBD) and beam lead technologies and develops therationale for new advanced applications in silicon-based optoelectronics. Making novel utilization ofsilicon compatible materials, the authors presentoriginal device concepts and structures for photo-receivers implemented in silicon.

An example of a currently well-established deviceis the Schottky-barrier photodiode based on thePtSi/p-Si (platinum silicide on p-type silicon) junc-tion, which has been developed for infrared (IR)imaging systems, including forward looking infra-red radar, infrared thermal imaging cameras, andmultiwavelength imaging pyrometry.1,2 Somerestrictions hobble this particular SBD because itneeds to be operated at cryogenic temperatures tosuppress the dark current, e.g., cooling focal planearrays with Stirling cycle engines. Junctions of thetype PtSi/n-Si (platinum silicide on n-type Si),which need no cooling because of a higher intrinsic

Schottky barrier height (0.84 eV versus 0.26 eV),are suitable for detectors spanning the spectrumfrom ultraviolet to near infrared. Schottky barrierdetectors have reliability and wear out advantagesover p–n junction detectors, as demonstrated by theresistance to radiation damage of PtSi/n-Si detec-tors for ultraviolet (UV) and vacuum ultraviolet(VUV) applications.3 Generally, Schottky diodes areunaffected by radiation, unlike alternativeapproaches using p–i–n diodes. In reliability studiesat Bell Labs, Schottky diodes were subjected to 60Coirradiation and showed no observable deteriorationin the current–voltage characteristics.4

The reason SBD sensors provide superior radia-tion resistance is because the physical mechanism ofinternal photoemission is less affected by radiationdamage than the mechanism of carrier excitationand drift in conventional semiconductor junctionsensors. Applications in space-based and synchro-tron radiation systems have demonstrated provenrobustness in harsh radiation environments, spe-cifically for PtSi/Si photo detectors. Moreover,Schottky-barrier detectors are readily integratedwith Schottky-bipolar circuits, which provideanother layer of superior radiation resistance overstandard CMOS by avoiding radiation sensitive

(Received April 12, 2007; accepted July 23, 2007;published online September 11, 2007)

Journal of ELECTRONIC MATERIALS, Vol. 37, No. 4, 2008 Special Issue Paper

DOI: 10.1007/s11664-007-0216-3� 2007 TMS

403

gate dielectrics. However, conventional SBDsformed on p-type silicon have known shortcomings.Mainly, these are increased dark current at in-creased operating wavelength and suppressedquantum yield by non-radiative photon absorption.Nonetheless, a number of methods to mitigate thesedrawbacks for high-speed photonics are available:(1) using RhSi to replace the commonplace PtSi forSBDs formed on p-type silicon; (2) pulsed operationto suppress dark current noise; (3) recessed photontrapping designs; and (4) Schottky-barrier photo-transistors with super beta gain. Our analysisshows that RhSi SBDs can be operated in the wave-length spectral range up to 2 lm at room tempera-ture. Schottky barrier heights can be tailored byselection of platinum group metal, semiconductortype, and by donor ion implantation or SiGe alloy-ing; the latter two techniques function by inducingbarrier lowering by built-in electric fields.

Photodetectors based on RhSi/n-Si Schottkyjunctions5–8 are less known and studied. In thiscase, the Schottky barrier height of 0.69 eV has lowdark current at ambient temperatures and is wellmatched for photoreceivers with photonic sensitiv-ity in the 1.5 lm communications band. Such pho-toreceivers can also be used in the 1.3 lm opticalcommunications band. RhSi Schottky diodes wereextensively studied by one of the authors (MPL) andcollaborators and were employed in low-powerbipolar transistor circuits containing RhSi/n-Si andRhSi/p-Si diodes of high and low barrier heights,respectively.6 Prior investment in developing thistechnology in the electronics arena allows one tocapitalize on this experience and knowledge andtransfer the RhSi technology in making RhSi/n-SiSchottky barrier photo detectors that operate with-out cooling. Being an electron carrier device, it alsofully exploits the high saturation drift velocity ofelectrons in Si. Related PtSi/n-Si planar Schottkybarrier diodes have been shown to be readily capa-ble of 118 GHz cut-off frequency.9

Uncooled Schottky-barrier detectors based onternary RhSiGe and PtSiGe alloys are of interest incombination with high-performance SiGe circuits.Process integration with SiGe alloys can producehigh-speed IR detector arrays with the importantbenefits of broad wavelength tunability and high-yield manufacture at very low cost. Cut-off wave-lengths are matched for specific imaging chips bythe appropriate choice of the Schottky barrierheight, which is selected by semiconductor carrierdoping and type, Ge concentration, and implemen-tation in either RhSiGe or PtSiGe as the contactmetal. The active internal photoemission region ofthe photo emitter is readily fabricated to dimensionsof 10 nm. The capability of pulsed high-speedoperation of Schottky barrier detectors enablessuppressing the dark current for compact militaryand commercial imaging systems operating atambient temperature. Further, the silicon–germa-nium technology exploits the inherently low

parasitic series resistance of Schottky barrier con-tacts in optoelectronic devices. However, detectionneed not be restricted to the use of RhSiGe andPtSiGe Schottky barrier diodes. High quantumefficiency is most desirably obtained in the form of afloating-base photo transistor with super-beta gain,fabricated with RhSiGe and PtSiGe collector con-tacts integrated to SiGe strained-layer hetero-structure bipolar technology.

Silicon-based IR imaging sensors using SiGe fordetecting infrared photons of energy below the bandgap of silicon are process compatible with conven-tional silicon CMOS (complementary metal oxidesemiconductor) and BiCMOS (bipolar-CMOS) tech-nology with SiGe enhancements. Photo detectortechnology can also be based on p–n junctionsformed in strained, carrier-confined, and modula-tion doped quantum well nanostructures, whichcould utilize the physical properties of the group IVsemiconductors and alloys for mid-infrared imagingoptoelectronics.

A key SBD application is in high-performance(high-speed) system-on-a-chip imaging sensorsusing technology stemming from PtSi and RhSiSchottky barrier technology that is noted for provenhigh reliability, low processing cost and reducedcomplexity. Through the selection of ternary metal–silicide–germanide contact materials and semicon-ductor doping at the Schottky contact, photondetection at room temperature can be extended outto 5 lm. Thermionic dark currents for these mid IRdetectors are suppressed by pulsed operation ofhigh-speed imaging circuits. Sensors are comprisedof metallic alloys of PtSi1-yGey and RhSi1-yGey inSchottky-barrier contacts on semiconducting alloysof Si1-xGex, where Ge concentrations, x, are in therange of 0.1–0.3. Germanium fraction in the metal,y, need not necessarily equal its fraction, x, in thesemiconductor.

New device concepts deploying rhodium are beingemphasized in this article due to the fact that pre-vious work has shown that the metal and its silicideare advantageous for high reliability in electronicdevices and circuits for (1) low Schottky barriers, (2)proven application in bipolar circuits, (3) extensi-bility to contacting Ge and Ge-Si alloying, (4) high-quality metal/semiconductor interface structure, (5)feasibility for silicide source doping, (6) a low costmanufacturable process, and (7) corrosion resis-tance to wet chemistry.

The unique property of extraordinary corrosionresistance leaves Rh unmatched by competingalternatives for high-performance nanotechnologydevices and circuits. This is exemplified by thenotable resistance of rhodium to attack by hot aquaregia (e.g., it is more robust than platinum). Fur-ther, rhodium is employed in highly reliable spark-gap electrodes. These properties favor selectingrhodium for robust and passive electrodes inbio-optoelectronics applications, in which devicescontain aqueous electrolyte cells, for sensing and

404 Lepselter, Fiory, and Ravindra

controlling chemical and biological activity. Impor-tant applications in these fields, that reach beyondthe scope of this article per se, are electronic arraysfor gene expression, chemical assay, and non-embryonic stem cell research.

Rhodium-based film and contact technology mer-its serious consideration for meeting the criticalneeds of the semiconductor industry, which isseeking the scaling targets of CMOS devices withtens of nm design rules. Rhodium films can alsoserve as passivation coatings for electronic devicesand interconnects.

Rhodium and platinum metal films are depositedby radio-frequency (r.f.) bias sputtering, which isadaptable to ultra-low ion implantation of rhodium,or by electrochemical plating. Rapid thermal pro-cessing, a technique that is well established to formsilicides in microelectronics fabrication, is used toform low specific resistivity contacts and Schottkybarrier junctions.

TECHNOLOGY PATHWAYS

Related development of two optoelectronicstechnology components, Schottky-barrier contactsand beam leads or air bridges (microbridges), whichwere originated in silicon microelectronics andsubsequently adapted for optoelectronics in com-pound semiconductors, is described in Fig. 1.Schottky-barrier contacts were first implementedin silicon circuits comprising bipolar transistors,insulated-gate field-effect transistors (IGFET),photodiodes and phototransistors10 and are used formaking ohmic contacts to semiconductors.11 Siliconmicromachining methods that were originallydeveloped for beam leads and microbridges12 becamethe workhorse for MEMS (micro-electro-mechanicalsystems). There is now a renaissance in Schottkycontacts, particularly for shallow junctions with lowparasitic series resistance in advanced CMOS tran-sistors13,14 that are extensible to BiCMOS circuitswith channel mobility enhancements of strainedsilicon and SiGe alloys. Silicon-based optoelectronics

can draw upon the successes of Schottky and beamlead technology in high-speed optoelectronics thatwere developed in compound semiconductors, suchas Schottky-barrier GaAs, InP, and InGaAs detec-tors, mixers and multipliers, which can now reachTHz frequencies.15,16

Trends since the 1960s of two key dimensions ofcontemporaneous state-of-the-art MOS transistors,namely the critical gate length (following scaling ofMoore�s law) and the channel depth, are sketched inFig. 2. While gate lengths have been dramaticallyreduced by many orders of magnitude throughadvances in silicon processing and device design,the channel depth has remained largely unchanged,owing to the physical limitations of inversion layersor the conducting channels (e.g., thin body) in sili-con transistors. The fact that these two dimensionshave now become comparable to one another isleading to a rethinking of the applicable theoriesthat underlie device scaling and design. Reductionsin gate lengths to the tens of nanometers haveresulted in increases in the longitudinal componentof the electric field to more than 105 V/cm. Thus therelevant metric controlling the performance oftransistors is shifting from emphasis on the trans-port mobility to the high-field saturation driftvelocity. The variation of electron transport velocitywith electric field is shown in Fig. 3 for Si, GaAs,and a SiGe (30% Ge) alloy.17–19 Although mobilities(determined from slope) at low fields depend ondoping (�1017 cm-3 assumed for illustration), theyare generally highest for GaAs and lowest for Si, inpart because GaAs has a lower effective mass andbecause mobility scales inversely with effectivemass. However, the high-mobility advantage ofGaAs20 over Si becomes largely irrelevant for shortchannels and in the presence of high electric fields,because the saturation velocities of electrons in the

Fig. 1. Development pathways for optical and electronic technologycomponents, Schottky barrier contacts and beam leads, in silicon-based and compound semiconductors.

Fig. 2. Scaling trends since the 1960s in channel length (solid curve)and depth (dashed curve) of MOSFET transistors.

Platinum and Rhodium Silicide–Germanide Optoelectronics 405

two semiconductors are theoretically comparable(107 cm/s). Thus, in the high-field region silicon,germanium and SiGe alloys provide transportspeeds that are comparable to GaAs. The impor-tance of saturation velocity effects has been shownthrough simulation for heterostructure bipolartransistors with Si1-xGex alloy in the base.21

A further consideration of high fields in shortchannel devices is the ability to model the drivecurrent, in which theory of the transport current interms of a drift-diffusion response to an electric fieldbegins to break down. In this regime, a more fruitfultheoretical approach is the one proposed by Landa-uer, in which current flow is considered in terms ofthe injection of carriers at the source contact andthe probability of their reaching the drain contact.22

This electron transport concept has been modeledfor various MOSFET devices using Monte Carlosimulations,23 which have shown that the maxi-mum drive current depends on the density of stateseffective mass. This is in contrast to the inversevariation of mobility with drift-diffusion effectivemass. In Fig. 4, transport through two-dimensionalshort channels in Si, Ge, and a compound semicon-ductor such as GaAs is illustrated as stochastic flowthrough pipes in phase space with cross sectionsscaling with the density of states effective mass.Low density of states in compound semiconductorsrestricts current throughput, when compared to Sior Ge, leading to lower saturation drive current forshort channel transistors. Monte Carlo simulationsof electron transport in strained silicon nanoscaleMOSFETs find velocity distributions that are sta-tistically distributed about the saturation velocityvalue and include a ballistic hot carrier compo-nent.24

Silicon–germanium technology has been intro-duced into high-speed CMOS technology to captureincreased carrier mobility advantages of strained-layer epitaxy,19,25 which is 46% for n-channeldevices and 60–80% for p-channel devices.26

Nanoscale structures are being implemented, for

example, by wrap-around gate transistor designsthat enable the manufacturability of aggressivehigh-performance design rules. Commercially viableintegration of photoreceiver devices with SiGeCMOS needs to be attentive to compatible materi-als, thermal budget and processing requirements,27

and in particular to the inherent metastability ofstrained semiconductor multilayers.28 Variation ofthe critical thickness for the epitaxial planar growthof S1-xGex films on silicon as a function of Ge con-centration x is shown in Fig. 5.29 Films grown inregion A have commensurate epitaxy, wherein-plane lattice spacings are equal and the SiGe filmis strained. Epitaxial strain is relaxed in region B,permitting epitaxial growth of a strained Si layer ontop of the SiGe alloy layer.

BEAM LEAD AND MICROBRIDGE(AIR BRIDGE) DEVICES

Beam lead and air bridge technologies have beenused to manufacture billions of robust components

Fig. 3. Drift velocity versus electric field for three semiconductors.Fig. 4. Current throughput as constrained by semiconductor densityof states (illustration for short two-dimensional channels).

Fig. 5. Critical thickness of growth of Si1-xGex films on Si. Curvedivides the commensurately strained region, A, and strain relaxedregion, B.


at extremely low cost.30 In providing the ultimatelow-j dielectric (j = 1) for integrated circuits, airbridges are now replacing physical media separat-ing interlayer conductors31 and re-establishingtheir original purpose. They allow flexibility in thedesign and assembly of optoelectronics modules byintegrating Schottky barrier photo detectors with,e.g., microwave electronics.32 An example of a beamlead device is the Schottky barrier microwave fre-quency converter shown in Fig. 6.33 Magnetic self-assembly is another and more recent innovationthat provides low cost manufacturing of systemsbased on beam leaded components and intercon-nects.34,35 This technology is an outgrowth of thelow-cost methods for producing macro assembliesthat were developed originally for flat panel dis-plays.36,37 It is a manufacturing method withextraordinary cost advantages over flip-chip andsolder-bump methods of fabricating hybrid modules.Generalizing a published analysis of pricing datatrends,38 one could project a unit cost of $3 perphotoreceiver module in profitable mass productionquantities.

Beam lead technology is used for air-insulatedcrossovers in integrated circuit interconnections toenable low capacitance, dual dielectrics, high yield,and reliability. Beam-lead crossover methods havebeen effective for integrated circuit chips as well ascomplex substrates. Component devices with beamleads are fabricated with the same techniques usedin MEMS technology that itself originated with theoriginal beam lead technology.39–43 Figure 7 showsthe cross-section a high-frequency beam-leadswitching transistor. The beam leads extend beyondthe edges of the silicon device and can be directlyconnected to the wiring patterns laid down on thesubstrates. The beam leads are relatively thick(about 10 lm) compared to the active region of thedevice and associated parts. After forming the de-vice in single-crystal silicon, the leads are depositedand then silicon is etched away, leaving only thebeam leads interconnecting the devices and holding

them in place. The beam leads provide electricalconnections and mechanical support for the semi-conductor. This technology simplifies fabricationand assembly procedures for many types of semi-conductor devices and circuits, including transis-tors, diodes, and integrated circuits. The technique,which is ideally suited to couple the advantages ofMEMS fabrication of high-performance transistorsand the magnetic self-assembly, is appropriate formaking arrays and modules that integrateSchottky-barrier photo detectors with high-speedSiGe electronic circuitry.

A structure encompassing the beam leads and airisolation is shown in Fig. 8. In this type of circuit,the components are physically, and therefore elec-trically, isolated from each other. Beam leads sup-port and interconnect the components. The actualstructure illustrated in Fig. 8 is only 1.3-mm across.This technology has been used to produce billions ofversatile and low cost parts of exceptional reliability(e.g., under 1 failure in 109 device hours) in tele-communications electronic switching systems.

Another feature of the beam-lead structure is thatsilicon (or other semiconductor) wafers may containeither single devices or complete circuit modulesthat can be directly connected with beam leads.Separate steps for bonding the circuit to the sub-strate and connecting individual wires are not nec-essary with beam-lead devices or circuits. Diodes,moderate- and ultrahigh-speed transistors, andultrahigh-speed logic circuits have been built andtested with this method. Ruggedness of beam-leaddevices and circuits were proven by their reliabilitytests that included thermal ageing at 360�C insteam and centrifuging to greater than 105 · g.

Combined use of beam lead and Schottky barriertechnologies, as in the right hand side of the road-map sketched in Fig. 1, has proved to be a powerfulsynergism for high-frequency compound semicon-ductors devices. Several examples of such Schottkydiodes are briefly mentioned here. Schottky-barrierbeam lead detectors implemented in GaAs are incommercial production.16 Figure 9 shows cross sec-tion detail of a GaAs Schottky barrier detector.44

High-performance optoelectronics based in siliconoffer opportunities for realizing very low cost ofmanufacture with military level of reliability.Schottky barriers in silicon-based semiconductorsare reviewed in the next section.

SCHOTTKY BARRIER DETECTORS

Schottky barrier photo detector technology isbased on the principle of thermionic emission ofphoto-excited electrons generated in the metallicfilm near the semiconductor interface over theSchottky barrier and subsequently collected in thesemiconductor. In the pioneering work of Andrewsand Lepselter, it was shown that the thermionicemission currents for high-quality Schottky barrierswith PtSi and RhSi films on n-type Si experimen-

Fig. 6. Beam lead Schottky barrier strip line microwave converter(adapted from Ref. 33).


tally obey the Richardson–Dushman equation witha Richardson factor, A** = 112 A cm-2 K-2, a valuethat agrees with the calculated value for Si.5 Ide-ality factors under forward bias current, n = 1.02,indicate high-quality barriers. Reverse bias cur-rent–voltage data for RhSi/n-Si and PtSi/n-SiSchottky diodes are in nearly perfect agreementwith theory, after taking into account known guard-ring effects at high bias. Depletion layer recombi-nation is negligible in these junctions. Schottkybarrier heights, /B, and reverse bias saturationcurrent densities, Jsat, for RhSi and PtSi Schottky

contacts on n- and p-type silicon are compared inTable I. The data show that the dark current of aRhSi/p-Si detector will be lower than that of a PtSi/p-Si detector by a factor of 200/8 = 25. Previouswork and reference data for various metal silicideshave been compiled by Murarka45 and by Rhoderickand Williams.46

Photoemitted carriers are collected for photonenergies that exceed the Schottky barrier height.The cut-off wavelength, kc, is related to the barrierheight by the relation kc = [1.2399 lm/eV]//B. Whilethe barrier height is theoretically determined by thedifference between the metal work function and thesemiconductor electron affinity (4.05 eV for Si and4.0 eV for Ge), it is in practice determined by thepresence of Bardeen interface states. The effectivebarrier height is also reduced by quantum wavefunction effects, the image potential and the electricfield at the interface. Interface electric field effectsare used to tailor the barrier height for optimizingthe tradeoff between photon collection efficiency anddark current. These and other methods may be usedto improve device performance.

RhSi and PtSi each form Schottky barriers with ahigh-quality interface structure. Note that the sumof the barrier heights listed in Table I approachesthe theoretical value of the band gap of Si (1.12 eV)in accord with device fundamentals. The propertiesof PtSi/Si are somewhat better characterized,although the properties of RhSi are similar. PtSihas B31 orthorhombic crystal structure and a highdensity of electron states at the Fermi level, whichproduces low electrical resistivity of 35 lX cm, ashort Thomas-Fermi screening length of 0.06 nm,and even superconductivity at low temperatures(Tc � 0.5 K). RhSi forms a cubic crystal structure47

and has similarly low resistivity. The low resistivityis exploited to produce devices with low-parasiticresistance and thus high operating frequency. Sincethe charge screening distance is much shorter thanthe spacing between Si and silicide lattice planes atthe interface, the electronic metal–semiconductorinterface is especially abrupt. Thus electron wavefunctions are insensitive to bulk lattice defects inthe silicide.

Fig. 8. Beam-lead, sealed junction circuits fabricated with air isola-tion.

Fig. 9. Schematic cross section of a GaAs Schottky barrier detector(adapted from Ref. 44).

Fig. 7. Cut away cross-sectional view of high-frequency bipolar transistor fabricated with beam lead technology.


The Schottky barrier height for RhSi/p-Si is0.33 ± 0.01 eV as obtained from the temperaturedependence of the experimental I–V characteristicsnearly perfectly matches theory. This correspondsto kc = 3.8 lm, which is ideally suited for designingsensors that operate at 2 lm. The barrier heightmay be reduced by a built-in electric field producedby shallow ion implantation and rapid thermalannealing (‘‘spike’’ dopant). Figure 10 shows thetheoretical calculation for the barrier lowering as afunction of the activated implant dose. A shallowactivated donor implant of 5 · 1012 cm-2 lowers thebarrier height by 0.1 eV.

When a layer of SiGe alloy is inserted betweenPtSi or Pd2Si and Si in an SBD structure of the formPtSi/Si1-xGex/Si, the Schottky barrier height may becontrolled with Ge concentration, x, (previouslystudied for x up to 0.2 and p-type semiconductor) aswell as by reverse bias voltage.48,49 Barrier heightmodifications for PtSi on n-type Si on n-type Si1-xGex

are plotted in Fig. 11. Although results have notbeen reported for Schottky barriers formed as ajunction of a ternary metallic compound comprisinga platinum-group metal, silicon and germanium thatis in direct contact with a silicon–germanium alloysemiconductor, it is a logical extension of the class ofmaterials that could be readily integrated with high-performance SiGe circuits. Of particular interest are

the ternary metal-alloy Schottky-barrier junctiondevices, RhSi1-yGey/Si1-xGex and PtSi1-yGey/Si1-x

Gex. Theoretically, one may expect that the proper-ties of junctions involving ternaries would be similarto those of the binaries (Figs. 10 and 11). Ternarycompound junctions formed from Rh and Pt are ex-pected to follow a similar process technology. Deviceexamples presented in this article are based onrhodium because of its technical advantages, asdiscussed below. The rationale for favoring a Scho-ttky barrier technology that is based on rhodium isdescribed in Table II.

RhSi/n-Si photo detectors operating at 40 Gb/s canalready be manufactured by proven mass productionintegrated circuit methods with non-aggressivelithography and patterning steps. The method ofchoice for low-cost fabrication of thin silicide films isr.f. sputtering and thermal annealing. Conventionalion implantation and rapid thermal annealing are

Fig. 10. Theoretical Schottky barrier height lowering with a spikedonor implant in Si near the silicide–Si interface.

Fig. 11. Calculated variation of Schottky barrier height at 2 V re-verse bias for PtSi/n-Si1-xGex.

Table I. Schottky Barrier Heights /B (eV) andReverse Bias Saturation Current Densities Jsat

(A/cm2) for RhSi and PtSi on p- and n-Type Silicon

Silicide

/B Jsat

n-Si p-Si p-Si n-Si

RhSi 0.69 0.33 8 2–4 · 10-5

PtSi 0.84 0.26 200 3–6 · 10-7

Table II. Lists of Competitive Advantages for RhMetallurgy and RhSi Contacts for Optical Sensors

and Electronic Circuits

Advantages of Rh Advantages of RhSi

Superior corrosionresistance

RhSi stoichiometricstable phase

Oxidation resistance Rs = 1 X/Sq nanoscalemetallization

Metal work functiontuning

Radiation hardness

Electroforming andelectroplating

High-quality Schottkybarrier junctions

Electromigrationresistance

Nanoscale structurestability

Passive bioelectronicselectrodes

Deposition/rapid thermalprocess integration

CMOS compatible CMOS compatible


further options for optimizing the Schottky barrierheight and profile with respect to maximizingquantum efficiency, minimizing dark current, andsuppressing noise background.

The Schottky barrier height for RhSi/n-Si is0.69 ± 0.01 eV, which corresponds to kc = 1.8 lm,and which is ideally suited for the design of photo-receivers operating at 1.5 lm. Devices based onPtSi/n-Si Schottky barriers can be operated at1.3 lm. The barrier height may be reduced by thecombination of reverse bias field and a built-inelectric field produced by shallow ion implantationand rapid thermal annealing (Fig. 10). A shallowactivated donor implant of 2 · 1012 cm-2 and 2 Vreverse bias device operation lowers the barrierheight for operation at 1.3 lm. Theoretically, oneexpects a similar effect of doping for Rh-based con-tacts and for the ternaries, RhSi1-yGey/Si1-xGex andPtSi1-yGey/Si1-xGex. Semiconductor type (n or p)and doping concentrations are selected for theSi1-xGex system based on specific applications.

SCHOTTKY JUNCTION FORMATION

Formation of RhSi/Si contacts uses a method thatcircumvents potential manufacturing issues in sili-cide–germanide formation, whereby barrier heightand interface state densities could have variabledependence on surface preparation and cleaning.Manufacturability requires production of Schottkybarrier junctions with near ideal I–V characteristicsand tight tolerances on the barrier height. This isachieved using ultra-low energy (150 eV) plasmaimmersion ion implantation, which is implementedas biased r.f. sputtering. The processing apparatusis illustrated in Fig. 12. The sputtering chamber isfilled with low-pressure argon. This system allows apreliminary sputter clean step by bombardmentwith Ar ions. The frequency of the r.f. power supplyis selected so that the period of oscillation isapproximately twice the transit time for Ar ions todrift between the Pt or Rh cathode No. 2 and thesilicon substrate. The current flowing in the plasmaduring each half cycle is carried alternately byelectrons and Ar ions. For Rh sputter deposition, thebias potentials are set as shown in Fig. 12. Experi-ments with silicide films show that the RhSi reac-tion is formed by annealing at 600�C or with a lowthermal budget rapid thermal annealing (RTA)technique. Unreacted Rh is removed by back sput-tering, i.e., plasma etching, without significantlyattacking the RhSi film. This leads to an RhSi/Sijunction with near optimum metal–semiconductorinterface.

The interface corresponding to the Schottkyjunction is therefore buried, formed in clean semi-conductor alloy, and lies well below surface con-taminant layers that may arise from the fabricationprocessing residues. Silicide or silicide–germanideformation and dry sputter etch steps are readilyimplemented as separate process modules. The

ultra-low energy ion implantation by this techniqueis superior to other methods of forming silicidecontacts. The RhSi material is expected to have adefect density sufficiently low so that the electronmean free path exceeds the photon penetrationdepth, allowing for efficient internal photoemissionin the Schottky detector.

Furnace growth kinetics of RhSi formed fromconventional physical deposition of rhodium indi-cate parasitic reactions between the silicon sub-strate and trace oxygen contamination in theannealing ambient, as evidenced by degradation ofthe resistivity of the RhSi film,50 deviations fromideality of the RhSi/Si Schottky junctions,7 and theneed to resort to ion-beam mixing techniques.8 TheSchottky barrier height of the nearly ideal junctionformed from plasma deposition is compared withthose from conventional methods in Fig. 13. Whilebarrier heights obtained by the furnace annealingapproach the ideal limit, one notes a non-monotonicvariation of Schottky barrier height with annealtemperature, which is indicative of intermediateinterfacial reactions. High-quality junction forma-tion requires suppression of parasitic oxidation,which can be achieved by vacuum annealing.5

Since rapid thermal processing (RTP) has beenadvantageously utilized in silicon microelectronicsprocessing,27 it would provide a silicide–germanideformation process that is reproducible and suitablefor manufacture. The advantage of RTP is realizedwhen the desirable process of metal–silicide–germ-anide formation is governed by effective activationenergy that is higher than that of the undesirablegrowth of SiO2 in grain boundaries and at the

Fig. 12. Apparatus for dual cathode plasma sputtering metal filmdeposition and ultra-low energy metal-ion implantation in Si-basedsubstrates.


contact interface. Since RTP is currently being usedto manufacture silicides in silicon integrated elec-tronics, extension to rhodium is likely to realizesimilar success.

Previous work used the plasma sputtering meth-od to fabricate RhSi and PtSi Schottky-barrierdiodes of nearly ideal I–V characteristics for variouscircuit applications. For example, low-power bipolartransistor memory cells were developed with highbarrier, RhSi/n-Si, and low barrier, RhSi/p-Si,Schottky diodes. Figure 14a and b shows the oper-ational current–voltage (I–V) characteristics for then and p type Schottky diodes in the circuit. The lowbarrier diodes in the circuit serve as current limit-ing non-linear elements in the circuit, a feat that isnot achievable with linear current limiting resis-tors. Figure 14c shows that the Schottky barriertheory with image force and static corrections forthe low-barrier RhSi/p-Si diode is in agreement withexperimental reverse-bias data.5

Another application is the use of Schottky con-tacts in MOS transistors. They were first used tomake very shallow, sharp emitter profiles in bipolartransistors. Figure 15 illustrates a novel deviceconcept introduced in this article. It shows the crosssection view of a Ag/RhSi/Si thin-film structure forthe source and drain contacts. The notable attributeof this structure is that a low-resistance film ofapproximately 25 nm of thickness can be formedthat closely matches the depth of the silicon inver-sion layer in a low-voltage MOS transistor. More-over, it is lateral scale independent. This techniquecircumvents the problem of forming ultra shallowdoping layers with low link up resistance for high-speed CMOS technology, thus eliminating the needto thwart transient diffusion of shallow implanted

dopants by laser or flash-lamp annealing. It istherefore a viable solution for minimizing the linkupseries resistance between contact junction andchannel. Low series resistance is achieved by a lowsheet resistance of Rs � 1 X/Sq for the Ag/RhSi bi-layer. The thin Ag film can be deposited over thecontact, which acts as a diffusion barrier, by self-aligned chemical deposition. Low contact resistanceis achieved with Ohmic RhSi/n++-Si or RhSi/p++-Si

Fig. 13. Schottky barrier heights of RhSi/n-Si junctions formed byfurnace anneal of Rh deposited on crystalline silicon. Diamond pointsare conventional deposition and anneals.46 Round symbol is theclose to ideal result obtained with r.f.-biased Rh deposition andvacuum anneal.5

Fig. 14. Current–voltage traces for (a) high barrier /B = 0.69 eVRhSi/n-Si, and (b) low barrier /B = 0.33 eV RhSi/p-Si, Schottkydiodes in memory cell circuit. (c) The theory curve for RhSi/p-SiSchottky diode is compared with data points at reverse bias; dashedline: saturation current density.


contacts. An ultrashallow Rh implant in the gatemetallization at the dielectric interface is used tomodify the work function of the gate metal andthereby tune the threshold voltage of the MOSFET.

Figure 16 shows the dual gate application ofSchottky barrier contacts that was recently pro-posed and modeled theoretically.51 The conductingchannel is formed as an ultrathin (25 nm) siliconbody with silicon-on-insulator (SOI) technology.Simulation studies suggest that Schottky sourceand drain offer significant performance improve-ment over doped source and drain. A Schottky bar-rier CMOS FinFET comprising a sub-gate structurefor forward-biasing PtSi contacts was recently fab-ricated and shown to be viable for low leakage andhigh drive current and thus be able to realize therequisite high performance.52

SCHOTTKY OPTOELECTRONIC DEVICES

Schottky barrier detectors usually produce alower quantum yield than p–n junction detectors,but that disadvantage can be addressed by varioustechniques to boost photon capture efficiency.Among these are adaptations of design conceptsused for solar cells.53 One method is to apply facettexturing at the optical input port in combinationwith an antireflection (AR) coating. The facetscreate total internal reflection of most of the

photons, which are reflected from the metal–semi-conductor interface, owing to the large index ofrefraction of the semiconductor, relative to that ofthe AR coating. Texture is also used at the metal–semiconductor interface to enhance both photoncapture and the effective solid angle for thermionicemission of electrons photo excited in the metal. Atexturing technique has been used to boost thequantum efficiency of PtSi/Si SBDs to above thetheoretical maximum.54 Texturing methods includemodified porous silicon etching, growth of Si1-xGex

islanded films overcoated with Si, and pulsed laserchemical etching. Implementing the structure insilicon on insulator (SOI) is also a way to increaseeffective photon capture. Distributed Bragg reflec-tors containing alternating multilayer films of Siand SiO2 with at least two periods have been shownto be suitable for making back reflectors with nearunity reflectivity.55

A novel approach to photon trapping that isintroduced in this article is the SBD structureshown in Fig. 17a and b. A Schottky contact metalfilm is formed on the inner surfaces of a blind holeetched into the silicon crystal. Protective antire-flective cover layers are included, but not shown forclarity. Light trapping for photons of wavelength kis optimized by arraying blind holes of diameter k/2spaced a distance k apart. Since the holes functionas the fundamental mode light guide whose wallsare weakly absorptive, all of the photons areessentially captured by the metal film (e.g., RhSi).Photons entering in the Si material between theholes are guided into the Si crystal by multiplereflections at the wall interfaces (owing to index ofrefraction discontinuity) and are absorbed by theRhSi film. The geometry is thus optimized for cap-turing most of the photons incident on the sensor.For a p-type device, photo excitation of electronsabove the Fermi level in the metal induce free car-rier holes in the silicon crystal, which are swept by asmall bias potential (0.1 V) towards the p+ collectorcontacts. This recessed SBD uses a method that ismore effective than simple random or periodic sur-face texturing. It is also defined by a controlled andmanufacturable process unlike many previouslyproposed methods. Preliminary analysis indicatesthat the ideal depth of the holes is about three timesthe diameter. This allows sufficient photon trappingwithout an excessive increase in the dark current.

A plan view of an array of photon traps is illus-trated in Fig. 17b. The emitter and collector elec-trodes of individual hole elements are strappedtogether in crossed parallel lines. The collectorelectrodes and lines are embedded in the crystallinesilicon and are insulated from the metallic emitterlines by the oxide. An individual pixel can comprisea single hole or an array of holes, the numberdepending on the focal plane optics. For example, apixel comprising a 3 · 3 array of holes, as indicatedin Fig. 17b, would be coupled by crossed emitter andcollector lines. Read out in the focal plane array of

Fig. 15. Schottky MOS transistor with dual layer Ag–RhSi contacts.Threshold is tuned by ultrashallow Rh implant that modifies gatework function (D/ms).

Fig. 16. Schematic cross section of a Schottky barrier dual gateMOSFET (adapted from Ref. 51).


such pixels could use standard charge coupled sig-nal transfer. In a typical RhSi/p-Si device, the dop-ing of the p- semiconductor under the contact wouldbe 1017 cm-3. Holes are collected in the collectorcontact, in which the p+ doping is 2 · 1019 cm-3 andthe thickness is 0.8 lm. The p+ layer is largelytransparent to the incident photons. The one-passattenuation is only 0.05 dBm. For a conservative25% photon capture efficiency, this RhSi SBD sen-sor has an estimated internal quantum efficiency of10% and responsivity of 0.16 A/W. Trilayer Ti/Pt/Auis used for metallization interconnect because it isvery robust, has zero electromigration, and keepsparasitic series sheet resistances below 2 X/Sq,which is required for high-speed performance.

An adaptation of the recessed SBD concept can beimplemented with RhSi/Si Schottky diodes in radi-ation hardened focal plane arrays. The RhSi con-tacts are formed in holes etched in silicon usingcurrent techniques for forming deep vias for 3Dinterconnect technology. The desired aspect ratio ofabout 3:1 and hole diameter of 2 lm for operation inthe infrared are readily achieved. The holes areprepped with a seed layer deposited by electro-chemical means, such as a thin Pd film that is elec-troless deposited on hydrophilic prepared silicon.

Gain with Schottky barrier junctions can be sig-nificantly improved with avalanche diodes56 and

phototransistors, which were an early proposal byShockley.57 The advantages of choosing phototran-sistors over avalanche photodiodes include bettercurrent gain and lower noise.

Optical response in the traditional bipolar photo-transistor is controlled by irradiation of the base-to-collector junction. While ordinary bipolar and MOStransistors are photo sensitive, the bipolar photo-transistor is optimized for photon collection by giv-ing the base and collector larger areas. Owing to thecurrent gain of the transistor, the responsivity ofthe phototransistor exceeds that of photodiodes. ADarlington-pair configuration can be used with aphototransistor as the input transistor. Phototran-sistors have a dark current arising from the ambi-ent thermally excited carriers. In a bipolarphototransistor light entering the base region gen-erates electron–hole pairs in the reverse biasedbase–collector junction and they drift under theinfluence of the electric field. This produces basecurrent that is injected into the emitter.

The Schottky phototransistor concept proposed inthis article is that of the floating base type. TheSchottky barrier contact is on the collector and thebase is formed in silicon. Figure 18 shows the circuitfor such a p–n–p Schottky phototransistor. A baseconnection is not used, since the base potential isauto-biased by the photo-generated current at theSchottky junction. The bias condition is thereforeimplemented rather simply. The collector of a p–n–ptransistor is made negative with respect to theemitter (or positive for an n–p–n transistor). In ap-type device positive bias on the Schottky basecontact forces photo excited holes that are created atthe Schottky barrier into the base with sub-ls res-idence time in the collector. Similar Schottky con-tact methods were used to produce log-linearamplifiers with a remarkable nine decade dynamicrange. High-speed response is assured by a thinbase layer, while the responsivity is increased byb � 110 for high current output and low bit errorrate signal processing. Device scale allows for 20-Xcircuit series resistance and 30-fF depletion layer

Fig. 17. (a) Cross section of photon trap element of buried Schottkybarrier detector. Emitter is ultra-thin silicide coating on interior ofhole. Collector contact is diffused heavily doped ring. Substrate islightly doped Si crystal. (b) Plan view of arrayed photon trapre-entrant Schottky barrier detector. The walls of the holes act as theSchottky barrier devices. Emitter and collector contacts and (crossedlinear) interconnects are separated by isolation oxide film.

Fig. 18. Circuit of autobiased p–n–p Schottky phototransistor of gainb, showing input photon (ht) at Schottky base junction, base current(IB), output current (IO), load resistor (RL), and power supply (B-).


capacitance for a monolithic high-speed photodetector. The technology extension envisioned is alow inductance, air isolated integrated circuit thatis totally integrated with the phototransistor andamplifier.

The Schottky phototransistor is a low-voltagedevice that can be of the vertical back illuminationtype. Using air bridges and bonding via beam leads,one can integrate phototransistors with coplanarwave guide SiGe CMOS circuit demodulators toproduce monolithic photoreceivers. Modules aremounted with the device sides of the beam-leadedchips facing the substrate. This enables rapidproduct prototyping of phototransistor sub-compo-nents independent of circuit integration.

Owing to the physical reciprocity between detec-tion and emission of photons, a SBD that combinesthe above concepts of light trapping and photo-transistor gain may be adapted as a source of lightemission from silicon, although the photons wouldnot be generated conventionally as an interbandtransition in the semiconductor. Validity of thereciprocity principle was demonstrated for high-efficiency p–n junction solar cells, in which signifi-cant light emission was determined.58

DISCUSSION

Formation of RhSi1-yGey/Si1-xGex contacts (andsimilarly for Pt Si1-yGey/Si1-xGex) uses a methodthat circumvents potential manufacturing issues insilicide–germanide formation, especially if surfacecleaning preparation is insufficient for reproduciblebarrier heights and interface state densities.Manufacturability requires production of Schottkybarrier junctions with near ideal I–V characteristicsand tight tolerances on the barrier height. This isachieved using ultra-low energy (150 eV) plasmaimmersion ion implantation that is implemented asbiased r.f. sputtering.

The operating wavelength range of Schottky bar-rier detectors can be tailored with greater flexibilitythan for semiconductor p–n junction devices becausethe desired Schottky barrier height, /B, is selectable.The available methods include the following:

1. Selection of Pt or Rh as a metallic constituent ofthe silicide–germanide.

2. Ge fraction, x, in Si1-xGex.3. Doping type of the Si1-xGex semiconductor.4. Doping concentration of Si1-xGex at the interface

(analogous to method illustrated in Fig. 10)yields /B lowering with n-type or raising withp-type.

Schottky barrier heights for PtSi on n-type SiGealloys can be estimated by scaling the change inbarrier height with Ge concentration previouslyreported for PtSi on p-type strained SiGe alloy lay-ers.48 There is a need for further experimentalverification and study in this direction.

Schottky-barrier detectors in coplanar wave guidecircuits can be stand-alone high-frequency devices.These are beam leaded microstrip devices, in whichthe beam leads are used to make contact to thediode electrodes and are tapered to match, forexample, beam lead microwave electronics.31,59,60

Bonding with beam leads and air bridges has theadvantages of being both rugged and inexpensive. ASchottky-barrier photoreceiver that is integrated toa microwave strip line center conductor would belike microwave detectors9 and can be built in insu-lating Si1-xGex on a Si or SOI substrate. In a diodeor phototransistor detector using photon generationat a Schottky RhSi1-yGey/n-Si1-xGex contact, thedoping of the Si1-xGex region under the contact is onthe order of n- � 1017 cm-3 and has a thickness onthe order of 0.1 lm. Electrons are collected in aRhSi1-yGey/n

+Si1-xGex contact, where the n+ layerhas a doping of 2 · 1019 cm-3 and thickness of0.8 lm, which gives a sheet resistance Rs = 30 X/Sq.This would be suitable for detecting 1,550 nm pho-tons, since the n+ layer is largely transparent to1,550 nm photons. The one-pass attenuation is only0.05 dBm. For a conservative 25% photon captureefficiency, such a Schottky RhSi1-yGey/n-Si1-xGex

detector has an estimated internal quantum effi-ciency of 2% and responsivity of 20 mA/W.

Extending Schottky-barrier imaging sensor tech-nology to advanced high-speed devices with planarcontacts in an interdigitated or concentric layoutcould fully exploit the high saturation drift velocityof electrons in the depletion layer (up to 107 cm/s).The theoretical limit on bit rate in digital devices ison the order of 40 Gb/s.61 This geometry circum-vents any need for an n+ layer in the photon path-way and its parasitic series resistance. Moreover,with diode technology based on Rh (or Pt), thedetector speed can be optimized absolutely, unlikesemiconductor p–n junction devices, in whichdepletion layer thickness dictates photon generationefficiency. High device speed is realized in thisapproach because of the 1-ps electron transit timein the depletion layer field in n- Si1-xGex underRhSi1-yGey/n-Si1-xGex contacts in the diode. Signalto thermal emission noise ratio of 40 is achievedwith an optical input power of -20 dBm. This devicewould use Ti/Pt/Au metalization for high-speedperformance.

The RhSi1-yGey/Si1-xGex Schottky barrier is anatural substructure for a SiGe heterostructurebipolar phototransistor of the floating base type fora monolithic high-speed photo detector. The Scho-ttky barrier contact is on the collector and the baseis formed in Si1-xGex. For an n-type device, negativebias on the RhSi1-yGey contact forces photo excitedelectrons that penetrate the Schottky barrier in tothe base with sub-ps residence time in the collector.For extending the technology to optical communi-cations devices, a beam lead method is used to aproduce a low inductance, air isolated integrated


circuit that is totally integrated with the photo-transistor and amplifier.

High framing rate, long wavelength infraredcameras (beyond 5 lm) with Schottky-barrier diodearrays may function in the thermal emissive mode.One such utilization is the all solid state tempera-ture sensor that is based on the physical principle ofthermionic emission.62 The temperature sensorcomprises a pair of Schottky-barrier diodes of dis-similar Schottky barrier heights. The differentialthermionic emission current is converted to a volt-age that is used in a temperature control feedbackloop. The semiconductor circuit is formed on a thin,low thermal conductivity membrane.63 It is con-structed with beam lead technology and formedwith selective etching (like MEMS methods). Thepassive element, which serves as a thermal radia-tion sensor element is integrated with active ele-ments in close proximity. Although it is used as aninfrared bolometric sensor, it has a very fastresponse time, owing to the low mass and lowthermal heat sinking of the passive pattern.

Schottky barriers can be formed by ultra-lowenergy ion implantation of Pt or Rh films on Siprepared with a deposited Si1-xGex film withislanded growth morphology (Stransky–Krastanovgrowth mode).29,64,65 The deposition conditions forthe growth of this nanoscale texture is energeticallydriven by the strain caused by lattice mismatchbetween the Si1-xGex phase and the Si substratethat gives rise to positive wetting angle of the SiGeislands on Si. The lattice mismatch strain is sharedby local relaxation of the Si substrate below the Si1-

xGex islands. The Si1-xGex is in compression whilethe Si underneath is in dilation. Although the con-duction band in cubic Si is 0.020 eV higher than theconduction band in strained Si1-xGex, the strain inthe Si at the interface is likely to eliminate thissmall barrier.66 The islanded film can be subse-quently capped with a sacrificial Si film layer that isconsumed in the metal silicidation reaction.47 A10 nm Rh layer and a 14 nm Si cap will produce aRhSi film of approximately 20 nm thickness. Thenanostructured interface between the RhSi film andthe semiconductor substrate serves several pur-poses. Collection efficiency of photo excited electronsis increased. This is analogous to other methods ofenhancing the quantum efficiency of Schottky-bar-rier photodetectors, such as found by porous siliconformation.54 Reduction of the barrier height in-creases thermionic emission of photo excited elec-trons into the semiconductor. The method can beextended to form RhSi1-yGey/Si1-xGex contacts,where y £ x.

CONCLUSIONS

This work presents several new silicide–germa-nide high-performance optoelectronic materials anddevices based on the platinum group metals of Pt orRh, drawing particular attention to the unique

properties of Rh. Applications include (1) robustlow-resistance Schottky contacts to highly dopedsource and drain in MOS transistors, (2) Schottky-barrier source field-effect transistors for high-speed,low-power applications, (3) high-speed infrareddetection by internal photoemission in Schottkybarrier junctions in super-beta high-gain photo-transistors, (4) ultrathin interfacial films for workfunction modification and tuning in metal-gate high-j MOS transistors, (5) bolometric infrared detectors,and (6) low sheet resistance metallization. Newdevice concepts are introduced for photon trappingin a re-entrant Schottky-barrier detector, dual-layerAg-RhSi Schottky contacts for MOS transistors, andfloating-base auto-biased phototransistors.

ACKNOWLEDGEMENTS

The authors dedicate this article to the memory ofthe late Walter F. Kosonocky, acknowledging hispioneering work in the field of infrared imaging.This work was supported in part by BTL Fellows,Inc., New Jersey Institute of Technology, and TheMinerals, Metals and Materials Society.

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Journal of ELECTRONIC MATERIALS, Vol. 37, No. 4, 2008