Lab Manual
Lab ManualDigital logic designSubmitted to Ali Ahsan 2013Engr
Saad Ur Rehman [email protected] Ph# +923347471680
Experiment # 01Objective:To verify the AND gate embedded into an
IC chip by using Digital Logic Training SystemApparatus:1. Digital
Logic Training System (including bread board)1. Connecting wires 1.
7408 IC chipWhat is an AND gate?Actually a gate is an arrangement
of electrical elements such that this arrangement of electrical
elements manipulates a given input according to a particular logic.
Binary coding is very useful to deal with gates. Here 1 represents
the presence of a signal and 0 represents the absence of a signal.
AND gate work on the following principle:If all the inputs are on,
then result is 1. But if anyone from the applied inputs is of, then
result is 0.Procedure:Insert the given IC chip in bread board such
that the legs on one side of IC are inserted in row of one block of
bread board, and the legs on other side are inserted in row of
adjacent block of the bread board. Read the number of given IC
before inserting it into the bread board. The number tells you that
which type of gate is embedded in the corresponding IC. After
inserting the bread board, connect the 7th terminal of IC by using
a connecting wire with the ground port of digital logic training
system apparatus. Connect the 14th terminal of IC with 5V power
supply. Input voltage at 1st and 2nd terminal of IC chip. Take
output by connecting the 3rd terminal with output slot of
apparatus. If you are verifying NOT gate then only one input is
needed at 1st terminal and output is taken from 2nd terminal of IC.
ON/OF the switch to verify the gate embedded into the given IC
chip. Light on means that output is 1 and light of means that
output is 0. Repeat this procedure for AND, NOT and OR gate.
Number assigned to given IC according to logic embedded in it:1.
AND is assigned 74081. OR is assigned 74321. NOT is assigned
7404Truth Table of AND gate:Input 1Input 2output
000
010
100
111
Conclusion:After verifying the above truth table we conclude
that the 7408 IC is embedded with AND gate.
Picture of AND gate verification experiment.
Experiment # 02Objective:To verify the OR gate embedded into an
IC chip by using Digital Logic Training SystemApparatus:1. Digital
Logic Training System (including bread board)1. Connecting wires 1.
7432 IC chipWhat is an OR gate?Actually a gate is an arrangement of
electrical elements such that this arrangement of electrical
elements manipulates a given input according to a particular logic.
Binary coding is very useful to deal with gates. Here 1 represents
the presence of a signal and 0 represents the absence of a signal.
OR gate work on the following principle:If all the inputs are of,
then result is 0. But if anyone from the applied inputs is on, then
result is 1.Procedure:Insert the given IC chip in bread board such
that the legs on one side of IC are inserted in row of one block of
bread board, and the legs on other side are inserted in row of
adjacent block of the bread board. Read the number of given IC
before inserting it into the bread board. The number tells you that
which type of gate is embedded in the corresponding IC. After
inserting the bread board, connect the 7th terminal of IC by using
a connecting wire with the ground port of digital logic training
system apparatus. Connect the 14th terminal of IC with 5V power
supply. Input voltage at 1st and 2nd terminal of IC chip. Take
output by connecting the 3rd terminal with output slot of
apparatus. If you are verifying NOT gate then only one input is
needed at 1st terminal and output is taken from 2nd terminal of IC.
ON/OF the switch to verify the gate embedded into the given IC
chip. Light on means that output is 1 and light of means that
output is 0. Repeat this procedure for AND, NOT and OR gate.
Number assigned to given IC according to logic embedded in it:1.
AND is assigned 74081. OR is assigned 74321. NOT is assigned
7404Truth Table of AND gate:Input 1Input 2output
000
011
101
111
Conclusion:After verifying the above truth table we conclude
that the 7432 IC is embedded with OR gate.
Picture of OR gate verification experiment.
Experiment # 03Objective:To verify the NOT gate embedded into an
IC chip by using Digital Logic Training SystemApparatus:1. Digital
Logic Training System (including bread board)1. Connecting wires 1.
7404 IC chipWhat is an NOT gate?Actually a gate is an arrangement
of electrical elements such that this arrangement of electrical
elements manipulates a given input according to a particular logic.
Binary coding is very useful to deal with gates. Here 1 represents
the presence of a signal and 0 represents the absence of a signal.
NOT gate work on the following principle:If input is on then output
is 0 and if input is of the output is 1. So it works as an
inverter.Procedure:Insert the given IC chip in bread board such
that the legs on one side of IC are inserted in row of one block of
bread board, and the legs on other side are inserted in row of
adjacent block of the bread board. Read the number of given IC
before inserting it into the bread board. The number tells you that
which type of gate is embedded in the corresponding IC. After
inserting the bread board, connect the 7th terminal of IC by using
a connecting wire with the ground port of digital logic training
system apparatus. Connect the 14th terminal of IC with 5V power
supply. Input voltage at 1st and 2nd terminal of IC chip. Take
output by connecting the 3rd terminal with output slot of
apparatus. If you are verifying NOT gate then only one input is
needed at 1st terminal and output is taken from 2nd terminal of IC.
ON/OF the switch to verify the gate embedded into the given IC
chip. Light on means that output is 1 and light of means that
output is 0. Repeat this procedure for AND, NOT and OR gate.
Number assigned to given IC according to logic embedded in it:1.
AND is assigned 74081. OR is assigned 74321. NOT is assigned
7404Truth Table of AND gate:inputoutput
01
10
Conclusion:After verifying the above truth table we conclude
that the 7432 IC is embedded with OR gate.
Picture of NOT gate verification experiment
Experiment # 04Objective:To verify the Exclusive-OR gate using
NAND gatesApparatus:1. Digital Logic Training System (including
bread board)1. Connecting wires 1. IC chips embedded with NAND
gatesWhat is an Exclusive OR gate?Actually a gate is an arrangement
of electrical elements such that this arrangement of electrical
elements manipulates a given input according to a particular logic.
Binary coding is very useful to deal with gates. Here 1 represents
the presence of a signal and 0 represents the absence of a signal.
Exclusive OR gate work on the following principle:Output is 1 if
and only if inputs are different from each other, otherwise output
is 0.Procedure:Arrange the given ICs, embedded with NAND gates,
onto the bread board according to arrangement as shown in the
figure below.
Apply input at 1st and 2nd pin of gate # 03. Connect the 1st pin
of gate # 01 with input terminal A and 2nd pin of gate # 01 with
output of gate # 03. Connect the 1st pin of gate # 02 with output
of gate # 03 and 2nd pin of gate # 02 with input terminal B.
Connect the 1st and 2nd pin of gate # 04 with output of gate # 01
and gate # 02 respectively. Take the output from gate # 04. Apply
different input combinations from digital logic training system to
verify the Exclusive OR gate.
Truth Table of Exclusive OR gate:INPUT 1INPUT 2OUTPUT
110
10 1
011
000
Conclusion:After applying different combinations of inputs we
conclude that the arrangement of NAND gates on bread board as
directed by procedure is reacting as an Exclusive-OR gate.
Picture of verification of Exclusive-OR gate using NAND
gates
Experiment # 05Objective:To verify the logic of half adder using
Exclusive-OR and AND gateApparatus:1. Digital Logic Training System
(including bread board)1. Connecting wires 1. IC chips embedded
with Exclusive-OR and AND gatesWhat is Half Adder?Half Adder is a
combinational circuit, which takes 2 numbers (one bit binary) from
the user and then it add up these numbers using binary addition and
results in two outputs, one is for sum and other is for carry.
Procedure:Arrange the given ICs, embedded with Exclusive-OR and AND
gate, onto the bread board according to arrangement as shown in the
figure below.
Apply input at 1st and 2nd pin of both ICs. Ground the 7th pin
of both ICs. Supply voltage at 14th pin of both ICs. Apply
different input combinations to verify the half adder circuit.
Truth Table of Half Adder:INPUT 1INPUT 2SumCarry
1101
1010
0110
0000
Conclusion:After applying different combinations of inputs we
conclude that the arrangement of Exclusive-OR and AND gates is
corresponds to half adder circuit.
Picture of verification of Half Adder
Experiment # 06Objective:To verify the logic of full adder using
2 half adders and an OR gateApparatus:1- Digital Logic Training
System (including bread board)2- Connecting wires 3- IC chips
embedded with Exclusive-OR and AND and OR gatesWhat is Full
Adder?Full Adder is a combinational circuit, which takes 3 numbers
(one bit binary) from the user and then it add up these numbers
using binary addition and results in two outputs, one is for sum
and other is for carry. Procedure:Arrange the given ICs, embedded
with Exclusive-OR and AND and OR gates, onto the bread board
according to arrangement as shown in the figure below.
Apply input1 and input2 on the 1st and 2nd terminal of both
Exclusive-OR and AND gate. Apply the output of 1st Exclusive-OR
gate at 1st terminal of 2nd Exclusive-OR gate. Apply input3 at 2nd
terminal of 2nd Exclusive-OR gate. Also apply these inputs to 2nd
AND gate. Apply the outputs of both AND gates to OR gate. The
output of 2nd Exclusive-OR gate is sum and output of OR gate is
carry.
Truth Table of Full Adder:INPUT 1INPUT 2INPUT 3CarrySum
00000
00101
01001
01110
10001
10110
11010
11111
Conclusion:After applying different combinations of inputs we
conclude that the arrangement of Exclusive-OR and AND and OR gates
is corresponds to full adder circuit.
Picture of verification of full AdderExperiment # 06Objective:To
verify the logic of full adder using 2 half adders and an OR
gateApparatus:1- Digital Logic Training System (including bread
board)2- Connecting wires 3- IC chips embedded with Exclusive-OR
and AND and OR gatesWhat is Full Adder?Full Adder is a
combinational circuit, which takes 3 numbers (one bit binary) from
the user and then it add up these numbers using binary addition and
results in two outputs, one is for sum and other is for carry.
Procedure:Arrange the given ICs, embedded with Exclusive-OR and AND
and OR gates, onto the bread board according to arrangement as
shown in the figure below.
Apply input1 and input2 on the 1st and 2nd terminal of both
Exclusive-OR and AND gate. Apply the output of 1st Exclusive-OR
gate at 1st terminal of 2nd Exclusive-OR gate. Apply input3 at 2nd
terminal of 2nd Exclusive-OR gate. Also apply these inputs to 2nd
AND gate. Apply the outputs of both AND gates to OR gate. The
output of 2nd Exclusive-OR gate is sum and output of OR gate is
carry.
Truth Table of Full Adder:INPUT 1INPUT 2INPUT 3CarrySum
00000
00101
01001
01110
10001
10110
11010
11111
Conclusion:After applying different combinations of inputs we
conclude that the arrangement of Exclusive-OR and AND and OR gates
is corresponds to full adder circuit.
Picture of verification of full Adder
