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8/10/2019 Lecture 9 JFET
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Electronic DevicesKEEE 2224
Lecture 9
Junction Field-Effect Transistor
(JFET)
Dr. Ghafour Amouzad Mahdiraji
November 2012
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Junction Field-Effect Transistor (JFET)
pn junction FET
Fabricated with
pn plus junction
MEtal-Semiconductor FETMESFET
Fabricated with
Schottky Barrier
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Space Charge Region
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JFET Concepts
A voltage applied to the metal platemodulated the conductance of the
semiconductor under the metal and
controlled the current between the
ohmic contacts. The phenomenon of modulating the
conductance of a semiconductor by
an electric field applied
perpendicular to the surface of asemiconductor is called field effect.
This type of transistor has also been called the unipolar transistor, to
emphasize that only one type of carrier, the majority carrier, is involved in the
operation.
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pn Junction Field-Effect Transistor (or pn JFET)
The n region between the two pregions is known as the channel.
In this n-channel device, majority
carrier electrons enters from the
source terminal into the channel and
flow towards the drain terminal.
The gate is the control terminal.
The two gate terminals (p regions)are tied together to form a single gate
connection.
A complementary p-channel JFET can also be fabricated in which the p andn regions are reversed from those of the n-channel device.
In p-channel device, majority carrier holes enters from the source terminal
into the channel and flow towards the drain terminal.
The p-channel JFET is generally a lower frequency device than the n-
channel JFET due to the lower hole mobility.
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pn JFET Basic Operationzero voltage applied to the gate (V
GS= 0)
If the source terminal is at ground potential, and if a small positive drain
voltage is applied, a drain current ID
is produced between the source and
drain terminals.
The n channel is essentially a resistance so the ID versus VDS characteristic,for small V
DSvalues, is approximately linear, as shown in the figure.
Gate-to-channel space charge regions and I-Vcharacteristics for small VDS
values for
zero gate voltage.
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pn JFET Basic Operationreversed-biased gate voltage (V
GS< 0)
In general, when a voltage applied to the gate of a pn JEFT with respect tothe source and drain, we alert the channel conductance.
If a negative voltage is applied to the gate of the n-channel pn JFET (VGS
VDS
(sat), the transistor is said to be in the saturation region and thedrain current, for this ideal case, is independent of V
DS.
Is the ID zero when the channel becomes pinched off at the drain terminal?
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pn JFET Basic OperationVGS
= 0 and very large drain voltage VDS
As the figure shows, at the pinchoff region in the channel, the n channel and
drain terminal are now separated by a space change region, which has a
length L.
The electrons move through the n channel from the source and are injectedinto the space charge region where,
subjected to the E-field force, they
are swept through into the drain
contact area.
If we assume that L
VDS(sat), both the E-field and Lchange slightly together, which
let the drain current remain
constant. Thus, the device looks
like a constant current source.
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MEtal Semiconductor FET
The second type of junction field-effect transistor is the MESFET. The gate junction in the pn junction FET is replaced by a Schottky barrier
rectifying contact (or simply MEtal).
Usually, MESFETs fabricated by semi-insulating GaAs substrate, to include
higher electron mobility, hence smaller tranit time and faster response, and
simplified fabrication process.
Although MESFETs can be fabricated in silicon,
they are usually associated with gallium arsenideor other compound semiconductor materials.
A thin epitaxial layer of GaAs is used for the
active region; the substrate is a very high
resistivity GaAs material referred to as a semi-
insulating substrate. GaAs is intentionally doped
with chromium, which behaves as a single
acceptor close to the center of the energy
bandgap, to make it semi-insulating with a
resistivity as high as 10
9
-cm.
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MESFET Basic Operation(depletion mode)
The MESFET shown in the figure is normally ON or in depletion mode
device, which means it need a voltage to pinch off the channel.
A reverse-biased gate-to-source voltage (or negative voltage to gate) applied
to the MESFET shown in the figure, induces a space charge region under themetal gate that modulates the channel conductance as in the case of the pn
JFET.
The space charge region willeventually reach the substrate if the
applied negative gate voltage is
sufficiently large. This condition,
again, is known as pinchoff.
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MESFET Basic Operation(enhancement mode)
MESFETs can also be fabricated in enhancement mode, where channel is
normally pinched off even at zero gate voltage.
As the figure shows, the space charge region width is larger than the channel
width, which make the device pinch off.
Channel space charge region of an
enhancement mode MESFET for
zero gate-semiconductor voltage
VGS
= 0.
To open a channel, the depletion region must be reduced: a forward-bias
voltage must be applied to the gate-semiconductor junction.
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MESFET Basic Operation(enhancement mode)
When a slightly forward-bias voltage is applied, the depletion region width
slightly reduced, just as width as channel; a condition known as threshold.
The threshold voltage is the gate-to-source voltage that must be applied to
create the pinchoff condition.
The threshold voltage for this n-channel MESFET is positive, in contrast to
the negative voltage for the n-channel depletion mode device.
Channel space charge region of an enhancement
mode MESFET for gate-semiconductor voltageequal to threshold voltage V
GS= V
T.
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MESFET Basic Operation(enhancement mode)
If a larger forward bias is applied, the channel region opens and let the
electrons flow from the channel.
The applied forward-bias gate voltage is limited to a few tenths of volts
before there is significant gate current. This device is known as an n-channel enhancement mode MESFET.
Channel space charge region of an enhancement
mode MESFET for gate-semiconductor voltage
larger than threshold voltage VGS
> VT.
Enhancement mode p-channel MESFETs and enhancement mode pn junction FETs
have also fabricated.
The advantage of enhancement mode MESFETs is that circuits can be designed in
which the voltage polarity on the gate and drain is the same, however, the outputvoltage swing will be quite small with these devices.