Lecture no 9 (Mot 6) Noise in field effect transistors · Electronic noise –estimates and countermeasures Lecture no 9 (Mot 6) ... We now also includes Cds. External loads are represented

INF 5460Electronic noise – estimates and countermeasures

Lecture no 9 (Mot 6)

Noise in field effect transistors

Two types of field effect transistors: • MOSFET: Capacitive control of the channel • JFET: Variation of the width of a reversed biased depletion zone that determines the width of the channel. GaAs FETs have a similar behaviour.

INF5460 Noise in field effect transistors 2

MOS and JFET

FET (Field Effect Transistor) implies that a channel is created/throttled as a result of the voltage of a control terminal. There are essentially two ways to do this:

• MOS: The gate sets up a field that creates a channel on the other side of an insulator

• JFET (Junction FET): The voltage on the gate controls the width of the depletion zone which opens/closes the channel. JFETs are available in two variants

– Discrete components: the gate lie on both sides of the channel.

– ASIC: the gate is on one side while it is an insulator on the other side of the channel.


Noise Mechanisms

The figure shows a simple FET-model extended with noise models.

Elements of a typical model: Cgs, Cgd: Capacitance between gate and source and between gate and drain. gmVgs: Current between source and drain. RDS: Resistance in the channel between drain and source.


Noise models: Gate:

• Shot-Noise in leakage current through the gate (especially JFET and newer small linewidth CMOS) and

• thermal fluctuations from the drain node, which affects the gate node

Drain:

• Ind: Thermal excitations in the channel.

• If: Flicker noise in the channel

The gate and Ind thermal noises are both due to thermal noise in the channel and they are partially correlated at higher frequencies.


En-In representation of noise

The figure show the typical trends for En and In in a FET. En is flat at high frequencies but grows at lower frequencies due to flicker noise. In is flat at low frequencies but grows linearly with frequency above a corner frequency.


En: The constant, frequency independent contribution of En at high frequencies is due to thermal noise in the channel. This thermal noise in the channel can be modelled by a serial resistance at the input with size:

Its noise voltage is calculated in the usual way:

To minimize noise in region 2 gm should be large.

In: When it comes to the In-noise at low frequencies (region 3) this is due to shot-noise in the dc-reverse current in JFETs and shot-noise leakage currents in the MOSFET. This noise is "white" and has usually no 1/f-component.

The rise in region four is due to the real part of the input admittance.

m

ng

R3

2

nn kTRE 4

GSSn qII 2


Modified model for slightly higher frequenciesWe will now study the effect of the feedback caused by Cgd first ignoring the noise.

We now also includes Cds. External loads are represented by a resistance and a capacitance. Total resistive load RL is now in parallel with the value of the internal resistance rds and the external RD. Total capacitive load CL is the parallel value of the internal capacitance Cds

and the external CD. INF5460 Noise in field effect transistors 8

The effect of the feedback capacitor Cgd can be made visible by use of a Miller theorem.

With a voltage gain Av the feedback element Z can be divided into two impedances Z1 and Z2 given by the following expression:

and

vA

ZZ

1

1

vA

ZZ

112


With the elements of the MOSFET we get:

where ZL is determined by

The feedback element Z is given by

We want to analyse the input and insert in the expression of the Z1, so that we get:

The admittance is the inverse of Z1 and we get:

[We have multiplied by (1-jRLCL) in the numerator and denominator]

Lm

gs

Lgsm

gs

dsv Zg

v

Zvg

v

vA

LLL CjRZ 1||

gdCjZ 1

LmgdgdLL

LL

RgCjCCR

CRjZ

1

121

222

22222

11

11

LL

LLLmgdLLLmgdgdLL

CR

CRRgCjCRRgCCCRY


The real part of Y1 is:

The real part represent a resistance. (In our case Z1 will be between the gate and source.)

Normally ²RL²CL² ≪1 so that the expression can be simplified to

The imaginary part of Y1 is:

This means that we also have an equivalent capacitance between gate and source which is:

.

222

22

11

ReLL

LgdLm

CR

CCRgY

LgdLm

LLeq

CCRg

CR

YR

22

222

1

1

Re

1

LgdLm

eqCCRg

R22

1

222

222

11

1Im

LL

gdLLLmgd

CR

CCRRgCjY

222

222

1

1

LL

gdLLLmgdeq

CR

CCRRgCC


Also this expression can be simplified because ²RL²CL² ≪1 to:

Let us look a little more on the expression we found for the equivalent resistance:

We see that this resistance decreases with the square of the frequency. This resistance will have an effective noise current √(4kT/Req). This gives the rise in In at higher frequencies as it is illustrated in the figure presented earlier.

The noise elements En and In are correlated at higher frequencies since they both have a significant contribution from the same source: Thermal noise in the channel resistance. This means that the noise is somewhat greater and we must include an additional correlation element.

2221 gdLLLmgdeq CCRRgCC

LgdLm

eqCCRg

R22

1


Example: Calculation of input conductanceGoal: Find the input impedance Gi and noise current In for a FET where: gm = 500S , Cgd= 1pF, CL = 3pF and RL = 200k

We use the term for "Re Y" as we did previously and can plot the curve, as shown on the right:

The noise current In can be calculated as √(4kTGi) and is shown in the plot to the left:


Simple FET model

First, we ignore the noise and consider a standard MOSFET.

The transistor can be in cut-off, linear region or in saturation. In the linear region the current Ids has a strong dependence on Vds, while in saturation the dependence is weaker. The linear range is often named the resistive or ohmic region.


In saturation Ids can be expressed as follows:

Here modulates the dependence on the channel length, VT is the threshold voltage, W is the channel width, while L is the channel length. The transconductance value KP can be expressed as:

Here is 0 the mobility of the channel and Cox the capacitance over the gate oxide.

Some examples of sizes from the book:N-channel p-channel Denomination

KP 41.8 15.5 A/V²

VT 0.79 -0.93 V

0.01 0.01 1/V

DSTGSpD VVVL

WKI

1

2

20 ox

p

CK


Key parameters are transconductance ...

.. and output conductance ...

TGS

DDSTGSp

poQGS

Dm

VV

IVVV

L

WK

V

Ig

212

int

DDSTGSp

poQdsDS

Dds IVVV

L

WK

rV

Ig

11 2

int


The capacitances Cgd and Cgs. These capacitances will vary depending on the region:

Cox may be defined as:

... and stated i fF/um ²

Region

Cut-off Linear Saturation

Cgd COXWLD COXWLD + (1/2) WLCOX COXWLD

Cgs COXWLD COXWLD + (1/2) WLCOX COXWLD + (2/3) WLCOX

ox

SiO

oxt

C 20


Example: Find ID, gm and gds

N-MOSFET with W/L = 50, VGS = 1V and VDS = 5V. Use additional values from the table.

First, we check whether it is conducting and in saturation? VDS (= 5V) VGS-VT (= 1-0.79 = 0.21V)Yes, it is in saturation!

Then we calculate the current in accordance with the equation for the IDS.

Then we find gm and gds:

MSgr dsds 029.1972.011

SAVIg Dds 972.02.9701.0 1

SVAVVA

VVVLWKg DSTGSpm

92692605.121.050/8.412

01.012

2

AVVAID 2.9705.179.01508.41 222


Calculation of noise in a MOSFETAs previously mentioned we have three noise sources in our noise model: Ing, Ind and If. Ing:Ing is mainly shot noise and can be modulated with:

The increase in In at high frequencies is due to the Miller coupling through the Cgd of noise in the channel.

Ind:Ind is the thermal noise in the channel. In parallel with drain-source it is:

(This is the same noise that we would have had if we had a parallel resistance in the channel with a size of:)

If: The Flicker noise is also between the source and drain:

dcng qII 22

3

82 mnd

kTgI

m

DRAINg

R2

3

2

2

effox

ADQF

fLfC

IKI

F


The noise current at the output from the two dominating sources is:

To find the equivalent noise at the input we first have to find the gain of the transistor. In this case we have current at the output and voltage at the input:

We get the equivalent noise at the input by dividing the noise on the output by the gain:

We insert for Ind and If:

(AF1, L Leff, (1 -VDS 1)1)

(The first clause corresponds to the noise voltage from a transistor with size:)

222fndno III

m

signalgs

signald

tr gv

iK

)(

)(

2

2

2

222

m

f

m

ndnni

g

I

g

IEE

effoxp

F

m

nniWLfCK

K

g

kTEE

23

822

m

ng

R3

2


Ind in short length devicesWe learnt in the previous that the thermal noise in the channels could be expressed as:

However in newer technologies with smaller transistor lengths it is a little more complicated and more correct will be:

where is 2/3 for long L and increasing for short L. An example measurement shows =2.5 for L=0.25µm.

When Vds=0 the expression is

where for short L and for long L in saturation.

Ref: Razavi Design of Analog CMOS Integrated Circuits

mnd kTgI 82

mnd gkTI 42

dsnd gkTI 42

onds Rg 1 mds gg


Example: Find EniUse the same transistor that we considered previously. In addition:

• Leakage current IDC: 100fA,

• Cox = 0.7fF/m², f = 1Hz, fc = 1kHz,

• KF = 3.6x10-30 C²/Vs, AF=1 and

Solution: First we find the shot-noise at the input:

Then we find the thermal noise in the channel:

(Equivalent resistance for this noise is: )

mmmLLL deltadrawneff 235.3365.02.13

HzAqII dcng /102.31010602.122 23213192 2/1/18.0 HzfAIng

HzAkTg

I mnd /1088.93/10926106.12

3

8 2246202

2/1/14.3 HzpAInd

kg

Rm

DRAIN 62.1109262

3

2

36


Flicker noise calculated:

Total noise in the drain-source channel is:

Then we find the equivalent input noise that this represents:

2/1

223

215

6302

2

2

/9.6

/1077.4235.3107.01000

102.97106.3

HzpAI

HzAI

LfC

IKI

f

f

effox

ADQF

f

F

2/1

2232

223242

222

/59.7

/1076.5

/1077.41088.9

HzpAI

HzAI

HzAI

III

no

no

no

fndno

2/1

217

26

232

/19.8

/1071.610926

1076.5

HznVE

HzVE

ni

ni


Some comments:

• The flicker noise is dominant at 1kHz

• (The proportion of Eni² due to Ind is equivalent to placing a resistance on the gate (in series) with size:)

How to achieve low noise? Let us study the equation we found for the equivalent input noise:

We should have a large gm which means that we should have a large W/L ratio and a high idle current. Creating large transistor will also reduce the flicker noise and, thus, reduce the corner frequency (i.e. the frequency where the flicker noise is the same size as other noise sources.)

720109263

2

3

26

m

ng

R

22

23

8n

effoxp

F

m

ni EWLfCK

K

g

kTE


Example: Determine the corner frequencyAt the corner frequency the two contributions are equal:

Inserted we get:

Substituted values result in:

22ndf EE

28

3

effoxm

ADQF

cLCkTg

IKf

F

kHzfc 83.4


MOS noise sources• Flicker noise in channel

• Thermal noise in channel

• Shot-noise in leakage channel-gate

• Coupled thermal noise at gate

• Thermal noise in gate

• Thermal noise in bulk

• Thermal noise in source

• Thermal noise in drain

• Shot-noise drain-bulk

• Shot-noise source-bulk

• (Coupling noise to bulk)INF5460 Noise in bipolar transistors 26

CMOS switch charge injection• A conducting CMOS

transistor keeps some charge in the channel

• When turned off this charge is released through the source/drain and generates an (unpredictable) voltage change

• A proposal is to add a pair of half-sized “opposite” dummy transistors. However this solution requires impedance symmetry.

CMOS switch charge injection

• The injected charge is a function of transistor size and voltage level

• Small transistor gives slow response but small step.

• Large transistors gives fast response but large step.

• Parallel, different sized transistors with different pulse termination times may give both fast response and minimum step.

CMOS switch charge injection• Sharp input pulse at 0ns, all switches closed (conducting)

• S2 (large) opens at 1ns

• S1 (medium) opens at 1.5ns

• S0 (small) opens at 2ns

• OUT0 : S0

• OUT2 : S2

• OUT012: S0+S1+S2

Observations:

• Generated voltage step depends on signal level

• OUT0: Slow but minimum step

• OUT2: Fast but large step

• OUT012: Fast and minimum step

INF5460 Noise in bipolar transistors 29

Sampler with switch charge cancelation• A differential sampler with

same sized switches on both inputs may almost eliminate the influence by the charge injection.

• At sampling both transistors have the same potential and generates similar charge on both inputs.

Sampler with injection compensation

• OUTsimp: standard

• OUTmod: with charge injection compensation

• The inputs experience a very equal step resulting in a stable output

INF5460 Noise in bipolar transistors 31

Correlated double sampling• Photo diodes

(CMOS pixel cells) consist of a reversed biased diode operating as a capacitor.

• A switched reset potential is placed on the sensor node. Accumulated electrons generated from light photons reduces the sensor node potential.


Correlated double sampling

Due to charge injection and thermal noise the sensor node will be resat to unpredictable levels. With correlated double sampling

the value is measured both immediately after reset and before next reset. The difference is used.


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Lecture no 9 (Mot 6) Noise in field effect transistors · Electronic noise –estimates and countermeasures Lecture no 9 (Mot 6) ... We now also includes Cds. External loads are represented