https://sunypoly.edu/research/nanobio/

Nathaniel C. Cady, PhD

Colleges of Nanoscale Science & Engineering

SUNY Polytechnic Institute

Sumit Kumar Jha, PhD

University of Central Florida

Memristors (RRAM) for Novel, High-density

Memory and Logic

https://sunypoly.edu/research/nanobio/

https://sunypoly.edu/research/nanobio/

https://sunypoly.edu/research/nanobio/

Memristor/CMOS

Integration

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Memristors / ReRAM / RRAM

Metal-Insulator-Metal device

structure

Memristor = ReRAM = resistive

memory

Memory function based on high

resistance and low resistance states

Resistance states are controlled by

current/voltage history

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Development Mask Layout

Multi Project Wafer (MPW) format:

Die 1

Block A: 1R (0.1 – 10 um), 12 x 12 X-bars

Block B (2x): XOR AES Module, CMOL, 1T1R

…

Die 2

128x128 (16Kbit) X-bar

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Development Images of integrated CMOS-ReRAM

Section 1

Drain

Source

BE (M2)

TE (M1)

TiN/HfOx (OP)

Body

S/D (CA)

Section 2 500 nm

Gate

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Memristors for Logic

Applications

w/ Sumit Kumar Jha

UCF

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Why compute with x-bar memristors?

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Sneak Paths in ReRAM Crossbars

Schematic of a ReRAM Crossbar Array

White: High Resistance, Black-Low Resistance

(4,1) has a sneak path that traverses the resistors (1,1), (1,3)

and (4,3) indicating (4,1) as Low resistance while this is

actually High

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ReRAM Crossbar-based Adder

1 Bit Full Adder A

B

Sum

Cin

Cout

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Adder Demonstration

0 0.1 0.2-0.5

0

0.5

1

1.5

2

2.5

3x 10

-4

Voltage( Volts)

Curr

ent

(Am

ps)

A B Cin = 101Sum = 0

Cout = 1

Sum

Cout

1

1

0

Cout = 1 (current)

Sum = 0 (no current)

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Summary & Acknowledgements

Have fabricated 12 x 12 and 128 x 128 x-bar memristor arrays

Have designed a 1-bit adder and verified functionality in x-bar

array

Have designed 2-bit adders & multipliers

Currently testing these designs electrically

Acknowledgements

NSF XPS program

US Air Force Research Labs (6.2 Funding)

US Army (SBIR)

See our poster for more information!!!