Microwave Amplifier Designweb.nchu.edu.tw/~ycchiang/MicroWave/Microwave_10.pdf · Twowo o t owe Ga s Port Power Gains • Example 11.1 Comparison of Power Gain Definitions A microwave

Microwave Amplifier Design

1

Microwave Amplifier Designc owave p e es g

• Two-Port Power Gains

LL SPGGainPower , inavs

inPP

S

Figure 11-1 (p. 537) A two-port network with general source and load impedances.

SA

L

SPPGGainAvailable

SP

GGainPower

,

,

avn

in

0

avnout

ZZ

PP

L

LL

LSL

T SPPGGainPowerTransducer

P

, ,

avs

0

0

ZZZZZZ

SS

LL

2

Pavs0ZZS

S

Two Port Power Gainswo o t owe Ga s

11

18

12

2in2

2

0

22

in0

2

1in

SS

ZV

ZV

P

1

182

2221212221212

in00

L

S

SVVSVSVSVSV

ZZ

0in211211

1in 1

L

ZZZZ

SSSS

VV

11

111

2

22222in22

21

SL

SS

SVV

SSV

211222

2out

0in221

1

1

S

L

SSSS

VV

ZZSV

1

11

118

12

22

2in

222

21

0

2

0

2

SL

SLSLL

SP

S

SZ

VZ

VP

in111in

in1

112

1

1

SS

S

VVVZZ

ZVV

SV .

11

12

222

in

21

in L

LL

S

SPPG

in1

in

11

2

S

SS

S

VV

3


2

2

0

2

inavs1

18in

S

SS

ZV

PPS

matchedoutput

andinput both :1 case Special

22

22out

221

2

avn

0

118

1

t

SSL

S

SZ

VPP

L

221

0

SGT

SL

22

212

2inout220

1

118out

out

SS

S

SV

SZL

L

12 0 gain,power er transducunilateral :2 case Special

S

22

21

2out

2110

1

118

S

S

SPG

SZ

11in S

22221 11 LSS

G

222

2out

211

21

avs

avn

11

11 S

SA

SP

SPPG

2

222

11 11 LSTU

SSG

2

222

in

21

avs 11

11

LS

LSLT

S

SPPG

4


• Example 11.1 Comparison of Power Gain DefinitionsS 50 a with GHz, 10at parameters following thehasor transistmicrowaveA

SSSS 15040.0 ,1005.2 ,1001.0 ,15045.0:impedance reference

o22

o21

o12

o11

SolutionZZ LS . 30 , 20

ZZ 1 22 S

4290

250.0

0

0

0

ZZZZZZ

S

L

LL

94.5

11

12

222

in

21

L

L

S

SG

22429.00

0

ZZS

SS

o211211in 150455.0

LSSS

85.511

12

out2

11

2221

S

SA

S

SG

o211222out

2211in

151408.01

1

S

L

SSSS

S 49.5

11

1 12

222

in

22221

LS

LST

S

SG

5

111 SS


Figure 11-2 (p. 540) The general transistor amplifier circuit.

( )i tf thiEff ti (l d)t tf thiEff ti

21

:network matching(source)input for thegain Effective

21

:network matching(load)output for thegain Effective

2

in

:istorfor transgainpowerTransducer1

1 G

S

SS

L

LLG 2

22

:gainertransducoverallThe1

1

2210

:istorfor transgain power Transducer

SG LST GGGG 0 :gainer transducoverall The

6


• If the transistor is unilateral, Conjugate match GaAs FET equivalent CKTso that S12 = 012

→ in = S11, out = S22out 22

2

2

1

1

SG S

S

2210

11

1

SG

S S

in

1

ZZC

X Sgs

L

LL

SG 2

22

2

1

1

out

2

CRjVV

ZZCB

Sc

Lds

LST GGGG 0 :gainer transducoverall The

2

22

2

21

281

44

2

ff

RR

CRRg

RV

RVgPPG

CRj

TdsdsmdscmLTU

gsi

7

81

avs 44

fRCRRVP igsiiS


Figure 11-4 (p. 542)g pPhotograph of a low noise MMIC amplifier using three HEMTs with coplanar waveguide circuitry. The amplifier has a gain of 20 dB from 20 to 24 GHz. The contact pads on the left and right of the chip are for RF input and output, with DC bias connections at the top. Chip dimensions are 1.1 2.0 mm. Courtesy of R W Jackson and B Hou of the University of Massachusetts and J Wendler of M/A-COM

8

Courtesy of R. W. Jackson and B. Hou of the University of Massachusetts and J. Wendler of M/A-COM.

StabilityStab ty

• Unconditional stability:impedances load and source passive allfor 1 ,1 outin

• Conditional stability:1 ,1 i.e.,

pp, outin

LS

unstableypotentiall as toreferred also is case This ,impedancesload and source passive of rangecertain afor only 1 ,1 outin

• Frequency dependence

• Rigorous treatment of stability requires that the network S parameters have l i h i h h lf l f l i ddi i | | 1no poles in the right-half complex frequency plane, in addition to |in| < 1

and |out| < 1.

9

StabilityStab ty

• Stability Circlesnally unconditiofor Conditions :circle stability output for theequation The

1

:amplifier stable

211211i

SSS L 22

211211in 1

1

SSSS

L

L

1

11

211222t

2211in

SSS

SS

S

L 21122211

2221122211

11or

SSSSSSSSS LLL

ddi ih)0( unilateral is device theIf

11

12

1122out

SS

SS

21111221122

2211

1

1

SSSSS

SS

LL

LL

1

1 : toreduce conditions these

11

S

S

22222

2

1122

2222

2222

sidesbothtoAdding

SSS

SSLL

1 22 S

222112

221122

221122 sidesboth to Adding

SSS

SSS

SSS

L

10

2222 SS

StabilityStab ty

• Stability Circles:circle stability Output :circle stability Input

( t )

1122

SSC

RC LLL

( t )

2211

SSC

RC SSS

(center)

2112

2222

1122

SS

SCL

(center)

2112

2211

2211

SS

SCS

(radius) 2222

2112

SSSRL (radius) 22

11

2112

SSSRS

0thensetweIf ZZ stablenalunconditioisdevicetheIf

11 5(a)Figure1

0 then ,set weIf

11in

0

S

SZZ LL

chart.Smith theoutside completely is circle stability

stable, nalunconditio is device theIf

11.5(b) Figure1

11.5(a) Figure1

11

11

S

S

1for1

1for ,1 11

SRC

SRC LL

11

1for ,1 22 SRC SS

StabilityStab ty

Figure 11-5 (p. 544)Output stability circles for a conditionally stable device. (a) |S11| < 1. (b) |S11| > 1.

12

p y y ( ) | 11| ( ) | 11|

StabilityStab ty

• Tests for Unconditional Stability: testK : test

11

condition sRollet'22

222

11 SSK

111 11

22

11

211222out

S

SSSSS

S

S

S

S

condition Auxiliary

,12

2112

2211 SS

K1boundary

out11

out22

S

Se jSS

satisfied.usly simultaneo are,1 21122211 SSSS

11 22

22112

2

211

2211out

S

SS

SSS

1 havemust weAlso,

11 S

11

11

2

out

1111

SSSSSRC

RC

SS

1 22 S

.11

,1 1 2

11

1121121122

S

SSSSSRC

13

21121122 SSSS

StabilityStab ty

• Example 11.2 Transistor StabilityS voltagebias a with GHz 2at FET GaAs 102-HFET HP for the parameters The

SSSS

ZVgs

o22

o21

o12

o11

0

6.27781.0 ,6.123122.3 ,4.6202.0 ,6.60894.0

)50( follows asgiven are 0

Solution

condition sRollet': testK 47361.1 o

221122

SSCL

607.02

1

2112

2222

211

SSSS

K50.022

2112

2222

SSR

S

L

L

696.0 condition Auxiliary

21122211 SSSS

2222 S

L

68132.1 o22

2211

SSCS

86.01

:2

11

S

test

199.0222112

2211

SSR

S

S

S

14

21121122 SSSS 22

11 SS

StabilityStab ty

Figure 11-6 (p. 549)Stability circles for Example 11.2.

15

Single-Stage Transistor Amplifier DesignS g e Stage a s sto p e es g

• Design for Maximum Gain (Conjugate Matching)G0 gain overall thefixed, is Since for Solving S

LS GG0

matching conjugate ifGain Maximum. and by controlled be will

g,

22

211211 1

g

SSSS

LS

S

L

LS

SG

22

outin

11

and

11

22

1

SS

S

SL

L

L

ST

SSG

2

22212

:circuit bilateral general In the11max

2211

222

211

222211

0

1

SS

SSSS SS

LS

SSS 2112

11

require condition matching

1

21

211

24

C

CBBS

SL

LS

SSSS

SS

211222

2211

1

1

2

22

222

1

24

Similarly,C

CBBL

16

SS 111 22C


as definedare , , , s variableThe 2211 CBCB

12 0 :case unilateral The

S

1

1 22

112

222

2222

2111

SSB

SSB

22

212

2211

11 ,

SG

SS

TU

LS

11222

22111

11222

SSC

SSC

SS 222

21211

stable,nally unconditio isor transist theIf11

max S

SS

GTU

,04

21

21

11222

CB

SSC

221 1

1 that so

maxKK

SS

G

K

T

104

,02

222

11

KCB

C 12

:gainstablemaximumpossiblenotismatching conjugate ussimultaneo ,1 If

max

KS

1 K

12

21

:gain stable maximum possible,not is

SS

Gmsg

17

12S


• Example 11.3 Conjugately Matched Amplifier Designmatching stub-single using GHz 4.0at gain maximumfor amplifier an Design

SSSSfZS 0

(GH )) 50( parameters following thehas FET GaAs The

GHz.5 to3 fromgain theand lossreturn input plot the and Calculate sections.

SSSSf

oooo

oooo22122111

5473057030766021167204 04176.0 5603.0 9986.2 8980.0 3.0

(GHz)

Solution

oooo 6872.0 6203.0 5439.2 14266.0 5.0 5473.0 5703.0 7660.2 11672.0 4.0

Solution

2222

211 1951

1

GHz 4.0at Check

SSK

testK

o

21

211 1238720

4

gain, maximumFor

CBB

o21122211

2112

2211

162488.0

195.12

SSSS

SSK

o

22

222

1

6187604

123872.02

CBB

CS

182

61876.02

CL


dB20.617.41

)(continued

2 SG

Solution

dB 30.876.6

12

210

2

SS

SG

dB 22.267.11

1 2

22

2

L

LL

SG

dB 72.1622.230.820.6 gain,er transducoverall The

maxTG

Figure 11-7a (p. 552)Figure 11-7b (p. 553) (b) RF circuit.

19

(a) Smith chart for the design of the input matching network.g (p ) ( )


Fi 11 7b ( 553) ( ) F

20

Figure 11-7b (p. 553) (c) Frequency response.


• Constant Gain Circles and Design for Specified Gain12 ignored, enough to small is S 1G12

11.unilateral

gg

GT

11

1 211

max

G

SGS

22

merit of figure unilateral :11

UUGU TU

:factorsgain normalized Define1

222

max SGL

222

211

22112112

11

SS

SSSSU

,1

1

1 2

11211

2

max

SSG

GgS

S

S

SS

211

2

1

1

S

SS

SG

.1

1

1 2

22222

2

11max

SSG

GgL

L

L

LL

S

222

2

1

1

L

LL

SG

1 22max S LL

21

22 L


• Constant Gain Circles and Design for Specified GainSg :ofvaluefixedFor 11SgS

SSS

S

gSSS

SSg

g

1

,1 11

: of valuefixedFor

2

211

2211

11

, 11

2

211

11

Sg

SgSgCS

SS

S

S

S

SSSS

Sg

gS

SgSSg

11

1

11

2

211

112

11

1111

.

11

11 2

11

11

Sg

SgR

S

SS

S

S

S

SS

Sg

Sg

SgSg

11

11

11 2

11

211

211

11

: of valuefixedfor Similarly,

RCg

LLL

L

SSS RC

,11

222

22

SgSgC

C

L

LL

LLL

.

11

11 2

222

22

Sg

SgR

g

LL

L

22

11 22SgL


• Example 11.4 Amplifier Design for Specified Gaingain constant Plot GHz.4.0at dB11 ofgain a have toamplifier an Design

GG LS

thehas FET The GHz. 5 to3 fromgain amplifier overall and lossreturn input plot the and Calculate dB. 1 and dB 0 and dB, 3 and dB 2for circles

SSSSfZS

ooo22122111

0

50660010082908003 0

(GHz))50( parameters following

ooo

ooo

ooo

85580060321407105 07060.0 0 865.2 12075.0 4.0 5066.0 0 1008.2 9080.0 3.0

Solution

ooo 8558.0 0 603.2 14071.0 5.0

dB632921GS dB082562SG

dB 9.156.11

1

dB6.329.21

2

211

max

max

SG

SG

L

S

dB 5.130.89.16.3 dB0.825.6

max

210

TUGSG

23

1 222

max S


875.0 dB 3)(continued SS gG

Solution

29401206270

691.0 dB 2166.0 120706.0

o

o

SS

SS

RC

gGRC

3030705200

806.0 dB 1294.0 120627.0

o

o

LL

SS

RC

gGRC

440.0 70440.0

640.0 dB 0303.0 70520.0

o

LL

LL

LL

RC

gGRC

LL

24

Figure 11-8a/b (p. 556) (a) Constant gain circles. (b) RF circuit.


Figure 11-8b (p. 557) (c) Transducer gain and return loss.

25

g (p ) ( ) g


• Low-Noise Amplifier DesignfigurenoiseconstantofcirclesofDerivation 11

:amplifierport - twoafor figure Noisefigure noiseconstant of circles of Derivation

2N YYRFF 11

111

opt

0ZY

S

SS

where

, optmin SS

N YYG

FF1

1 opt

opt

0opt Z

Y

admittance source optimum admittance source

minopt SSS

FYjBGY

d ittftlor transistof resistance noise equivalent

figure noise minimum min

N

GRF device theof parametersNoise

admittance source ofpart real SG

26


2

t2

2

opt20

2

opt11

4

S

SS Z

YY

1 2

optoptoptopt

2optopt

NN

N

SSSSS

SSS

0

opt0

11

11

21Re

11

S

S

S

SSS

S

ZYG

11

2

optoptopt

optoptoptopt

NN

N

NN

SSSS

SSSSS

2

2

0

1

11

112

S

SS

Z

Z

1

1

1

112

optopt

N

NN

N

NN

S0 1 S

Z

2

opti .4

RFF SN

11

RC

NNS

2

opt2

0min

: , theDefine

.11

Nparameterfigurenoise

ZFF

S

1

opt

NC

RC

F

FFS

2

opt0

min2

2

opt 141

ZRFFN

NS

S 1

1

12

opt

N

NNR

N

F

27

0NS 1N


• Example 11.5 Low-Noise Amplifier DesignS -para following thehas and figure, noise minimumfor biased is FET GaAsA

RFSS

SSZ

N Calculate . 20 ,10062.0 dB, 6.1 ;605.0 ,819.1

,2605.0 ,606.0:) 50( GHz 4at parameters noise and meterso

optmino

22o

21

o12

o110

GT

figure. noise thisgain with maximum e with thfigure noise dB 2 a havingamplifieran design Then .unilateral assumed is device if in error maximum the

Solution

059.0 22112112 SSSS

U 0986.012

tmin

FFN

11

11

22

222

211

TGSS

0986.014 opt

0

ZR

NN

10056.01

oopt

NCF

dB 0.5130.1dB 5.00.891or

11 22

T

TU

GGUGU

24.0

1

12

opt

NNR

N

F

28

TUG 1NF


circlesgain constant )(continued Solution

0.300 600.52 0.805 0.1

(dB)g

oSSSS RCgG

0.150 600.58 0.946 7.1 0.205 600.56 0.904 5.1

o

o

for 605.0 Choose

7553.00

22

o

L

S

S

dB 25.133.111

: maximum2

22 L

L

SG

G

dB 53.8dB 58.561.3

0

2210

LSTU GGGGSG

Figure 11-9a (p. 561)Circuit design for the transistor amplifier of Example 11 5

29

Circuit design for the transistor amplifier of Example 11.5. (a) Constant gain and noise figure circles. (b) RF circuit.

Broadband Transistor Amplifier Designoadba d a s sto p e es g

• Narrow bandwidth due to– Matching requirement for maximum gain ↔ transistors are not 50Matching requirement for maximum gain ↔ transistors are not 50– |S21| decreases with frequency at the rate of 6 dB/octave

• Common approaches for broadband (cost: gain, complexity…)– Compensated matching networks (|S21| cost: input/output matching)Compensated matching networks (|S21|, cost: input/output matching) – Resistive matching networks (matching, cost: gain loss and noise figure)– Negative feedback (frequency response, matching, stability, cost: gainNegative feedback (frequency response, matching, stability, cost: gain

and noise figure)– Balanced amplifiers (broadband match, cost: twice transistor & power)– Distributed amplifiers (broadband gain, matching, noise figure, cost:

circuit size, single stage gain)

30


• Balanced Amplifiers

Figure 11-10 (p. 562) A balanced amplifier using 90° hybrid couplers.

BABA

BABA

SSGGjSSj

SSSS

21

2222

1212

2221

1211

BA

BA

FFF

GGGS

1

,0identical are amplifier theIF 11

31

BA2


• Example 11.6 Performance and Optimization of a Balanced Amplifier

0.1090.100length stubsection Input onOptimizationOptimizatiParameter

AfterBeforeNetwork Matching

0.4610.432length stubsection Output 0.1340.045length linesection Output 0.1130.179length linesection Input

Figure 11-11 (p. 564) Gain and return loss, before and after ti i ti f th b l d lifi f E l 11 6

32

optimization, for the balanced amplifier of Example 11.6.


• Distributed Amplifiers

Figure 11-12 (p. 565) Configuration of an N-stage distributed amplifier.

Figure 11-13 (p. 566) (a) Transmission line circuit

33

for the gate line of the distributed amplifier;


• Distributed Amplifiers

Figure 11-13 (p. 566) (b) equivalent circuit Figure 11-14 (p. 566) (b) equivalent circuit of a single unit cell of the gate line. of a single unit cell of the drain line.

Figure 11-14 (p. 566) (a) Transmission line circuit f th d i li f th di t ib t d lifi

34

for the drain line of the distributed amplifier;


• Distributed Amplifiers Example 11.7i CZCR

22 , 50 Assume 0 ZZZ gd

g

gsgg

g

ggsiggg

CZ

lC

CLjl

ZCRj

2mS. 35 pF, 27.0, 300 , 10

gCRR

mgs

dsi

lNlNim

d

dsdd

dds

dddd

eeVgI

lCCLj

lRZj

ddgg

2GHz.18~1 16;8,4,,2 fN

lNlNgdm

llim

o

eeZZgPG

eeeeVgI

ddgg

ddgg

222

out

lNlNgdm

ll

eeZZg

eePG

ddgg

ddgg

422

in

ddgg

ll

llN

ee ddgg

ln

4

t

2

35

ddgg llN

opt

Power Amplifiersowe p e s

• Characteristics of Power Amplifiers and Amplifier Classes– Important considerations for power amplifier: efficiency gainImportant considerations for power amplifier: efficiency, gain,

intermodulation products, thermal effects.– LNA, fixed gain Amp: small-signal amplifiers (transistor: linear device)

P:efficiency Amplifier

out 1dBdB :

01 GGGainCompressed

efficiencyaddedpowerP

:

DC

out

conduct always linear, :A Classdistortionation intermodul Linearity,

01

PP

PPPAEPAE

11

DC

inout

78%llhcycle 1/2only conduct :B Class

50% efficiency maximum

GPP

G1111

DC

out

circuitresonant100%nearefficiencycycle 1/2 than more cutoffnear :C Class

78% type,pull-push

36

circuitresonant 100%,near efficiency


• Large-Signal Characterization of Transistors– For power near or larger than P1 S parameters will depend on inputFor power near or larger than P1, S parameters will depend on input

power level, output impedance, frequency, bias condition, temperature.

– Table 11.1 Small-Signal S Parameters and Large-Signal Reflection Coefficients (Silicon Bipolar Power Transistor)

12 01610 4781770 7471670 35250 073724231720 7690013.51290.4551670.8561630.35940.0657610.41760.76800

dBMHz

oooooo

oooooo22211211

PLPSP GSSSSf

10.01850.4911870.7971690.36350.0799608.31690.76100012.01610.4781770.7471670.35250.0737242.31720.76900

oooooo

37


• Load-pull contourstmeasuremen Automated

tunersstubhanicalelectromecwith

:modelsNonlinar RCC

!!e!Temperatur

, , , dsgdmgs RCgC

!!e!Temperatur

Figure 11-16 (p. 572)

38

Constant output power contours versus load impedance for a typical power FET.


• Example 11.8 Design of a Class A Power AmplifierBJT.silicon NPN MRF858S Motorola using MHz900at amplifier power aDesign gppg

Solution

39


Figure 11-17 (p. 574) RF circuit for the amplifier of Example 11.8.

40

Documents

Microwave Amplifier Designweb.nchu.edu.tw/~ycchiang/MicroWave/Microwave_10.pdf · Twowo o t owe Ga s Port Power Gains • Example 11.1 Comparison of Power Gain Definitions A microwave