MonitorSONIC_SG6841

1

SSEERRVVIICCEE MMAANNUUAALL

LCD TV MONITOR

N1750w SERIES

THESE DOCUMENTS ARE FOR REPAIR SERVICE INFORMATION ONLY. EVERY REASONABLE EFFORT HAS BEEN MADE TO ENSURE THE ACCURACY OF THIS MANUAL; WE CANNOT GUARANTEE THE ACCURACY OF THIS INFORMATION AFTER THE DATE OF PUBLICATION AND DISCLAIMS RELIABILITY FOR CHANGES, ERRORS OR OMISSIONS.

MANUFACTURE DATA: Jan-30-2005

ViewSonic Corporation N1750w 2

Preface Copyright ViewSonic Corporation, 2004. All rights reserved.

Macintosh and Power Macintosh are registered trademarks of Apple Computer, Inc.

Microsoft, Windows, Windows NT, and the Windows logo are registered trademarks of Microsoft Corporation in the United States and other countries.

ViewSonic, the three birds logo, OnView, ViewMatch, and ViewMeter are registered trademarks of ViewSonic Corporation.

VESA is a registered trademark of the Video Electronics Standards Association. DPMS and DDC are trademarks of VESA.

Disclaimer: ViewSonic Corporation shall not be liable for technical, editorial errors, or omissions contained herein; nor for incidental or consequential damages resulting from furnishing this material, or the performance or use of this product.

In the interest of continuing product improvement, ViewSonic Corporation reserves the right to change product specifications without notice. Information in this document may change without notice. For the most recent version of this document, please check www.viewsonic.com.

No part of this document may be copied, reproduced, or transmitted by any means, for any purpose without prior written permission from ViewSonic Corporation.

Important safety information

1. Read these instructions.

2. Keep these instructions.

3. Heed all warnings.

4. Follow all instructions.

5. Do not use this apparatus near water.

6. Clean only with a dry cloth.

7. Do not block any of the ventilation openings. Install in accordance with the manufacturers instructions.

8. Do not install near any heat sources such as radiators, heat registers, stoves, or other apparatus (including amplifiers) that produce

heat.

9. Do not defeat the safety purpose of the polarized or grounding type plug. A polarized plug has two blades with one wider than the

other. A grounding type plug has two blades and third grounding prong. The wide blade or third prong is provided for your safety.

When the provided plug does not fit into your outlet, consult an electrician for replacement of the obsolete outlet.

10. Protect the power cord from being walked on or pinched particularly at plugs, convenience receptacles, and the point where they

exit from the apparatus.

11. Only use attachments/accessories specified by the manufacturer.

12. Use only with a cart, stand, tripod, bracket, or table specified by the manufacturer, or sold with the apparatus. When a cart is used,

use caution when moving the cart/apparatus combination to avoid injury from tip-over.

13. The TV should be operated only from the type of power source indicated on the label. If you are not sure of the type of power

supplied to your home, consult your dealer or local power company.

14. Unplug this apparatus during lightning storms or when unused for long periods of time.

15. Refer all servicing to qualified service personnel. Servicing is required when the apparatus has been damaged in any way, such

as power-supply cord or plug is damaged, liquid has been spilled or objects have fallen into apparatus, the apparatus has been

exposed to rain or moisture, does not operate normally, or has been dropped.

16. This product may contain lead or mercury. Disposal of these materials may be regulated due to environmental considerations.

For disposal or recycling information, please contact your local authorities or the Electronic Industries Alliance: www.eiae.org

17. Damage Requiring Service The appliance should be serviced by qualified service personnel when:


A. The power supply cord or the plug has been damaged; or

B. Objects have fallen, or liquid has been spilled into the appliance; or

C. The appliance has been exposed to rain; or

D. The appliance does not appear to operate normally or exhibits a marked change in performance; or

E. The appliance has been dropped, or the enclosure damaged.

18. Tilt/Stability All televisions must comply with recommended international global safety standards for tilt and stability

properties of its cabinets design.

! Do not compromise these design standards by applying excessive pull force to the front,

or top, of the cabinet, which could ultimately overturn the product.

! Also, do not endanger yourself, or children, by placing electronic equipment/toys on the top of the cabinet. Such items could

unsuspectingly fall from the top of the set and cause product damage and/or personal injury.

19. Wall or Ceiling Mounting The appliance should be mounted to a wall or ceiling only as recommended by the manufacturer.

20. Power Lines An outdoor antenna should be located away from power lines.

21. Outdoor Antenna Grounding If an outside antenna is connected to the receiver, be sure the antenna system is grounded so as

to provide some protection against voltage surges and built up static charges. Section 810 of the National Electric Cord,

ANSI/NFPA No. 70-1984, provides information with respect to proper grounding of the mats and supporting structure grounding

of the lead-in wire to an antenna-discharge unit, size of grounding connectors, location of antenna-discharge unit, connection to

grounding electrodes and requirements for the grounding electrode. See Figure below.

22. Objects and Liquid Entry Care should be taken so that objects do not fall and liquids are not spilled into the enclosure

through openings.


Table of contents

Table of contents 4 Revision list.. 5 1. Specifications .................................................................................................... 6

1.1 General specifications ............................................................................ 6 1.2 LCD TV description ........................................................ 7 1.3 Interface connector ............................................................. 7 1.4 D-Sub pin distribution .................................................................... 7 1.5 Factory preset display modes .......................................... 8

2. Theory of operation..................................................................... 8 2.1 Video.................................................................................................... 8 2.2 Audio ............................................................................................................... 9 2.3 Electrical .......................................................................................................... 9

3. Adjustment................................................................................................................. 10 3.1 Front panel adjustment. 10 3.2 How to use the menu 10

4. Assembly and disassembly procedure......................................................................... 12 4.1 Disassembly ..... 12

5. Explode view... 15 6. PCB layout... 16

6.1 Main board.. 16 6.2 Power board. 17

7. Main board IC descriptions. 18 7.1 SPV302A.. 18 7.1.1 General description 18 7.1.2 Block diagram 18 7.1.3 List of pins and package 19 7.1.4 IO-Trap . 26 7.2 AD9883... 27 7.2.1 Description 27 7.2.2 Block diagram 27 7.3 VPC3230D...... 28 7.3.1 Description 28 7.3.2 Block diagram 28 7.3.3 Pin functions . 28 7.4 UPD64083.... 30 7.4.1 Description 30 7.4.2 Block diagram 30 7.5 TDA7266D....... 31 7.5.1 Description 31 7.5.2 Block diagram 31

8. Block diagram ............................................................ 32 9. Schematic diagram .......................................................................... 33 9.1 Main board.. 33 9.2 Power board. 47


Revision list

Revision Date Modification Description A00 Jan-30-05 Initial Release


1. Specifications

1.1 General specifications

Item Specification

Screen Size 17 TFT-LCD Panel Aspect Ratio 15:9 Resolution 1280768 (WXGA)

Display Area 372mm223mm Pixel Pitch 0.291mm0.291mm

Display colors 16.7 million Contrast Ratio 600:1

Brightness 450cd/m2 Viewing Angle 170 (Horizontal)/170 (Vertical) Response Time 12ms Lamp Type/Life 50,000hr

LCD Panel

Color Temperature Cool/Warm TV Tuning System NTSC 181 Channel with Electronic PLL Tuner

Sound System MTS/SAP Closed Caption, V-chip Yes TV Function

Color System NTSC AV1 RCA1 Audio L/R1

RCA1 AV2 S-Video RCA1 Audio L/R1(Share) Video Inputs

Component YPbPr1 Audio L/R1 Signal Input Analog: D-Sub 15 pin (detachable cable)

PnP compatibility DDC 2B Input frequency Analog: FH: 31.5KHz to 61KHz FV: 56Hz to 75Hz Recommended Analog: 1280 x 768 (60Hz)

PC Input

Input Audio Headphone Mini-jack for stereo (3.5) Speaker (built-in): Two 5 watt speakers Headphone Mini-jack for stereo (3.5) Audio Output Audio Output: L / R

Line Output (RCA L/R) Power Supply AC100V~120V, 50/60Hz Power Power Consumption


1.2 LCD TV description

The LCD TV will contain a main board (include audio), a switching power board (include an inverter board), an IR board and a function keyboard. The main board and power board will house the flat panel to control logic I2C bus, DDC, brightness control logic for LCD panel, DC-DC conversion to supply the appropriate power to the whole board and transmitting TTL level signals into LCD Module to drive the LCD display circuit. The inverter board will drive the 6 CCFLs (Cold Cathode Fluorescent Tube). The function keyboard and Remote Control will provide the OSD control signal to the Main Board.

1.3 Interface connector All signal connections to this product are via external connectors locating at the rear of the product. The specifications of these connectors are listed in the following table.

External Connector Specification AC-In AC Jack 3-male receptacle

RGB Input Molded-over, shielded, 15-pin subminiature D male plug with75 impedance. Compliance with PC 99 Color Theme. Refer to Appendix B for pin layout. Audio Input (L/R) RCA Jack (White/Red) Audio Input 3.5 Mini Jack for PC Audio Audio Output (R/L) RCA Jack (Red / White) Headphone Output 3.5 Mini Jack Composite Video RCA Jack (Yellow) Component Video RCA jack (Red, Blue, Green) S Video 4 Din Jack

1.4 D-Sub pin distribution Connect the 15-pin color display shielded signal cable to your signal system device and lock both screws on the connector to ensure firm grounding. The connector information is as follow:

15 - Pin Color Display Signal Cable

PIN NO. DESCRIPTION PIN NO. DESCRIPTION

1. RED Video 9. NC 2. GREEN Video 10. Sync Ground 3. BLUE Video 11. RXD (for ISP) 4. TXD (for ISP) 12. Serial Data for DDC 5. Ground 13. HORIZ. SYNC 6. Ground-R 14. VERT. SYNC 7. Ground-G 15. Serial Clock for DDC 8. Ground-B

16

11 15

5

10


1.5 Factory preset display modes

2. Theory of operation

This section describes the operation theory of the N1750W LCD TV. 2.1 Video

Analog Device AD9883 shall provide analog to digital converter for this product. Video decoder shall be provided by Micronas with a model number of VPC3230, and the de-interlace of this product shall be provided by Sunplus with a Model Number of SPV302. The following tables define this products video specifications.

Input Parameter Specification

CVBS Characteristics: Video Amplitude Signal DC Level Sync Pulse:

0.7(min.) 1.1(max.) V Typical. 0.3 V

S-Video Characteristics: Video Amplitude Signal

Y : 1.0Vp-p W / Neg. Sync (IN 75 ) C : 0.285Vp-p (IN 75 )

Y, Pb, Pr Characteristics: Video Amplitude Signal

Y:1.0Vp-p (IN 75 ) Pb:0.7 Vp-p(IN 75 ),Pr:0.7 Vp-p (IN 75 )

Video Bandwidth NTSC: 6 MHz Maximum RGB Characteristics: Signal Type Sync Type Input Signal Rating Sync Level: Frequency Range Pixel Color DDC Compliance EDID Data Table

Analog VGA TTL, Separate Sync, with 4.7K pull-down resistors 1250mV Max without damage to the product, 0-700 mV Full Range 2.5-5.25 V Horizontal: 31.5-61K Hz, Vertical: 60-75 Hz 16 M DDC2B Compliant See Appendix B

Horizontal Vertical

Mode Resolution Nominal Frequency (KHz)

Nominal Frequency (Hz)

640x480 31.5 60 640x480 37.9 72 640x480 37.5 75

VESA VGA

720x400 31.5 70 800x600 37.9 60 800x600 48.1 72 SVGA 800x600 46.9 75

VESA XGA 1024x768 48.4 60 MAC16 832x624 49.725 74.55 MAC19 1024x768 60.24 75

SVGA CVT 1280x768 47.8 60


2.2 Audio

Audio processor of this product used a SONY CXA2104 audio decoder (for MTS) or Micronas MSP3425G (for NICAM), and used a YAMAHA YDA135 audio processor amplifier. In addition, a pair of speakers shall be integrated within this product. The audio signals of this product shall comply with the specification listed in the following table.

Parameter Specification

Tuner Input Base band Input Speaker Power Output Max Rating 2W at 3 % T.H.D Distortion 2W at 3% T.H.D Distortion

Speaker Impedance 8 8 Line In Per Tuner Spec Max. 1Vrms Line Out N/A N/A Flatness of Amplitude Response 3 dB ( 6KHz deviation, 40Hz to 15KHz) 3 dB (200-16 kHz)

Total Harmonic Distortion (Po=0.1 to 2 W, f=100Hz-15KHz)


3. Adjustment 3.1 Front panel adjustment

The following front panel adjustments are available for N1750W. POWER switch: This switch shall be visible and accessible on the down right side of front PC frame. Soft Power Switch (TURN ON SYSTEM) and one push of Soft-Power Switch shall turn on the system. Note: This switch is not considered the Mains Disconnection Device for agency purposes. The AC switch in back cover of product can also disconnect power. The power cord is the main disconnection device. Power Indicator LED: This LED will illuminate Green light when the product is ON and Red light when the product in stand-by mode. CH +/-: These two switches shall be visible and accessible on the bottom of front panel control keys. While TV/CATV is selected as input source, activation of these keys will cycle through all available TV/CATV channels. While OSD menu is up, activation of these keys will highlight each available adjustment. The activation time for this switch includes Press and Hold should be less than half second. VOL +/-: These two switches shall be visible and accessible on the bottom of front panel control keys. Activation will increase /decrease loudness of the audio output. In addition, while OSD menu is up, activation of these keys will regulate a pre-selected adjustment. The activation time for this switch includes Press and Hold should be less than half second. MENU: This switch shall be visible and accessible on the left side of VOL - switches. Once pressed, this key shall bring up the corresponding OSD menu(s) based on the selected input source. SOURCE: This switch shall be visible and accessible on the right side of VOL + switches. Once pressed, this key shall toggle in a closed loop of the input source selection from TV, AV1, AV2, S-Video, Component, PC Headphone: This connector is designed purpose to use headphone. Once the headphone connected, then the speakers will auto mute on audio output.

3.2 How to use the menu 1. Press the MENU button to display each menu 2. Use the cursor up/down to select a menu item. 3. Use the cursor left/right to enter a submenu or enable/disable the function. 4. Press the MENU button to exit the menu.

OSD Table for N1750W

Items Description

TV / VIDEO MODE Brightness Adjust the Black levels from 0 to 100 Contrast Adjust the White levels from 0 to 100 Saturation Adjust the color from light to heavy Tint Adjust from Red to Green Sharpness Adjust the Sharpness levels from 0 to 10 Black Level Adjust the Black light from 0 to 100 Volume Adjust the Volume levels from 0 to 100 Treble Adjust the Hi Frequency from light to heavy Bass Adjust the Low Frequency from light to heavy W / Head Phone No function at this model SRS Enable SRS or disable SRS Caption Selections Close Caption on or off . Mode Selection Caption or Text for C.C Channel Selections CC1 or CC2 or Text1 or Text2 Display Selection display Box or shadow for C.C V-Chip V-Chip relative setting Status Setting V-Chip function enable or disable TV Guidelines TV Guidelines Setting Movie Guidelines Movie Guidelines Setting Change Pin Change Pin for V-Chip control Sleep Timer Setting time to auto turn TV off Set Up Setting TV basic function


Blue Screen Sets Blue Screen on or off Language Selections English, Spanish or French Air / Cable Selections Air TV input or Cable TV input Ch. Search Channel auto search by TV set CH. Del Add Skip or add current channel View Mode Select view mode at 4:3 or 16:9 or non-Linear Reset Reset TV to default value

PC Brightness Adjust the Black levels from 0 to 100 Contrast Adjust the White levels from 0 to 100 Focus Adjust the color from light to heavy H Position Adjust screen horizontal position V Position Adjust screen vertical position Auto Fine tuning clock and phase Volume Adjust the Volume levels from 0 to 100 Treble Adjust the Hi Frequency from light to heavy Bass Adjust the Low Frequency from light to heavy SRS Enable SRS or disable SRS Language Selections English, Spanish or French PIP Select PIP relative function. Position Adjust Sub-screen position Source Selections Sub-screen display TV or AV1 or AV2 or S-Video Audio Select Select audio from main-screen or sub-screen Warm Setting color Temp. warm Cool Setting color Temp. cool Clock Adjust PC display clock for better performance Caption Selections Close Caption on or off . Mode Selection Caption or Text for C.C Channel Selections CC1 or CC2 or Text1 or Text2 Display Selection display Box or shadow for C.C Red Setting color Temp. more red. Green Setting color Temp. more green. Blue Setting color Temp. more blue. Color Color Temp. Relative setting V-Chip V-Chip relative setting f Status Setting V-Chip function enable or disable TV Guidelines TV Guidelines Setting Movie Guidelines Movie Guidelines Setting Change Pin Change Pin for V-Chip control


4. Assembly and disassembly procedure This section covers disassembly and reassembly of the N1750W LCD TV. Removal of external casing, its individual parts or

internal components can render the product dangerous. There can be a risk of electric shock from exposed components even when the device is not connected to a power source.

4.1 Disassembly

1. Remove the cover rear as arrow direction

2. Unscrew and remove eleven screws marked red. 3. Remove the back rear.

For a screw under the base


4. Unscrew and remove four screws marked red. 5. Remove the shield as arrow direction.

6. Unscrew and remove six screws marked red in power board. 7. Remove the connector wire marked blue in power board. 8. Unscrew and remove four screws marked red in main board. 9. Remove the connector wire marked blue in main board.

10. Remove the power board and main board synchronously

Two speakers


LCD Panel


5. Exploded view


6. PCB Layout

6.1 Main board


6.2 Power board


7. Main board IC descriptions 7.1 SPV302A

7.1.1 General Description The SPV302A is a highly integrated processor solution for multi-media LCD/CRT TV applications. It is a dual source device

with input sources from D-sub. This chip provides 3D motion adaptive de-interlacing, 2:2/3:2 film mode detection, video PIP/POP, SDRAM controller, color controls, OSD and embedded CPU. In addition to being a complete solution for multi-media LCD/CRT TV applications, the SPV302A also has the full service and support of Sunplus. 7.1.2 Block diagram

YUV/RGB interface

DRAM

controller

deinterlace

Scaling up/down engine

Skin/Gain/

Offset

SDRAM/SGRAM

DMA controller

CPU Auto Calibration

Timing Generator

Sync Processor

Flash ROM

De-interlaced timing

generator

Display timing

generator

Gamma table/Dithering

OSD MUX

OSD engine

Port A Port B

Port C

main

sub

Sync signals

Video mode

Graphic mode

Display timing output


7.1.3 List of pins and package

388-pin PBGA

SunplConfi

n

F

OC

EON

Y

us US

de Ltial

orA

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

W

V

U

T

R

P

N

M

L

K

J

H

G

F

E

D

C

B

A

20 21 22 23 24 25 26

AF

AE

AD

AC

AB

AA

Y

Signal Description

Ball Pin Name Dir. Description Memo

Clock Interface

AF13 MPLLVDD25 PG MPLL power (2.5V) Double bound

AF14 MPLLVSS25 PG MPLL ground Double bound

D7 OPLLVDD25 PG OPLL power (2.5V) Double bound

B6 OPLLVSS25 PG OPLL ground Double bound

B5 DPLLVDD25 PG DPLL power (2.5V) Double bound

D6 DPLLVSS25 PG DPLL ground Double bound A4 UPLLVDD25 PG USB PLL power 2.5v C6 UPLLVSS25 PG USB PLL ground E1 XTALI I Crystal pad input (12MHz) F2 XTALO O Crystal pad output C4 RVDD33 PG RTC crystal pad input 3.3V D3 XTALIRTC I 32768 crystal pad input E3 XTALORTC O 32768 crystal pad output B3 RVSS33 PG RTC crystal pad ground

Key-Scan ADC Interface A3 ADCVSS33 PG Key-scan ADC analog ground C5 ADC0 Channel 0 input D5 ADC1 Channel 1 input B4 ADCVDD33 PG Key-scan ADC analog power 3.3V

USB Interface If built-in USB transceiver is disabled, the SPV302A must


communicate with an external USB transceiver. Whether to use an internal or an external USB transceiver is determined by an IO-trap. If the external transceiver is selected, pins FM30-FM35 serve as the

interface connection to the external USB transceiver E4 UVDD33 PG USB transceiver analog power C2 DP B USB data plus D2 DM B USB data minus D1 UVSS33 PG USB transceiver analog ground

CPU Interface

Default function Alternative

function Alternative

function Alternative

function

H4 P10 B

General purpose IO1, bit0 (trap0)

CPU port 1, bit0 EOSDEN (I) Probe 0 S

F1 P11 B


CPU port 1, bit1 EOSDB(I) Probe 1 S

G3 P12 B


CPU port 1, bit2 EOSDG(I) Probe 2 S

G2 P13 B


CPU port 1, bit3 EOSDR(I) Probe 3 S

J4 P14 B


CPU port 1, bit4PWM3/

Backlight power(O)

Probe 4 S

G1 P15 B


CPU port 1, bit5 PWM2/ Panel power(O) Probe 5 S

H3 P16 B


CPU port 1, bit6 PWM1/ (O) Probe 6 S

H2 P17 B


CPU port 1, bit7 PWM0/ (O) Probe 7 S

F3 HWRST I Power on reset, active high D,S J3 P00 B CPU port 0, address/data multiplex pin, bit 0 U,S H1 P01 B CPU port 0, address/data multiplex pin, bit1 U,S L3 P02 B CPU port 0, address/data multiplex pin, bit 2 U,S J1 P03 B CPU port 0, address/data multiplex pin, bit 3 U,S K3 P04 B CPU port 0, address/data multiplex pin, bit 4 U,S J2 P05 B CPU port 0, address/data multiplex pin, bit 5 U,S K2 P06 B CPU port 0, address/data multiplex pin, bit6 U,S K1 P07 B CPU port 0, address/data multiplex pin, bit 7 U,S

L2 P20 B CPU port 2, high byte address, bit0. This bus is an output bus in the internal CPU mode and an input bus in the external CPU mode U,S

L1 P21 B CPU port2, high byte address, bit1 U,S M1 P22 B CPU port2, high byte address, bit2 U,S M3 P23 B CPU port2, high byte address, bit3 U,S M2 P24 B CPU port2, high byte address, bit4 U,S N1 P25 B CPU port2, high byte address, bit5 U,S N2 P26 B CPU port2, high byte address, bit6 U,S N3 P27 B CPU port2, high byte address, bit7 U,S

Default function Alternative function


P1 P30 B CPU port3, bit0. (RXD) General purpose IO3 bit0 U,S P2 P31 B CPU port3, bit1. (TXD) General purpose IO3 bit1 U,S P3 P32 B CPU port3, bit2. (INT0nn) General purpose IO3 bit2 U,S P4 P33 B CPU port3, bit3 General purpose IO3 bit3 U,S R1 P34 B CPU port3, bit4. (T0) General purpose IO3 bit4 U,S R2 P35 B CPU port3, bit5. (T1) General purpose IO3 bit5 U,S R3 P36 B CPU port3, bit6. (WRnn) General purpose IO3 bit6 U,S R4 P37 B CPU port3, bit7. (RDnn) General purpose IO3 bit7 U,S

F4 ALE B

Adress latch enable. This pin is an output pin when the built-in CPU is enabled. When an external CPU

is used, this pin is an input pin

SCL of I2C interface (I) S

G4 PSEN B

Program space enable. This pin is an output pin when the built-in

CPU is enabled. When an external CPU is used, this pin is input pin

SDA of I2C interface (B) S

T1 TESTMODE I D T2 TVREMOTE I D

AC21 EXTMCLK I D A5 EXTDCLK I D

E2 EOSDCLK B EOSDCLK is a default to connect 2 times of display clock(i.e.,

EXTOCLKx2) for the test mode. It can be programmed to output an internal display clock for an external OSD chip

D

AE3 PRMA0 O CPU low byte address bit0 Probe 8 AC7 PRMA1 O CPU low byte address bit1 Probe 9 AD5 PRMA2 O CPU low byte address bit2 Probe 10 AD7 PRMA3 O CPU low byte address bit3 Probe 11 AF3 PRMA4 O CPU low byte address bit4 Probe 12 AD6 PRMA5 O CPU low byte address bit5 Probe 13 AE4 PRMA6 O CPU low byte address bit6 Probe 14 AF4 PRMA7 O CPU low byte address bit7 Probe15 AE5 PRMA16 O CPU extended ROM address, bit 16 AF5 PRMA17 O CPU extended ROM address, bit 17 AE6 PRMA18 O CPU extended ROM address, bit 18

AF6 ROMWRNN O External write pulse. This pin is used in the ISP (in-system-programming) function

Video Output Interface

Video output interface can be routed to embedded DAC for testing.

VOUT[29:0] are routed to video DAC according to 10bit single pixel format. VOUT]37:30] are routed to SVM DAC.

TVOUT TCON

Single pixel 10bit

Single pixel 8bit

Single pixel 6bit

Dual pixel 8bit

Dual pixel 6bit

U1 VOUT0 B B2 B0 OB0 OB0 R,8 T3 VOUT1 B B3 B1 OB1 OB1 R,8 U2 VOUT2 B B4 B2 B0 OB2 OB0 OB2 R,8 U3 VOUT3 B B5 B3 B1 OB3 OB1 OB3 R,8 V1 VOUT4 B B6 B4 B2 OB4 OB2 OB4 R,8 V2 VOUT5 B B7 B5 B3 OB5 OB3 OB5 R,8 V3 VOUT6 B B8 B6 B4 OB6 OB4 OB6 R,8 W1 VOUT7 B B9 B7 B5 OB7 OB5 OB7 R,8 Y1 VOUT8 B G2 G0 OG0 OG0 R,8 W2 VOUT9 B G3 G1 OG1 OG1 R,8 W3 VOUT10 B G4 G2 G0 OG2 OG0 OG2 R,8 W4 VOUT11 B G5 G3 G1 OG3 OG1 OG3 R,8 Y2 VOUT12 B G6 G4 G2 OG4 OG2 OG4 R,8 Y3 VOUT13 B G7 G5 G3 OG5 OG3 OG5 R,8

AA1 VOUT14 B G8 G6 G4 OG6 OG4 OG6 R,8 AA2 VOUT15 B G9 G7 G5 OG7 OG5 OG7 R,8 AA3 VOUT16 B R2 R0 OR0 OR0 R,8 AB1 VOUT17 B R3 R1 OR1 OR1 R,8


AB2 VOUT18 B R4 R2 RO OR2 OR0 OR2 R,8 AB3 VOUT19 B R5 R3 R1 OR3 OR1 OR3 R,8 AB4 VOUT20 B R6 R4 R2 OR4 OR2 OR4 R,8 AC1 VOUT21 B R7 R5 R3 OR5 OR3 OR5 R,8 AC2 VOUT22 B R8 R6 R4 OR6 OR4 OR6 R,8 AC3 VOUT23 B R9 R7 R5 OR7 OR5 OR7 R,8 AE1 VOUT24 B B0 EB0 EB0 R,8 AD3 VOUT25 B B1 EB1 EB1 R,8 AE2 VOUT26 B G0 EB2 EB0 EB2 R,8 AC5 VOUT27 B G1 EB3 EB1 EB3 R,8 AF1 VOUT28 B R0 EB4 EB2 EB4 R,8 AD4 VOUT29 B R1 EB5 EB3 EB5 R,8 AC6 VOUT30 B EB6 EB4 EB6 R,8 AF2 VOUT31 B EB7 EB5 EB7 R,8

AD18 VOUT32 B EG0 EG0 R,8 AF19 VOUT33 B EG1 EG1 R,8 AE19 VOUT34 B EG2 ER0 EG2 R,8 AF20 VOUT35 B EG3 ER1 EG3 R,8 AD19 VOUT36 B EG4 EG2 EG4 R,8 AE20 VOUT37 B EG5 EG3 EG5 R,8 AF21 VOUT38 B EG6 EG4 EG6 R,8 AD20 VOUT39 B EG7 EG5 EG7 R,8 AE21 VOUT40 B ER0 ER0 R,8 AF22 VOUT41 B ER1 ER1 R,8 AD21 VOUT42 B ER2 ER0 ER2 R,8 AE22 VOUT43 B ER3 ER1 ER3 R,8 AF23 VOUT44 B ER4 ER2 ER4 R,8 AF24 VOUT45 B ER5 ER3 ER5 R,8 AD22 VOUT46 B ER6 ER4 ER6 R,8 AE23 VOUT47 B ER7 ER5 ER7 R,8 AD1 HSOUT O Output horizontal sync STV1 T,R,8 AD2 VSOUT O Output vertical sync STV3 T,R,8 AC4 DEN O Output data enable OE1 T,R,8 Y4 CLK1 O Output clock 1 OE2 T,R,8

AA4 CLK2 O Output 2 OE3 T,R,8 Video DAC Interface

AE7 AVDD33 PG Video DAC Analog power 3.3V AD8 AVDD33 PG Video DAC Analog power 3.3V AE8 AVDD33 PG Video DAC Analog power 3.3V AF7 AROUT DAC analog red/Y output AF9 AGOUT DAC analog green/Pb output

AF10 ABOUT DAC analog blue/ Pr output AE9 CBU Connect to power via a 0.1 UF capacitor

AD10 CBL Connect to power via a 0.1 UF capacitor AD9 RSET DAC scale adjustment AF8 VREF DAC voltage reference

AE10 AVSS33 PG Video DAC Analog ground AD11 AVSS33 PG Video DAC Analog ground AE11 AVSS33 PG Video DAC Analog ground AE12 AVSS33 PG Video DAC Analog ground AE13 SVMOUT SVM output AD13 VMCBU Connect to power via a 0.1UF capacitor AC13 VMCBL Connect to power via a 0.1UF capacitor AF12 VMREF DAC scale adjustment AF11 VMREF DAC voltage reference AD12 AVDD33 PG SVM DAC Analog power 3.3V

General Purpose I/O power A23 FM1 B GPIO A22 FM2 B GPIO A21 FM4 B GPIO A20 FM5 B GPIO


C20 FM6 B GPIO B20 FM7 B GPIO C19 FM8 B GPIO A19 FM9 B GPIO B19 FM10 B GPIO C18 FM11 B GPIO B18 FM12 B GPIO A18 FM13 B GPIO A17 FM14 B GPIO C17 FM15 B GPIO B17 FM16 B GPIO A16 FM17 B GPIO B16 FM18 B GPIO A15 FM20 B GPIO B15 FM21 B GPIO C15 FM22 B GPIO A14 FM23 B GPIO B14 FM24 B GPIO

AC14 FM25 B GPIO AE14 FM26 B GPIO AD14 FM27 B GPIO AF15 FM28 B GPIO AE15 FM29 B GPIO AD15 FM30 B GPIO AF16 FM31 B GPIO AE16 FM32 B GPIO AD16 FM33 B GPIO AF17 FM34 B GPIO AE17 FM35 B GPIO AD17 FM36 B GPIO AF18 FM37 B GPIO AE18 FM38 B GPIO

SDRAM Interface AF25 MD0 B SDRAM data bus, bit0 R,8 AC22 MD1 B SDRAM data bus, bit1 R,8 AD23 MD2 B SDRAM data bus, bit2 R,8 AF26 MD3 B SDRAM data bus, bit3 R,8 AE24 MD4 B SDRAM data bus, bit4 R,8 AC23 MD5 B SDRAM data bus, bit5 R,8 AD24 MD6 B SDRAM data bus, bit6 R,8 AE25 MD7 B SDRAM data bus, bit7 R,8 AB24 MD8 B SDRAM data bus, bit8 R,8 AC25 MD9 B SDRAM data bus, bit9 R,8 AD26 MD10 B SDRAM data bus, bit10 R,8 AA24 MD11 B SDRAM data bus, bit11 R,8 AB25 MD12 B SDRAM data bus, bit12 R,8 AC26 MD13 B SDRAM data bus, bit13 R,8 AB26 MD14 B SDRAM data bus, bit14 R,8 Y24 MD15 B SDRAM data bus, bit15 R,8 W23 MD16 B SDRAM data bus, bit16 D,R,8 AA25 MD17 B SDRAM data bus, bit17 D,R,8 AA26 MD18 B SDRAM data bus, bit18 D,R,8 Y25 MD19 B SDRAM data bus, bit19 D,R,8 W24 MD20 B SDRAM data bus, bit20 D,R,8 Y26 MD21 B SDRAM data bus, bit21 D,R,8 W25 MD22 B SDRAM data bus, bit22 D,R,8 V24 MD23 B SDRAM data bus, bit23 D,R,8 W26 MD24 B SDRAM data bus, bit24 D,R,8 V25 MD25 B SDRAM data bus, bit25 D,R,8 U24 MD26 B SDRAM data bus, bit26 D,R,8 V26 MD27 B SDRAM data bus, bit27 D,R,8


U25 MD28 B SDRAM data bus, bit28 D,R,8 U26 MD29 B SDRAM data bus, bit29 D,R,8 T24 MD30 B SDRAM data bus, bit30 D,R,8 T25 MD31 B SDRAM data bus, bit10 D,R,8 N24 DQM0L O SDRAM data mask signal, bank0, low byte R,8 M26 DQM0H O SDRAM data mask signal, bank0, high byte R,8 M25 DQM1L O SDRAM data mask signal, bank1, low byte R,8 M24 DQM1H O SDRAM data mask signal, bank1, high byte R,8

AC24 WENN O SDRAM write enable signal R,8 AB23 SDCLK O SDRAM clock R,8 AD25 RASNN O SDRAM raw address strobe signal R,8 AE26 CASNN O SDRAM column address strobe signal R,8 L26 MA0 O SDRAM address bus, bit0 R,8 L25 MA1 O SDRAM address bus, bit1 R,8 L24 MA2 O SDRAM address bus, bit2 R,8 K26 MA3 O SDRAM address bus, bit3 R,8 K25 MA4 O SDRAM address bus, bit4 R,8 K24 MA5 O SDRAM address bus, bit5 R,8 J26 MA6 O SDRAM address bus, bit6 R,8 J25 MA7 O SDRAM address bus, bit7 R,8 H26 MA8 O SDRAM address bus, bit8 R,8 H25 MA9 O SDRAM address bus, bit9 R,8 J24 MA10 O SDRAM address bus, bit10 R,8 J23 MA11 O SDRAM address bus, bit11 R,8 G26 MA12 O SDRAM address bus, bit12 R,8 H24 MA13 O SDRAM address bus, bit13 R,8 H23 MA14 O SDRAM address bus, bit14 R,8

Video Input Interface

The SPV302A supports three video interfaces, port A, port B and port C. When the TCON interface is disabled, port C is used to connect a video decoder in CCIR656 format. When the TCON

interface is enabled, port C is used to output TCON control signals.

T26 CLKC B CLKC (I) CPV (O) D,R,8 R25 DATAC0 B DATAC0 (I) CPH (O) D,R,8 R24 DATAC1 B DATAC1 (I) STH1 (O) D,R,8 R26 DATAC2 B DATAC2 (I) RLS (O) D,R,8 P24 DATAC3 B DATAC3 (I) LP (O) D,R,8 P25 DATAC4 B DATAC4 (I) POL (O) D,R,8 P26 DATAC5 B DATAC5 (I) SHC (O) D,R,8 N26 DATAC6 B DATAC6 (I) INV1 (O) D,R,8 N25 DATAC7 B DATAC7 (I) INV2 (O) D,R,8

YUV RGB(888)

8bit (656) 8bit (601) 12bit 16bit 24bit 48bit

422 format 422 format 411 format 422 format Single pixel

Dual pixel

F26 DATAA0 I UV0 R0 RA0 G25 DATAA1 I UV1 R1 RA1 G24 DATAA2 I UV2 R2 RA2 F25 DATAA3 I UV3 R3 RA3 E26 DATAA4 I V6/4/2/0 UV4 R4 RA4 G23 DATAA5 I V7/5/3/1 UV5 R5 RA5 F24 DATAA6 I U6/4/2/0 UV6 R6 RA6 E25 DATAA7 I U7/5/3/1 UV7 R7 RA7 D26 DATAA8 I DA0 YUV0 Y0 Y0 G0 GA0 F23 DATAA9 I DA1 YUV1 Y1 Y1 G1 GA1 E24 DATAA10 I DA2 YUV2 Y2 Y2 G2 GA2 D25 DATAA11 I DA3 YUV3 Y3 Y3 G3 GA3 C26 DATAA12 I DA4 YUV4 Y4 Y4 G4 GA4 E23 DATAA13 I DA5 YUV5 Y5 Y5 G5 GA5 D24 DATAA14 I DA6 YUV6 Y6 Y6 G6 GA6


C25 DATAA15 I DA7 YUV7 Y7 Y7 G7 GA7 B26 DATAA16 I B0 BA0 D23 DATAA17 I B1 BA1 B25 DATAA18 I B2 BA2 A26 DATAA19 I VREFA VREFA VREFA B3 BA3 D22 DATAA20 I FIELDA FIELDA FIELDA B4 BA4 C24 DATAA21 I B5 BA5 D21 DATAA22 I HREFA HREFA HREFA B6 BA6 C23 DATAA23 I DVALIDA DVALIDA DVALIDA B7 BA7 C14 DATAB0 I UV0 RB0 A13 DATAB1 I UV1 RB1 B13 DATAB2 I UV2 RB2 C13 DATAB3 I UV3 RB3 A12 DATAB4 I V6/4/2/0 UV4 RB4 B12 DATAB5 I V7/5/3/1 UV5 RB5 C12 DATAB6 I U6/4/2/0 UV6 RB6 A11 DATAB7 I U7/5/3/1 UV7 RB7 B11 DATAB8 I DA0 YUV0 Y0 Y0 GB0 C11 DATAB9 I DA1 YUV1 Y1 Y1 GB1 A10 DATAB10 I DA2 YUV2 Y2 Y2 GB2 B10 DATAB11 I DA3 YUV3 Y3 Y3 GB3 C10 DATAB12 I DA4 YUV4 Y4 Y4 GB4 A9 DATAB13 I DA5 YUV5 Y5 Y5 GB5 B9 DATAB14 I DA6 YUV6 Y6 Y6 GB6 C9 DATAB15 I DA7 YUV7 Y7 Y7 GB7 A8 DATAB16 I BB0 B8 DATAB17 B VSB VSB VSB BB1 C8 DATAB18 I CLKB CLKB CLKB BB2 A7 DATAB19 I VREFB VREFB VREFB BB3 B7 DATAB20 I FIELDB FIELDB FIELDB BB4 A6 DATAB21 B HSB HSB HSB BB5 D8 DATAB22 I HREFB HREFB HREFB BB6 C7 DATAB23 I DVALIDB DVALIDB DVALIDB BB7

B24 HSA B Horizontal sync of video port A S C22 VSA B Vertical sync of video port A S D20 CLKA I Input clock of video port A C21 PCHS I Raw horizontal sync of video port A S A25 CLAMP B Clamp signal for DC restoration of analog input data (trap 10) A24 CVS B Regenerated vertical sync from composite sync (trap 8) B23 CHS B Regenerated horizontal sync from composite sync (trap 9)

Digital IO Power Pair A1,A2,B1,B2,C1,C3,D4,M12,M13,M14,

M15,N12,N13,N14,N15,P12,P13,P14, P15,R12

DVSS33

AA23,AC9,AC10,AC18,AC19,AC20, D12,D13,D14,M4,M23,N4,N23,P23,R23,

Y23 DVDD33 3.3V

Digital Core Power Pair L11,R13,R14,R15,D15,L12,L13,L14, L15,L16,M11,M16,N11,N16,P11,P16, R11,R16,T11,T12,T13,T14,T15,T16,

AC12,D16,T4

DVSS25

AC8,AC11,AC15,AC16,AC17,D9, D10,D11,D17,D18,D19,K4,K23,L4,L23,

T23,U4,U23,V4,V23 DVDD25 2.5V

No Connection Pins B22,B21,C16 N.C.

Memo: U: internal pull-up R: Limited slew rate output D: internal pull-down 8: 8mA output current S: Schmitt trigger input 16: 16mA output current T: 3-state output


7.1.4 IO-Trap While most configurations of the SPV302A can be programmed by firmware, there are some configurations that must be determined immediately after the chip is powered-on. The SPV302A adopts an IO-trap mechanism to set these configurations. These configurations are not changed during the operation of the SPV302A. The SPV302A samples signal states on the video output bus when the reset signal goes form high to low. These samples values, in turn, set the internal configurations. The following table lists all the IO-trap values in the SPV302A:

Name Description Note

Trap[0] Extcpu 0: use internal CPU

1: use external CPU (or ICE)

Trap[1] Fastrsten 0: Normal mode (10 ms reset)

1: Fast reset (32 xtal clock)

Trap[2] MPU_I2C Use external CPU interface 0: use serial I2C interface

1: use parallel MPU interface

Trap[4:3] I2Cslave Set I2C alave address

00: 68H 01: 6AH 10: 6CH 11: 6EH

Trap[5] Extusb 1b1

Trap[6] Extflash 0: executes internal ROM code 1: executes external ROM code

Trap[7] Lvrsten 0: disables low voltage reset 1: enable low voltage reset

Trap[9:8] Lvdelay

Configures low voltage detector response time 00: delay 64 xtal clocks

01: delay 128 xtal clocks 10: delay 256 xtal clocks 11: delay 512 xtal clocks

Trap[10] 0: set video output interface to VOUT port 1: set parallel MPU interface to VOUT port


7.2 AD9883 7.2.1 Description

The AD9883A is a complete 8-bit, 140 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 140 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports resolutions up to SXGA (1280 x 1024 at 75Hz).

7.2.2 Block diagram


7.3 VPC3230D 7.3.1 Description The VPC 323xD/324xD is a high-quality, single-chip Multi-standard color decoder which is targeted for 4:3 and 16:9, 50/60 and 100/120 Hz TV sets. it integrates 4H comb filter Y/C separator, high-quality A/D converter, multi-type scaler, multi-outputs formats interfaces ,high-quality soft mixer and I square C bus interface. It can supports PIP which can be processed in 15 predefined positions and provides linear horizontal scaling and non-linear scaling for different purposes. It only take few peripheral components and a 20.25 MHz crystal and the package of it is 80-pin PQFP.

7.3.2 Block diagram

7.3.3 Pin functions

Pin No. PQFP 80-pin

Pin Name Type Connection (if not used)

Short Description

1 B1/CB1IN IN VREF Blue1/Cb1 Analog Component Input 2 G1/Y1IN IN VREF Green1/Y1 Analog Component Input 3 R1/CR1IN IN VREF Red1/Cr1 Analog Component Input 4 B2/CB2IN IN VREF Blue2/Cb2 Analog Component Input 5 G2/Y2IN IN VREF Green2/Y2 Analog Component Input 6 R2/CR2IN IN VREF Red2/Cr2 Analog Component Input 7 ASGF X Analog Shield GNDF 8 FFRSTWIN IN LV or GNDD FIFO Reset Write Input ** 9 VSUPCAP OUT X Digital Decoupling Circuitry Supply Voltage 10 VSUPD SUPPLYD X Supply Voltage, Digital Circuitry 11 GNDD SUPPLYD X Ground, Digital Circuitry 12 GNDCAP OUT X Digital Decoupling Circuitry GND 13 SCL IN/OUT X I2C Bus Clock 14 SDA IN/OUT X I2C Bus Data 15 RESQ IN X Reset Input, Active Low 16 TEST IN GNDD Test Pin, connect to GNDD 17 VGAV IN GNDD VGAV Input 18 YCOEQ IN GNDD Y/C Output Enable Input, Active Low 19 FFIE OUT LV FIFO Input Enable 20 FFWE OUT LV FIFO Write Enable 21 FFRSTW OUT LV FIFO Reset Write/Read


22 FFRE OUT LV FIFO Read Enable 23 FFOE OUT LV FIFO Output Enable 24 CLK20 IN/OUT LV Main Clock Output 20.25 MHz 25 GNDPA OUT X Pad Decoupling Circuitry GND 26 VSUPPA OUT X Pad Decoupling Circuitry Supply Voltage 27 LLC2 OUT LV Double Clock Output 28 LLC1 IN/OUT LV Clock Output 29 VSUPLLC SUPPLYD X Supply Voltage, LLC Circuitry 30 GNDLLC SUPPLYD X Ground, LLC Circuitry 31 Y7 OUT GNDY Picture Bus Luma (MSB) 32 Y6 OUT GNDY Picture Bus Luma 33 Y5 OUT GNDY Picture Bus Luma 34 Y4 OUT GNDY Picture Bus Luma 35 GNDY SUPPLYD X Ground, Luma Output Circuitry 36 VSUPY SUPPLYD X Supply Voltage, Luma Output Circuitry 37 Y3 OUT GNDY Picture Bus Luma 38 Y2 OUT GNDY Picture Bus Luma 39 Y1 OUT GNDY Picture Bus Luma 40 Y0 OUT GNDY Picture Bus Luma (LSB) 41 C7 OUT GNDC Picture Bus Chroma (MSB) 42 C6 OUT GNDC Picture Bus Chroma 43 C5 OUT GNDC Picture Bus Chroma 44 C4 OUT GNDC Picture Bus Chroma 45 VSUPC SUPPLYD X Supply Voltage, Chroma Output Circuitry 46 GNDC SUPPLYD X Ground, Chroma Output Circuitry 47 C3 OUT GNDC Picture Bus Chroma 48 C2 OUT GNDC Picture Bus Chroma 49 C1 OUT GNDC Picture Bus Chroma 50 C0 OUT GNDC Picture Bus Chroma (LSB) 51 GNDSY SUPPLYD X Ground, Sync Pad Circuitry 52 VSUPSY SUPPLYD X Supply Voltage, Sync Pad Circuitry 53 INTLC OUT LV Interlace Output 54 AVO OUT LV Active Video Output 55 FSY/HC/HSYA OUT LV Front Sync/ Horizontal Clamp Pulse/Front-End

Horizontal Sync Output ** 56 MSY/HS IN/OUT LV Main Sync/Horizontal Sync Pulse 57 VS OUT LV Vertical Sync Pulse 58 FPDAT/VSYA IN/OUT LV Front-End /Back-End Data/Front-End Vertical

Sync Output ** 59 VSTBY SUPPLYA X Standby Supply Voltage 60 CLK5 OUT LV CCU 5 MHz Clock Output

61 NC LV OR GNDD Not connected

62 XTAL1 IN X Analog Crystal Input 63 XTAL2 OUT X Analog Crystal Output 64 ASGF X Analog Shield GNDF 65 GNDF SUPPLYA X Ground, Analog Front-End 66 VRT OUTPUT X Reference Voltage Top, Analog 67 I2CSEL IN X I2C Bus Address Select 68 ISGND SUPPLYA X Signal Ground for Analog Input, connect to

GNDF 69 VSUPF SUPPLYA X Supply Voltage, Analog Front-End 70 VOUT OUT LV Analog Video Output 71 CIN IN LV* Chroma / Analog Video 5 Input 72 VIN1 IN VRT* Video 1 Analog Input 73 VIN2 IN VRT Video 2 Analog Input 74 VIN3 IN VRT Video 3 Analog Input 75 VIN4 IN VRT Video 4 Analog Input 76 VSUPAI SUPPLYA X Supply Voltage, Analog Component Inputs Front-

End


77 GNDAI SUPPLYA X Ground, Analog Component Inputs Front-End 78 VREF OUTPUT X Reference Voltage Top, Analog Component

Inputs Front-End 79 FB1IN IN VREF Fast Blank Input 80 AISGND SUPPLYA X Signal Ground for Analog Component Inputs,

connect to GNDAI

61 NC LV OR GNDD Not connected

7.4 UPD64083 7.4.1 Description

The PD64086 realizes a high precision Y/C separation and a noise reduction by the three-dimension signal processing for NTSC signal. This product has the On-chip 4-Mbit memory for flame delay, 2ch of high precision internal 10-bit A/D converter, and single-chip system of 3D Y/C separation. This LSI includes the Wide Clear Vision ID signal (Japanese local format) decoder and ID-1 signal decoder.

7.4.2 Block diagram


7.5 TDA7226D 7.5.1 Description The TDA7266D is a dual bridge amplifier specially designed for LCD monitor, PC Motherboard, TV and Portable Ratio

applications

7.5.2 Block diagram


8. Block diagram

17VIEW SONIC Block Diagram

NOTE: .AV2 and S-VIDCO USE the same Audio Input

Speaker (2Wx 2)

POWER

12V/5V

AC 120 V

MSP 3425G

AUDIO Decoder

HCT 4052 Selector

SPV302A SCALAR

OSD MCU

17 inch Panel

Inverter

GTL5640L16 SDRAM

24LC16 EEPROM

AT29LV040A Flash ROM

IR

Key PAD VIDEO 1

VIDEO 2

Y/Pb/Pr

S-VIDEO

VPC 3230 Decoder

PHILIPS

FQ1236/F-H3 Tuner

NJM2244 Selector

ANT

AD 9883

ADC

Audio 1

TV_audio

Audio 2

Y/Pb/Pr

TDA7266D Audio AMP

Headphone

PT2308 EAR AMP

Audio Line Out (RCA)

PCA9554D Selector SCL

SDA

M61323 Selector D-SUB

Z86129 V-CHIP

D-SUB_audio

UPD64083


9. Schematic diagram 9.1 Main board

R

5

5VP

COMP_Pr2

3230_PR

AGND

R122

NC

L114 150 OHM

C

1

4

1

1

0

0

p

F

AV1_L 2

C159

0.001uF

L132150 OHM

CN105

CONN

123

R

6

12V

R120

NC

G

5

AV_1 2

O_PRO_PR

B

4

R

0

CP10222pF

12345

678

+5VP

P_Vs6,13

KEY_AD5

O_PRO_Y

L137600 OHM

CP10722pF

12345

678

INV_PRO6

C1370.1uF

P_DATAEN6,13

R118

10K 1/16W

C

1

5

5

0

.

0

0

1

u

F

L116 150 OHM

R[0..7]6,13

CP103 22pF1234 5

678

B

7

CN103

CONN

123456

INTERLACE_PR 4

L133 600 OHM

LINE_O_R 11

R128 75 1/16W

5VAGND

EAR_L10I_DVD_PR

C160

0.001uF

G[0..7]6,13

L115150 OHM

AV1_R 2

C

1

5

8

0

.

0

0

1

u

F

EMI

R

3

G

6

O_PRO_Y

L130 600 OHM

Remote

AGND

CN101

1234567891

0

1

1

1

2

1

3

1

4

1

5

1

6

1

7

1

8

1

9

2

0

2

1

2

2

2

3

2

4

2

5

2

6

2

7

2

8

2

9

3

0

3

1

3

2

3

3

3

4

3

5

3

6

3

7

3

8

3

9

4

0

4

1

4

2

4

3

4

4

4

5

4

6

4

7

4

8

4

9

5

0

L136 600 OHM

AGND

AGND

Audio_L+10

J102A

JACK

1

2

4

5

7

8

3 6 9

P_Hs6,13

INTERLACE_PB 4

L143120 OHM

AGND

AV2_L2

R

7

C132

22pF

AGND

5V

LINE_O_L 11

G

3

C1450.1uF

I_DVD_PB

I_DVD_Y

L142 120 OHM

I_DVD_PR

switch

J100JACK

1 2

3 4

5 6

7 8

9

G

0

B

1

EMI

AGND

R130 75 1/16W

I_DVD_Y

O_PRO_PB

C138100pF

L

1

2

0

1

5

0

O

H

M

L

1

2

8

1

5

0

O

H

M

P_CLK6,13

AV_22

G

1

G

7

B

5

O_PRO_PR

CN112

CONN12

SVIDEO_Y4

INTERLACE_Y 4

L144120 OHM

J105AJACK

1

2

4

5

7

8

3 6 9

Audio_R-10

CN102

CONN

123456789

10

DVD_AL2

C13022pF

COMP_Y2

B

3

B

0

O_PRO_PB

EMI

5V

R

4

3230_Y

R117

NC

Comp_R10

L123150 OHM

MUTE

6,10

R

2

C139100pF

R129 75 1/16W

CP10522pF1

234 5

678

Place near by I/O

RN105NC1234

8765

3230_Y3230_PB

AGND

L117 150 OHM

R119

10K 1/16W

AGND

Comp_L10

COMP_Pb2

L126150 OHM

L127150 OHM

W_ENABLE6

DVD_L

L118150 OHM

DVD_AR2

C

1

5

7

0

.

0

0

1

u

F

C

1

4

0

1

0

0

p

F

CP10422pF

12345

678

G

2

+

C13510uF/16V

12VP

U104PI5V330

910

2

1

5

3

6

1413

1211

15

4

1

6

8

7

DDS2D

S1A

IN

S1B

S2A

S2B

S1CS2C

DCS1D

/EN

DA

V

C

C

G

N

D

DB

I_DVD_PB

L131150 OHM

CP100

22pF

8

1

7

2

6

3

5

4

C1360.1uF

COMP_SEL5

C

1

5

4

0

.

0

0

1

u

F

CN106

CONN

123456

O_PRO_PB

C

1

4

3

0

.

1

u

F

B

6

PAN_PWR5,13

3230_PR

G

4

3230_PB

Q102NC

C13122pF

EAR_R10

+

C13410uF/16V

C

1

4

2

1

0

0

p

F

Audio_L-10

AV2_R2

B[0..7]6,13

CN111

CONN123

LP110

120 OHM(8P4R)

12345

678

LP108

120 OHM(8P4R)

12345

678

C

1

5

6

0

.

0

0

1

u

F

L113 150 OHM

SVIDEO_C4

R

1

O_PRO_PR

CP10622pF

12345

678

C

1

4

4

0

.

1

u

F

AGND

Audio_R+10

Remote5

O_PRO_Y

Q103NC

L138 600 OHM

CN107

CONN

12345678

BL_ADJ5

DVD_R

3.3VM

AGND

LP107

120 OHM(8P4R)

12345

678

R121

NC

B

2


AGND

Pr

+ C11410uF/16V

Go

C

1

6

2

1

0

0

p

F

RN10110K 1/16W

1234

8765

SVIDEO

AV2_L_1

+ C129

47uF/16V

1

Ho

Bi +C125 47uF/16V

C

1

4

7

2

2

p

F

C112

22pF

Vo

+C123 47uF/16V

COMP_Pb1

Hi

L108 150 OHM

0

VSEL_R 9

AV2_L1

Ro

+ C11710uF/16V

TUNER

AV_11

C152 0.1uF

5V_MUX

C153 0.1uF

AV_21

Bi

SEL1

Bo

R

1

1

4

7

5

1

/

1

6

W

0

5V

AV1_R_1

U102

NJM2244

135

6

7

8

24

VIN1VIN2VIN3

V+

VOUT

G

N

D

SW1SW2

L109 150 OHM

5V

Y

Bo

R10875 1/16W

Pb

0

AV2_R1

audio

CH_SEL36

C1000.1uF

8V

AGND

ASEL_O_L 11

Ri

AV1_L1

VGA_B9+C124

10uF/16V

C

1

4

8

2

2

p

F

SEL3

12VS

U103123456789

11121314151617

19

33

30

2021

2829

32

35

31

34

27262524

22

10

18

23

36VccRin1VccGin1VccBin1Hin1Vin1GND

Rin2PSGin2SELBin2Hin2Vin2

GND

GND

GND

VOUTHOUT

BOUTVcc

Vcc

Vcc

GOUT

ROUT

GNDGBuf

SyncSEP_ISyncSEP_O

Vcc

GND

NC

Vcc

NC

1

R10975 1/16W

C151 0.1uF

VGA_R9

AV2_R_1

DVD_AR1

R126 NC

+C126 47uF/16V

CH_SEL16

Bo

+

C11510uF/16V

COMP_Y1

0

VGA_G9

R1231K 1/16W

1

Pb

+ C16810uF/16V

CH_SEL26

CH_SEL26

Ro

+

C11910uF/16V

VGA_VS9

VSEL_VS 9

Go

R

1

1

3

7

5

1

/

1

6

W

SEL2

C

1

6

1

1

0

0

p

F5V_MUX

Gi

C

1

4

6

2

2

p

F

Hi

C

1

4

9

2

2

p

F

AV2_R_1

C113

22pF

R127

NC

Pr

+

C11810uF/16V

R

1

1

2

7

5

1

/

1

6

W

1

AV1_L_1

COMP_Pr1

Ho

AV1_R_1

Comp_R_110

Vi

R

1

1

5

7

5

1

/

1

6

W

R

1

1

1

7

5

1

/

1

6

W

R124

47K 1/16W

+C12010uF/16V

LOW:INPUT1

U100

74HC4052D

12141511

1524

6

109

13

3

16

8

7

X0X1X2X3

Y0Y1Y2Y3

EN

AB

X

Y

VDD

G

N

DVEE

+C16410uF/16V

AGND

L139600 OHM

1

C1630.1uF

VIDEO_SEL6

Gi

+C122 47uF/16V

R125

10 2W

RN102 NC1234

8765

L140600 OHM

5V

U1053 2

1

VI VO

G

N

D

C111

22pF

HIGH:INPUT2

VGA_HS9

Vo

+ C11610uF/16V

video

Ri

C1210.1uF

CVBS_SEL_O 15

+C128 47uF/16V

ASEL_O_R 11

VSEL_G 9

VSEL_HS 9

RN103 NC1234

8765

1

AV2_L_1

PC

C

1

6

7

1

0

0

p

F

TUNER_OUT3

VSEL_B 9

AV1_R1

Vi

AV1

AV1_L_1

0

AGND

VSEL_G 9

Ro

+C127 47uF/16V

Comp_L_110

YR

1

1

6

7

5

1

/

1

6

W

SCART

L112 150 OHM

AV1

Go

RN1004.7K 1/16W

1234

8765

L110 150 OHM

AGND

DVD_AL1

SCART

C1500.1uF

1


L107600 OHM

+

C104

100uF/16V

+C107NC

AGND

U1013 2

1

VI VO

G

N

D

TUNER_SIF 11C166100pF

SDA4,5,6,9,11,14,15

L104NC

AGND

R10175 1/16W

SCL4,5,6,9,11,14,15

R1022.5 2W

5V_A

+ C108

100uF/16V

L103

600 OHM

TUNER_OUT 2

12V_T

TU100 TUNER

1 2 3 1

1

1

2

1

3

1

4

1

8

1

5

1

6

1

7

4 5 6 9 1

0

N

C

/

A

G

C

N

C

/

M

o

n

i

t

o

r

V

C

C

S

I

F

C

V

B

S

V

C

C

-

I

F

A

F

O

/

P

C

H

A

S

S

I

S

C

H

A

S

S

I

S

C

H

A

S

S

I

S

C

H

A

S

S

I

S

S

C

L

S

D

A

A

S

N

C

N

C

AGND

C10147pF

L106600 OHM

C10247pF

L105NC

C109

0.1uF/16V

L102

600 OHM

R106

75 1/16W

5V

AGND

R107220 1/16W C110

47pF

ANT_Cable

AGND

AGND

SIF_IN

L101

600 OHM

R105NC

C106NC

C103

0.1uF

Q101

PMBS39043

2

1

R10475 1/16W

+C105NC

R1032.5 2W

C165100pF


VD_Field 6

C215

0.047uF

SVIDEO_Y1

C2340.1uF

R226 75 1/16W

R204 0 1/16W

VDDIINTERLACE_PB1

C213

22pF

R206100 1/16W

AGND

Y4

R214 3.6K 1/16W

Y1

+C230

100uF/16V

L207600 OHM

R216 3.6K 1/16W

C4

C209

22pF

C2013.3pF

R211 10 1/16W

R22775 1/16W

R

2

1

9

1

K

1

/

1

6

W

C200

0.0015uF

Y3

C214

0.047uF

Y2

C1

C219 0.22uF

VDDA

C

2

4

5

1

0

0

p

F

C6

U200

VPC3230D

1 2 3 4 5 6 7 1

6

1

5

1

8

1

1

2

0

1

3

2

2

2

3

2

4

26

38

5

1

27282930

33

4

3

5

3

3534

5

2

6

3

5

8

36

3231

8 9 1

0

1

2

1

4

1

7

1

9

2

1

25

37

3940

4

1

4

2

4

4

4

5

4

6

4

7

4

8

4

9

5

0

5

7

5

6

5

5

5

4

6

2

6

1

6

0

5

9

676665

6

4

68

72717069

7374757677

7978

80

B

1

/

C

b

1

I

N

G

1

/

Y

1

I

N

R

1

/

C

r

1

I

N

B

2

/

C

b

2

I

N

G

2

/

Y

2

I

N

R

2

/

C

r

2

I

N

A

S

G

F

T

E

S

T

R

E

S

Q

Y

C

O

E

Q

G

N

D

D

F

F

W

E

S

C

L

F

F

R

E

F

F

O

E

C

L

K

2

0

VSUPPA

Y2

G

N

D

S

Y

LLC2LLC1

VSUPLLCGNDLLC

Y5

C

5

I

N

T

L

C

GNDYY4

V

S

U

P

S

Y

X

T

A

L

2

F

P

D

A

T

/

V

S

Y

A

VSUPY

Y6Y7

F

F

R

S

T

W

I

N

V

S

U

P

C

A

P

V

S

U

P

D

G

N

D

C

A

P

S

D

A

V

G

A

V

F

F

I

E

F

F

R

S

T

W

GNDPA

Y3

Y1Y0

C

7

C

6

C

4

V

S

U

P

C

G

N

D

C

C

3

C

2

C

1

C

0

V

S

M

S

Y

/

H

S

F

S

Y

/

H

C

/

H

S

Y

A

A

V

O

X

T

A

L

1

N

C

C

L

K

5

V

S

T

B

Y

I2CSELVRTGNDF

A

S

G

F

ISGND

VIN1CINVOUTVSUPF

VIN2VIN3VIN4VSUPAIGNDAI

FB1INVREF

AISGND

L201150 OHM

R223 75 1/16W

R

2

0

9

7

5

1

/

1

6

W

INTERLACE_PR1

CC_B14

CC_R14

R

2

1

0

7

5

1

/

1

6

W

R222NC

L202150 OHM

RP201 100 1/16W1234

8765

VDDI

C7

R

2

0

7

7

5

1

/

1

0

W

C242

0.1uF

R2000 1/16W

C220 0.22uF

C210

22pF

SDA 3,5,6,9,11,14,15

CC_G14

L200150 OHM

C227

0.0015uF

C2390.1uF

VDDA

R22875 1/16W

CIN

R217100 1/16W

C

2

4

4

1

0

0

p

F

SCL 3,5,6,9,11,14,15

R202 0 1/16WR203 0 1/16W

VD_VOUT14

C211

22pF

C[0..7] 6

C

2

4

3

1

0

0

p

F

C0

C225330pF

C203

0.001uF

C2400.1uF

Y0

C2380.1uF

R213 1K 1/16W

C229

0.22uF

AGND

+C2124.7uF/16V

C2180.22uF

C241

22pF

SVIDEO_C1

C2230.068uF

C2

C2350.1uF

AGND

3D_Y15

3D_C15

INTERLACE_Y1

Y7

RP200100 1/16W1234

8765

VIN2:With Comb Filter(3D_Y)/Without CombFilter (CVBS)

R224 75 1/16W

R23110K 1/16W

C5C2023.3pF

L208600 OHM

C2070.047uF

AGND

+

C2044.7uF/16V

R225 75 1/16W

VDDI

Y[0..7] 6

Y5

C3

C224330pF

VDDI

VD_VREF 6

R22975 1/16W

R

2

0

5

1

M

1

/

1

6

W

X20020.25MHz

CC_FB14

L203150 OHM

VIN2

VD_HS 6,14

+C23110uF/16V

RP203100 1/16W1234

8765

AGND

VIN3

R230 75 1/16W

R215 3.6K 1/16W

C2320.1uF

Y6

C2330.1uF

EMIR212 NC

R201 0 1/16W

C2360.1uF

+ C222NC

R

2

0

8

7

5

1

/

1

6

W

C2370.1uF

R

2

1

8

1

K

1

/

1

6

W

VD_CLK 6

VD_RST 5

AGND

VIN1

C208

0.68uF/16V

VD_VS 6

VIN4

C

2

4

6

3

3

0

p

F

5V

C205

0.68uF/16V

C2160.22uF

C228

390pF

R

2

2

0

1

K

1

/

1

6

W

C226330pF

C221 0.22uF

C2170.22uF

RP202100 1/16W

1234

8765

C206

0.68uF/16V

3.3VS


MD24

MDR11

CPUA17

SCL

MAR7CPUP15

MAR4

MDR30

U310

AT29LV040A-15JC

56789

10111213

1

4

1

5

1

6

1

7

1

8

1

9

2

0

212223242526272829

3

0

3

1

3

2

1234

A7A6A5A4A3A2A1A0IO0

I

O

1

I

O

2

G

N

D

I

O

3

I

O

4

I

O

5

I

O

6

IO7CE

A10OE

A11A9A8

A13A14

A

1

7

W

E

V

C

C

A

1

8

A

1

6

A

1

5

A

1

2

+C364

10uF/16V

MDR6

CPUP26

MD20

MDR11

MAR13

C382

0.1uF

R389510 1/16W

CPUP12

MDR3

R356 22 1/16W

C375

0.1uF

RN313 22 1/16W

1234

8765

Internal ROM: CPUP16 pull LOW

3.3VM

MAR9

MDR2

MD11

CPUP22

MD13

MD22

R343 100K 1/16W

C381

0.1uF

3.3VM

TX 9

CPUP04

MDR14

MD16

+ C366

100uF/16V

C3780.1uF

MDQML1

MD13

MD6

MD21XTALI

R362 NC

R321 220 1/16W

CPUP07

MD18

MDQMH1

MWENN

CPUP10

MAR6

MD25

Note: for ISP function

C

P

U

P

0

2

U305

P2781

1234

8765

XINXOUTFS1LF

VDDFS0

MOUTVSS

ROMA2

CPUP26

MDR27

MDR24

U304

M24C16-MN6T

4

8

56

1

2

3

7

G

N

D

VCC

SDASCL

A0

A1

A2

WP

MA10

MD9

C374

0.1uF

C370

15pF

SDCLKR

SDCLK

MAR8

MCASNN

MA7

MD18

MD0

R342 100K 1/16W

3.3VM

CPUP00

MD29

MAR0

MAR6

MD2

MDR15

RN315 22 1/16W

1234

8765

C380

0.1uF

433.3VM

C

P

U

P

2

4

WENN

CPUP17

R351 22 1/16W

MD4

RN317 22 1/16W

1234

8765

R32433 1/16W ROMA0

MA0

MAR3

MDR25

R381

0 1/16W

MD12

MCSNN

MDR0

R329 100 1/16W

Q301PMBS3904

3

2

1

MDR18

C392

0.1uF/16V

MRASNN

SDCLKR

MDR18

3.3VM

VD_RST

MRASNN

R352 22 1/16W

R3504.7K 1/16W

49CPUP00

MD4

MDR0

MD17

R346 22 1/16W

C369

15pF

RASNN

MDR28

MDR9

12VS

CPUP23

MA10

CPUP05

MA14

Misc

U300B SPV301A J3H1L3J1K3J2K2K1

L2L1M1M3M2N1N2N3

AE3AC7AD5AD7AF3AD6AE4AF4

AE5AF5AE6

AF6

H4F1G3G2J4G1H3H2

P1P2P3P4R1R2R3R4

F3

AC21A5E2

T2

C5D5

C2D2

F4G4

T1

E1

F2

D3

E3

P00P01P02P03P04P05P06P07

P20P21P22P23P24P25P26P27

ROMA0ROMA1ROMA2ROMA3ROMA4ROMA5ROMA6ROMA7

ROMA16ROMA17ROMA18

ROMWRnn

P10P11P12P13P14P15P16P17

P30-RXDP31-TXD

P32-INT0nnP33

P34-T0P35-T1

P36-WRnnP37-RDnn

HWRST

EXTMCLKEXTDCLKEOSDCLK

IRRECV

ADC0ADC1

USB-DPUSB-DM

ALE_SCLPSEN_SDA

TESTMODE

XTALI

XTALO

XTALIRTC

XTALORTC

MDR13

L300NC

CPUP01

MAR10

MAR12

C372

0.1uF

9

C

P

U

P

0

1

ROMA5

MAR13

CPUP10

RN310 22 1/16W

1234

8765

PAN_PWR 1,13

MDR7

X30012MHz

5VP

MD8

MD22

R35375 1/16W

R359 100K 1/16W

3.3VM

CPUA18

MD5

MAR10

MA14

C394

0.1uF

3.3VM

MDQML0

MRASNN

3.3VM

3.3VM

PANPWR_ON

ROMWRZ

MAR13

R3330 1/16W

ROMA6

MDR26

MD5

MDR6

MWENN

MD28

MA8

MAR7

R328 100 1/16W

SW300

SWMAR1

MWENN

MAR0

MAR11

CPUP32

14CPUP23

ROMA6

+ C3711uF/16V

DQML1

MAR14

MDR16

MD7

C391

0.001uF

ROMA1

MA7

MAR5

MD28

R360 10K 1/16W

ROMA7

ROMA3

C383

0.1uF

MD3

MDR31

MDR4

RN312 22 1/16W

1234

8765

R358 100K 1/16W

MAR5

MA9

DQMH0

C385

0.1uF

DQML0

MDR23

27

SDA 3,4,6,9,11,14,15

ROMA0

WENN

C373

0.1uF

DQML0

MAR3

R380

0 1/16W

CPUP06

MA13

R340 NC

R3260 1/16W

C393

270pF

MDQMH0

MA0

MDR10

MD16

R38710 1/16W

C367

15pF

MAR11

MDR22

MD15

U303

GTL540L16

1817

2841

38

3739

54

232425262930313233342235

2457

2120

1619

11427

39

4349 6

124652

81011134244454748505153

15

36

RASCAS

GNDGND

CLK

CKEDQMU

GND

A0A1A2A3A4A5A6A7A8A9A10A11

DQ0DQ1DQ2DQ3

BS1/A12BS0/BA

WECS

VCCVCCVCC

VCCQVCCQVCCQVCCQ VSSQ

VSSQVSSQVSSQ

DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14DQ15

DQML

NC

MD2

MAR7

MA3MAR2

MDR24

DQML1

MD10

3

CPUP21ROMA5

MD19

MDR10

MAR1

MAR14

R330 100 1/16W

L309600 OHM

3.3VM

MD23

MDR1

MD10

R3224.7K 1/16W

SCL 3,4,6,9,11,14,15

ROMA2

SCL

MA11

CPUP22

MDQMH1

MDQMH0

MAR2

MDR15

MDQML1

MA2

MD3

MAR14

MD26MA13

RN311 22 1/16W

1234

8765

R3350 1/16W

1PSENZ

R

O

M

W

R

Z

MDR7

MAR4

MD31

U302

GTL540L16

1817

2841

38

3739

54

232425262930313233342235

2457

2120

1619

11427

39

4349 6

124652

81011134244454748505153

15

36

RASCAS

GNDGND

CLK

CKEDQMU

GND

A0A1A2A3A4A5A6A7A8A9A10A11

DQ0DQ1DQ2DQ3

BS1/A12BS0/BA

WECS

VCCVCCVCC

VCCQVCCQVCCQVCCQ VSSQ

VSSQVSSQVSSQ

DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14DQ15

DQML

NC

C

P

U

A

1

6

MDR8

MA1

C368

15pF

MDR4

TP314

COMP_SEL 1

MD31

MDR3

MDR29

MD20

3.3VM

KEY_AD1

C

P

U

A

1

7

Q300

AO4403

1234

8765

S1S1S1G1

D1D1D1D1

512KB

SCL 3,4,6,9,11,14,15

C

P

U

P

0

5

PANPWR_ON

MD11

MAR5

R3341M 1/16W

C386

0.1uF

CPUP07MAR8

CPUP15

C

P

U

P

0

6

MDR12

MDR19

C376

0.1uF

R325NC

3.3VM

RX 9

ROMA3

MA6

MD15

CPUP32

MDR5

MAR9

MDR21

MD7

CASNN

CKER

MA12

MDR19

R323 100 1/16W

R347 22 1/16W

R327 100 1/16W

CPUP20

C

P

U

P

2

7

ROMA1

MDR30

MAR0

MA5

MD24

MA8

DQMH1

MD0

WP

R341 100K 1/16W

ROMA4

CKE

MDR9

MDR26

X30132.768KHZ

R357 10K 1/16W

MDR17

MA11

MAR6

MDR12

CPUP12

C

P

U

P

0

4

CPUP21

CPUP02

MA2

RN316 22 1/16W

1234

8765

ISP 9

CASNN

PSENZ

MDR1

MDQML0

MDR20

R33610K 1/16W

MA9

WP

MDR29

MD1

MA12

CPUP25

MD8

MA4

R348 22 1/16W

RN309 22 1/16W

1234

8765

XTALO

CKER

R345 22 1/16W

R339 10K 1/16W

MDR28

MDR31

MAR8

MD9

MCASNN

CPUP03

MDR21

MDR5

R3494.7K 1/16W

C377

0.1uF

ROMA4

CPUP20

DQMH1

CPUP27MCASNN

MAR4

TP312

CPUP17

MD26

RN308 22 1/16W

1234

8765

R355 22 1/16W

LVDS_EN 13

C

P

U

P

0

3

MD25

MAR2

MDR25

MAR1MA1

MD23

R344 100K 1/16W

SDRAM Port

U300D SPV301A L26L25L24K26K25K24J26J25

H26H25J24J23G26H24H23

N24M26M25M24

AF25AC22AD23AF26AE24AC23AD24AE25

AB24AC25AD26AA24AB25AC26AB26Y24

W23AA25AA26Y25W24Y26W25V24

W26V25U24V26U25U26T24T25

AC24AB23AD25AE26

MA0MA1MA2MA3MA4MA5MA6MA7

MA8MA9

MA10MA11MA12MA13MA14

DQM0LDQM0HDQM1LDQM1H

MD0MD1MD2MD3MD4MD5MD6MD7

MD8MD9

MD10MD11MD12MD13MD14MD15



WEnnSDCLKRASnnCASnn

WP

MAR12

MA4

R35475 1/16W

RN300 22 1/16W

1234

8765

SDCLK

CPUA16

CKER

MDR27

MD17

SDA 3,4,6,9,11,14,15

SDCLKR

MA3

MD14

RASNN

CPUP24MAR12

MD27

MAR9

CPUP25

SDA

MDR8

MA6

MDR16

MD1

CS

PWR_ON 12

PANPWR_ON

C384

0.1uF

MAR11

MD29

MD12

MD14

MDR23

C300

0.1uF

MCSNN

MAR3

MDR14

R3000 1/16W

Remote1

TESTMODE

MD30

SDA

TP300

3.3VM

DQMH0

ROMA7

MDR2

MAR10

VD_RST

R338 10K 1/16W

3.3VM

MDR17

MA5

TP313

BL_ADJ 1

C

P

U

A

1

8

MD27

MD21

MCSNN

R33710K 1/16W

VD_RST 4

External ROM: CPUP16 pull HIGH

MDR22

MD30

MDR20

MD6

MDR13

MD19

RN314 22 1/16W

1234

8765

RN307 22 1/16W

1234

8765


TP307 TP

R374NC

R310 100 1/16W

C3620.1uF

1

SEL2

VD_HS4,14

PHSOUT P_HS

Y2Y3

R315 100 1/16W

VIDEO_SEL for ADC input selection(source :HD & VGA)

FM7

FM31

5VP

FM22

G2

GOUT4

1

Q302NC

DACV3

FM28

COAST 9

FM23

C2

C389

22pF

video

VD_CLK4

FM34

C3

+C363

10uF/16V

R3061.5K 1/16W

GOUT[0..7]9

SVIDEO

FM27

P_DATAEN

CN300

CONN

12345678910111213141516171819202122232425262728293031323334353637383940

PB16

ROUT7

ROUT[0..7]9

R[0..7] 1,13

FM8

INV_PRO 1

R7

L311300 OHM

1

W_ENABLE1

FM9

VDENC3600.1uF

L310300 OHM

SEL3

GOUT2

Y1C3570.1uF

TP310 TP

FM25

FM0

GOUT7

1

FM2

Y4

R316 100 1/16W

C4

BOUT3

C38722pF

5VP

R301 100 1/16W

audio

AD_CLK9

C5

R331 NC

R3131K 1/16W

SRS_CTL 10

FM7

R318 100 1/16W

C3560.1uF

Display Port

U300CSPV301A

Y4AA4

AD2AD1

AC4

U1T3U2U3V1V2V3W1

Y1W2W3W4Y2Y3AA1AA2

AA3AB1AB2AB3AB4AC1AC2AC3

AE1AD3AE2AC5AF1AD4AC6AF2

AD18AF19AE19AF20AD19AE20AF21AD20

AE21AF22AD21AE22AF23AF24AD22AE23

AF7AF9AF10

AE13

AE9

AD10

AD9

AF8

AD13

AC13

AF12

AF11

CLK1CLK2

VSOUTHSOUT

DEN

VOUT0VOUT1VOUT2VOUT3VOUT4VOUT5VOUT6VOUT7

VOUT8VOUT9

VOUT10VOUT11VOUT12VOUT13VOUT14VOUT15





AROUTAGOUTABOUT

SVMOUT

CBU

CBL

RSET

VREF

VMCBU

VMCBL

VMRSET

VMREF

SCART

PVSOUT

GOUT6

RN305

22 1/16W

1234

8765

RN32622 1/16W

1234

8765

RN303

22 1/16W

1234

8765

BOUT6

R367100K 1/16W

AV1

AD_VS9

GOUT3

DACV3

SCL 3,4,5,9,11,14,15

P_VS 1,13

5V

B2

Y[0..7]4

R3

TGOUT

GOUT1

R363 100K 1/16W

VHS

1

FM4

R317 100 1/16W

BOUT7

Y5

TP304 TP

FM31

ROUT0

TP309 TP

FM5

FM33

BOUT1

RN32722 1/16W

1234

8765

0

VD_VS4

GOUT5

R311 100 1/16W

R375NC

R371

100 1/16W

P_CLK 1,13

BOUT5

TP302 TP

MUTE 1,10

FM35C7

R372 22 1/16W

FM21

Y6

C6

R314 100 1/16W

0

VCLKB

C[0..7]4

RN32222 1/16W

1234

8765

R

3

6

6

1

0

0

K

1

/

1

6

W

B5

C390

22pF

VD_Field4

CBL

ROUT1

R312 100 1/16W

VREF

RN302

22 1/16W

1234

8765

C3960.1uF

FM37

R30591K 1/16W

B4

R30791K 1/16W

SDA 3,4,5,9,11,14,15

B3

FM18

RN32522 1/16W

1234

8765

R

3

6

5

1

0

0

K

1

/

1

6

W

FM38

R364100K 1/16W

R6

FM0

FM5

RN304

22 1/16W

1234

8765

Change to 5VPwill increasethe PowerConsumptionabout0.4~0.5W

TROUT

R4

R320 100 1/16W

TP301 TP

BOUT[0..7]9

FM37

FM24

TP308 TP

CH_SEL32

FM10

PDENOUT

5V

FM30

FM22

Y0

FM26

P_CLK

FM27

+

C

3

5

9

1

0

u

F

/

1

6

V

TP303 TPB[0..7] 1,13

FM4

G7

RN301

22 1/16W

1234

8765

P_HS 1,13

R5

FM32

FM10

G1

VHREF

P_DATAEN 1,13

G3

ROUT5

SCART

3.3VM

FM3

BOUT2

R302 100 1/16W

AD_HS9

FM6

ROUT3

CH_SEL12

PCK1

CBU

FM36

P_VS

C3580.1uF

FM19

R2

B7

BOUT0

TP305 TP

0

3.3VM

FM28

FM17

RN32022 1/16W

1234

8765

R3089.1K 1/16W

TUNER

FM20

FM36

GOUT0

RN306

22 1/16W

1234

8765

Storage Port

U300E

SPV301A

B22A23A22B21A21A20C20B20

C19A19B19C18B18A18A17C17

B17A16B16C16A15B15C15A14

B14AC14AE14AD14AF15AE15AD15AF16

AE16AD16AF17AE17AD17AF18AE18

FM0FM1FM2FM3FM4FM5FM6FM7




FM32FM33FM34FM35FM36FM37FM38

AD_SOG9

AD_Clamp 9VS_ADC

G6

FM1

FM35

BOUT4FM23

B6

TP306 TP

TBOUT

FM2

FM26

FM17

FM6

FM20

0

FM21

FM38

Y7

C1

FM3

C3610.1uF

C0

RN32322 1/16W

1234

8765

G[0..7] 1,13

0

B1

ROUT2

R319 100 1/16W

R1R0

U301 PCA9554D1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16A0

A1

A2

I/O0

I/O1

I/O2

I/O3

VSS I/O4

I/O5

I/O6

I/O7

INT

SCL

SDA

VDD

G5

VFIELD

R309 100 1/16W

C388

22pF

FM9

FM33

FM29

FM1

FM25FM24

RN32422 1/16W

1234

8765

1

VIDEO_SEL 2

FM32

C3970.1uF

R303 100 1/16W

G4

R304 100 1/16W

VD_VREF4

PC

RSET

ROUT4

R373 22 1/16W

TP311 TP

FM11

RN32122 1/16W

1234

8765

CH_SEL22

FM8

FM18

R370NC

AV1

B0

FM11

U300A

F26G25G24F25E26G23F24E25

D26F23E24D25C26E23D24C25

B26D23B25A26D22C24D21C23

C14A13B13C13A12B12C12A11

B11C11A10B10C10

A9B9C9

A8B8C8A7B7A6D8C7

T26

R25R24R26P24P25P26N26N25

C21

B24C22

D20 B23A25A24

DATA_PA0DATA_PA1DATA_PA2DATA_PA3DATA_PA4DATA_PA5DATA_PA6DATA_PA7



DATA_PB0DATA_PB1DATA_PB2DATA_PB3DATA_PB4DATA_PB5DATA_PB6DATA_PB7



CLKC_CPV

DATA_PC0_CPHDATA_PC1_STH1DATA_PC2_RLSDATA_PC3_LPDATA_PC4_POLDATA_PC5_SHCDATA_PC6_INV1DATA_PC7_INV2

PCHS_SOG

HSAVSA

CLKA CHSCLAMP

CVS_COAST

SEL1

FM30

G0

HS_ADC

ROUT6

VVS

CLK_ADC

1

FM34

FM29

FM19


VMV3

C316 0.1uF

U2.D19

L308600 OHM

C309 0.1uFC310 0.1uF

C319 0.1uF

U2.M23

L302600 OHM

U2.AC16

C343 0.1uF

C328 0.1uF

C337 0.1uF

U2.AE7

ADCV3

AD12

C338 0.1uF

C344 0.1uF

+ C35410uF/16V

U2.U23

C355 0.1uF

U2.N4

C345 0.1uF

C317 0.1uF

U2.L4

U2.D18C327 0.1uF

L305600 OHM

U2.AE8

2.5V

U2.V23

3.3VM

C329 0.1uF

USBVDD3

U2.AC8

E4

C312 0.1uF

C306 0.1uF

U2.AC19

DACV3

C322 0.1uF

U2.D14

U2.Y23

C302 0.1uF

C315 0.1uF

OPLLVDD

U2.AC11

2.5V

2.5V SW_DACV3

Power and Ground

U300FSPV301A

M12M13M14M15N12N13N14N15P12P13P14P15

D15L12L13L14L15L16M11M16N11N16P11P16R11R16T11T12T13T14T15

R12

T16

A1A2B1B2C1C3D4

AC8AC11AC15AC16AC17

D9D10D11D17D18D19

K4K23

L4L23T23U4

U23V4

V23

AA23AC9AC10AC18AC19AC20D12D13D14M4M23N4N23P23R23Y23

B4A3

C4B3

E4D1

AE7AD8AE8AD12

AE10AD11AE11AE12

AF13AF14

D7B6

A4C6

B5D6

L11

AC12D16

T4

R13R14R15

DVSS33_TB1DVSS33_TB2DVSS33_TB3DVSS33_TB4DVSS33_TB5DVSS33_TB6DVSS33_TB7DVSS33_TB8DVSS33_TB9

DVSS33_TB10DVSS33_TB11DVSS33_TB12

DVSS25_TB1DVSS25_TB2DVSS25_TB3DVSS25_TB4DVSS25_TB5DVSS25_TB6DVSS25_TB7DVSS25_TB8DVSS25_TB9DVSS25_TB10DVSS25_TB11DVSS25_TB12DVSS25_TB13DVSS25_TB14DVSS25_TB15DVSS25_TB16DVSS25_TB17DVSS25_TB18DVSS25_TB19

DVSS33_TB13

DVSS25_TB20

DVSS33_1DVSS33_2DVSS33_3DVSS33_4DVSS33_5DVSS33_6DVSS33_7

DVDD25_1DVDD25_2DVDD25_3DVDD25_4DVDD25_5DVDD25_6DVDD25_7DVDD25_8DVDD25_9DVDD25_10DVDD25_11DVDD25_12DVDD25_13DVDD25_14DVDD25_15DVDD25_16DVDD25_17DVDD25_18DVDD25_19DVDD25_20

DVDD33_1DVDD33_2DVDD33_3DVDD33_4DVDD33_5DVDD33_6DVDD33_7DVDD33_8DVDD33_9

DVDD33_10DVDD33_11DVDD33_12DVDD33_13DVDD33_14DVDD33_15DVDD33_16

ADCVDD33ADCVSS33

RVDD33RVSS33

UVDD33UVSS33

AVDD33_1AVDD33_2AVDD33_3AVDD33_4

AVSS33_1AVSS33_2AVSS33_3AVSS33_4

MPLLVDD25MPLLVSS25

OPLLVDD25OPLLVSS25

UPLLVDD25UPLLVSS25

DPLLVDD25DPLLVSS25

DVSS25_TB21

DVSS25_1DVSS25_2DVSS25_3

DVSS25_TB22DVSS25_TB23DVSS25_TB24

U2.AC15

2.5V

C307 0.1uF

L306600 OHM

U2.R23

DACV3

MPLLVDD

3.3VM

OPLLVDD

U2.U4

3.3VM

3.3VM

C323 0.1uF+ C325

10uF/16V

U2.AD8

B4

+ C33010uF/16V

C305 0.1uF

U2.K4

3.3VM

C349 0.1uF

U2.AC17

C333 0.1uF

C320 0.1uF

U2.M4

+ C35310uF/16V

U2.D12

+ C32410uF/16V

C352 0.1uF

U2.AC18C314 0.1uF

L304600 OHM

U2.P23

USBVDD3

DACV3

+ C34810uF/16V

C342 0.1uFU2.D10

C303 0.1uF

U2.D11

DPLLVDD

C326 0.1uF

D7

L303600 OHM

U2.N23

C308 0.1uF

+ C33110uF/16V

U2.AC9

C3320.1uF

UPLLVDD

C313 0.1uF

C4

B5

U2.AC10

2.5V

C341 0.1uF

U2.AA23

U2.L23

VMV3

A4

C339 0.1uF

ADCV3

U2.K23

L301600 OHM

U2.D9

C301 0.1uF

MPLLVDDAF13

2.5V

C336 0.1uF

U2.D13

L307600 OHM

C318 0.1uF

C334 0.1uF

U2.AC20

C350 0.1uF

2.5VDPLLVDD

C346 0.1uF

UPLLVDD

C351 0.1uF

+ C34710uF/16V

C311 0.1uF

U2.V4

C304 0.1uF

C321 0.1uF

C340 0.1uF

C335 0.1uF

U2.D17

3.3VM

3.3VM

3.3VM

U2.T23


AGND

R5094.7K 1/16W

C519

0.1uF

GOUT3

D504

MLL4148

ROUT2

GOUT0

ZD500MLL752A

3.3VDD

VGA_VS 2

RX

ROUT6

+C513

100uF/16V

D502BAV99

3

12

VGA_R 2

GOUT7

R51075 1/16W

BOUT1

R50775 1/16W

R50675 1/16W

C5060.47uF/50V

C504

33pF

GOUT1

GOUT5

TX R500

1K 1/16W

ROUT3

V

G

A

_

H

S

C528

0.1uF

R505

1K 1/16W

AGND

ROUT4

C520

0.1uF

AGND

AGND

C514

0.1uF

C516

0.1uF

BOUT6

RP505100 1/16W

1234

8765 ROUT7

VGA_SCL

GOUT4

ROUT5

AGND

BOUT7

C509

0.1uF

C5020.1uF

BOUT4

BOUT2

VGA_SDA

CN500

CONN

2468

10

13579

AGND

C533

0.1uF

5V

AGND

GOUT6

TX 5

C507

0.001uF

5VD_ADDC

RP504100 1/16W1234

8765

RP501100 1/16W1234

8765

3.3VA

AGND

VGA_G 2

3.3VDD

AGND

BLUE

3.3V_AD

AGND

+C525

100uF/16V

ROUT1

C532

0.1uF

U500

24LC21A/SN

12345

678 NC

NCNC

VSSSDASCLVCLKVCC

5VP

COAST6

L503600 OHM

RED

C500

0.0082uF

L502600 OHM

VSEL_G2

V

G

A

_

V

S

RP500 100 1/16W

1234

8765

C5010.1uF

Documents

MonitorSONIC_SG6841