Ones Counter

7/25/2019 Ones Counter

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Ones Counter


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Ones Counter is a Counter which counts the number of one'scoming in serial stream.

The Minimum value of the count is "0" and count starts byincriminating one till "15".

fter "15" the counter rolls bac! to "0".

eset is also #rovided to reset the counter value to "0". esetsignal is active negedge.

$n#ut is 1 bit #ort for which the serial stream enters. Out bit is %bit #ort from where the count values can be ta!en. eset andcloc! #ins also #rovided.

This example will help youunderstand the verifcation ow


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moduled(cl!)reset)din)dout*+inputcl!)reset)din+outputdout+logicdout+

always,(posedgecl!)negedgereset*i(-reset*dout / 0+

elsedout / din+endmodule

module onescounter(cl!)reset)data)count*+inputcl!)reset)data+output0234 count+

d d1(cl!)reset)data)count04*+d d(count04)reset)6count14)count14*+d d3(count14)reset)6count4)count4*+d d%(count4)reset)6count34)count34*+

endmodule

RTL


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This is a sim#le test#lan. 7eatures to be veri8ed are1* Count should increment from "0" to "15".( Coverage item** Count should roolover to "0" after "15".(Coveragetransition*3* eset should ma!e the out#ut count to "0") when the countvalues is non "0". ( ssertion coverage*

Test Plan :


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loc! "iagram


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TO9:;; Cloc! generator:;; coreboard

#erifcation environmenthierarchy


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Test$ench Components


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>timulus is a single bit value.

classstimulus+

rand$itvalue+constraintdistribution ?value dist? 0 2/ 1 ) 1 2/1 @+ @endclass

%timulus


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This driver consists of reset and drivemethod.

eset method resets the


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classdriver+stimulus sti+>coreboard sb+

covergroupcov+7eature12 coverpointsb.store +7eature 2 coverpointsb.store ? $instrans / ( 15 / 0* +@endgroup

virtualintfcnt intf+

unctionnew(virtualintfcnt intf)scoreboard sb*+this.intf / intf+this.sb / sb+cov ' new()*endunction

tas!reset(*+ DD eset method

int+data ' ,*- (negedge int+cl!)*int+reset ' .*- (negedge int+cl!)*int+reset ' ,*- (negedge int+cl!)*int+reset ' .*endtas!

tas!drive(inputintegeriteration*+repeat(iteration*$eginsti / new(*+, (negedgeintf.cl!*+i(sti.randomiEe(** DD Fenerate stimulusintf.data / sti.value+ DD


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The monitor collects the


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This bloc! contains the assertion coveragerelated to 3 rd feature mentioned intest#lan.

moduleassertioncov(intfcnt intf*+73 2 coverproperty(,(posedgeintf.cl!*

(intf.count -/0* :; intf.reset // 0*+endmodule

3ssertion Coverage


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This scoreboard is a sim#le one whichstores one eB#ected value.

classscoreboard+$it0234 store+

endclass

%core$oard


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=nvironment contains instances of driver) monitor and scoreboard.

classenvironment+driver drvr+scoreboard sb+monitor mntr+

virtualintfcnt intf+

unctionnew(virtualintfcnt intf*+this.intf / intf+sb / new(*+drvr / new(intf)sb*+mntr / new(intf)sb*+

or!mntr+chec!()*

4oin5none endunction

endclass

6nvironment


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The interface is declared and the test bench and


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moduleto#(*+regcl! / 0+initialDD cloc! generatororeverK5 cl! / 6cl!+

DD


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This is a sim#le test case. $t does reset and thensend 10 in#ut values.

programtestcase(intfcnt intf*+

environment env / new(intf*+

initial$egin

env+drvr+reset()*env+drvr+drive(.,)*endendprogram

Tests


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(%)Total Coverage %ummary

>CO= >>=T FOA9L.3 0.00 1.N5

(%)Cover group report$JP= =Q9=CT=< ARCO==< CO==< 9=C=RT FOP S=$FT7eature1 1U 10 U 3N.50 100 17eature 1 1 0 0.00 100 1

(%)3ssertion coverage report:CO= 9O9=T$=> CT=FOV >==$TV TT=M9T> MTC=> $RCOM9P=T=7eature3 0 0 13 0 0

Coverage Report


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This coverage re#ort will be dierent if yousimulate in your tool.

To im#rove the coverage) than the 1sttestcase ) $ wrote nd testcase with morein#ut values and also logic related to 3feature in the test#lan.


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programtestcase(intfcnt intf*+environment env / new(intf*+

initial

$eginenv.drvr.reset(*+env.drvr.drive(100*+env.drvr.reset(*+env.drvr.drive(100*+endendprogram

Tests


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%imulation Log Report:J count is 0000J count is 0000J count is 0000J count is 0000

H =O H J count is 0001H =O H J count is 0001H =O H J count is 0001H =O H J count is 0001H =O H J count is 0010H =O H J count is 0011

J count is 0011J count is 0011H =O H J count is 0100

%imulation Report


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Phases o #erifcation


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Test #lan includes) introduction)assum#tions) list of test cases) list offeatures to be tested) a##roach)deliverables) resources) ris!s andscheduling) entry and eBit criteria.

Test #lan hel#s veri8cation engineer tounderstand how the veri8cation should be

done. test #lan could come in manyforms) such as a s#readsheet) a documentor a sim#le teBt 8le.

#erifcation Plan:


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$n this #hase) the veri8cation environment isdevelo#ed.

=ach veri8cation com#onent can bedevelo#ed one by one or if more than one

engineer is wor!ing it can be develo#ed#arallel.

Sriting the coverage module can be done atany time.

$t is #reered to write down the coveragemodule 8rst as it gives some idea of theveri8cation #rogress.

uilding Test$ench:


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fter the TestJench is built and integrated to


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Once you have achieved certain level offunctional coverage) integrate the codecoverage. 7or doing code coverage) thecode coverage tools have o#tion to switch iton. nd then do the simulation) the tool will#rovide the re#ort.

7ntegrating code coverage


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7inally analyEe both functional coverageand code coverage re#orts and ta!enecessary ste#s to achieve coverage goals.un simulation again with a dierent seed)all the while collecting functional coverageinformation.

3naly9e coverage:


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Than! ou1

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