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OPERATIONAL AMPLIFIERS

Opamp - Gen

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OPERATIONAL AMPLIFIERS

WHAT ARE OPAMPS?

Most versatile and widely used electronic devices that allow you to

build useful circuits without needing to know their complex internal

circuitry

Low cost, easy, fun to work with

Self protecting internal circuitry – (forgiving of wiring errors)

Amplify DC as well as AC signals

Used for versatile operations today (as opposed to add/subtract

etc…)

HISTORY OF OPAMPS

Idea of op-Amps goes way back to 1930s - Gain controlled amplifiers with negative feedback - Bell telephone Laboratories (Patent in 1941)

Around late 1940s and early 1950s - Non-transistorized version; vacuum tube op Amp

First solid state monolithic IC Op-amp(BJTs and FETs) was designed by Robert Wildar and introduced in 1963 by Fairchild semiconductors as uA702

The uA741 was designed by Dave Fullagar in 1967!

Op Amps are not new!! Just Improved. .

K2-XA

Early 1950s! Cost approx. 22$

Now: Less than a dollar!

DIFFERENTIAL AMPLIFIER

Basic building block of an Op-Amp that amplifies the difference between two input signals

2 Emitter biased circuits

Transistors 𝑄1 & 𝑄2 are identical

𝑅𝐸1 = 𝑅𝐸2 ; 𝑅𝐢1 = 𝑅𝐢2

+𝑉𝐢𝐢 and βˆ’π‘‰πΈπΈ have equal magnitudes

(w.r.t ground)

Two emitter biased circuits when connected in the given

manner, work like a differential amplifier

+𝑉𝐢𝐢 and βˆ’π‘‰πΈπΈ are made common

Both emitters are connected

𝑅𝐸1 βˆ₯ 𝑅𝐸2 is replaced by 𝑅𝐸

Inputs 𝑉1& 𝑉2 are applied at base of

𝑄1 & 𝑄2

Output voltage is taken b/w

collectors

𝑅𝐢1 = 𝑅𝐢2 = 𝑅𝐢

Ideally, when 𝑉1= 𝑉2 output voltage = 0

If 𝑉1 > 𝑉2 or 𝑉2> 𝑉1, output voltage with a polarity appears.

DIFFERENTIAL AMPLIFIER CONFIGURATIONS

Based on the NUMBER of Input signals and the WAY an Output voltage

is measured, we have the following configurations

Dual Input, Balanced Output differential amplifier (DIBO)

Dual Input, Unbalanced Output differential amplifier (DIUO)

Single Input, Balanced Output differential amplifier (SIBO)

Single Input, Unbalanced Output differential amplifier (SIUO)

DIBO

2 Inputs

Output measured

b/w collectors

DIUO

2 Inputs

Output measured b/w

one collector & ground

SIBO

1 Input

Output measured

b/w collectors

SIUO

1 Input

O/p measured b/w one

collector & ground

D.C. ANALYSIS OF A DIBO DIFFERENTIAL AMPLIFIER

To find Operating Points (𝐼𝐢𝑄& 𝑉𝐢𝐸𝑄) , a DC equivalent circuit is drawn by reducing Inputs (𝑉1& 𝑉2) to 0 Applying KVL to Base – Emitter Loop of Q1,

W.K.T, 𝑰𝑩 = π‘°π‘¬πœ·π’…π’„ & 𝑰𝑬 β‰… 𝑰π‘ͺ

𝐼𝐸 = 𝐼𝐢 =𝑉𝐸𝐸 βˆ’ 𝑉𝐡𝐸

2𝑅𝐸 +𝑅𝑆𝛽𝑑𝑐

π‘°π‘©π‘Ήπ‘ΊπŸ + 𝑽𝑩𝑬 + πŸπ‘°π‘¬π‘Ήπ‘¬ = 𝑽𝑬𝑬

𝑉𝐢𝐸𝑄 = 𝑉𝐢 βˆ’ 𝑉𝐸

𝑉𝐢 = 𝑉𝐢𝐢 βˆ’ 𝐼𝐢𝑅𝐢 𝑉𝐸 = βˆ’π‘‰π΅πΈ (π‘Žπ‘ π‘ π‘’π‘šπ‘–π‘›π‘” π‘‘π‘Ÿπ‘œπ‘ π‘Žπ‘π‘Ÿπ‘œπ‘ π‘  𝑅𝑆𝑖𝑠 𝑛𝑒𝑔𝑙𝑖𝑔𝑖𝑏𝑙𝑒)

𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢 + 𝑉𝐡𝐸 βˆ’ 𝐼𝐢𝑅𝐢

𝑰𝑬 = 𝑰π‘ͺ =𝑽𝑬𝑬 βˆ’ 𝑽𝑩𝑬

πŸπ‘Ήπ‘¬

But, 2𝑅𝐸 ≫𝑅𝑆

𝛽𝑑𝑐

PROBLEM

The following specifications are given for a DIBO differential amplifier

𝑅𝐢 = 2.2. π‘˜Ξ©, 𝑅𝐸 = 4.7π‘˜Ξ©, 𝑅𝑖𝑛1 = 𝑅𝑖𝑛2 = 50Ξ©, +𝑉𝑐𝑐= 10𝑉, βˆ’π‘‰πΈπΈ= βˆ’10𝑉,

+𝛽𝑑𝑐= 100, 𝑉𝐡𝐸 = 0.715𝑉. Determine the operating points (𝐼𝐢𝑄 & 𝑉𝐢𝐸𝑄)

of the two transistors

OPERATIONAL AMPLIFIER

SYMBOL: Triangle which points in the direction of signal flow

Op-Amp has five terminals

(i) Positive Supply Voltage Terminal (+𝑉𝐢𝐢 or +V)

(ii) Negative Supply Voltage Terminal (-𝑉𝐸𝐸 or –V)

(iii) Output Terminal

(iv) Inverting input Terminal (marked -)

(v) Non-Inverting input Terminal (marked +)

Input at inverting terminal results in opposite polarity (anti phase)

output

Input at non-inverting terminal results in same polarity output

(in phase) output

Power Supply: Dual balanced Power Supply (typically Β± 15V or

Β±9V, Β±12V, Β±22V etc… )

DUAL SUPPLY: 2 DC supply voltages whose mid point is ground

BALANCED: Voltages of +𝑉𝐢𝐢 and -𝑉𝐸𝐸 are same in magnitude

Ideal Op-Amp is basically an amplifier that amplifies

difference between two input signals (Differential Amplifier in

its basic form)

Ideal Differential Amplifier - Amplifies difference between two

input voltage signals

Ideally, 𝑉0 ∝ (𝑉1 βˆ’ 𝑉2)

DIFFERENTIAL GAIN

π‘½πŸŽ = 𝑨𝒅(π‘½πŸ βˆ’ π‘½πŸ)

𝑉0 = 𝐴𝑑𝑉𝑑

𝐴𝑑 : Differential Gain ; Constant of proportionality

𝑉𝑑 : Difference Voltage (𝑉1 βˆ’ 𝑉2)

Differential Gain may be expressed as

𝐴𝑑 =𝑉0𝑉𝑑

𝑨𝒅(𝒅𝑩) = 𝟐𝟎 π₯π¨π πŸπŸŽπ‘¨π’…

COMMON MODE GAIN

Ideally, if 𝑉1 = 𝑉2, then 𝑉0 = 𝐴𝑑(𝑉1 βˆ’ 𝑉2) should be 0

Practically, common mode signal 𝑉𝑐 is also present

𝑽𝒄 =π‘½πŸ + π‘½πŸ

𝟐

Gain with which it amplifies common mode signal to produce output is

called common mode gain

π‘½πŸŽ = 𝑨𝒄𝑽𝒄

Total o/p of any Differential Amplifier

π‘½πŸŽ = 𝑨𝒄𝑽𝒄 + 𝑨𝒅𝑽𝒅

IDEAL DIFFERENTIAL AMPLIFIER: Infinite 𝐴𝑑 and Zero 𝐴𝑐

CMRR (Common Mode Rejection Ratio)

Common Mode Configuration: The common mode signal is interference, static and other kinds of undesirable pickup etc. common to both input terminals of OPAMP - should be rejected!

Ability to reject common mode signal is expressed by a ratio called

common mode rejection ratio (CMRR, 𝜌)

π‘ͺ𝑴𝑹𝑹 = 𝝆 =𝑨𝒅

𝑨𝒄

π‘ͺ𝑴𝑹𝑹 𝒅𝑩 = 𝟐𝟎 π’π’π’ˆπ‘¨π’…

𝑨𝒄

Ideally, CMRR should be infinite (practically a large value)

IDEAL OP-AMP Characteristics

Ideal Op-Amp: 2 i/p signals 𝑉1 π‘Žπ‘›π‘‘ 𝑉2 applied at non-inverting and

inverting terminals

Infinite Input Impedance: 𝐼1 = 𝐼2 = 0;

Any source can drive it and there is no loading on driver stage

Infinite Gain and hence differential input 𝑉𝑑 = 𝑉1 βˆ’ 𝑉2 = 0 for finite

voltage 𝑉0

Zero Output Impedance : Output voltage 𝑉0 is independent of current

drawn from o/p terminals

o/p can drive infinite number of other circuits.

The various characteristics of an Ideal Op-Amp are

Infinite Voltage Gain

Infinite Input Impedance

Zero Output Impedance

Zero Offset Voltage

Infinite Bandwidth

Infinite CMRR

Infinite Slew Rate

No effect of Temperature

Power Supply Rejection Ratio

Infinite Voltage Gain (𝐴𝑂𝐿): Differential Open Loop Gain and is

infinite for an ideal Op-Amp.

Infinite Input Impedance (𝑅𝑖𝑛): Infinite for ideal Op-Amp and

ensures that no current flows into an ideal Op-Amp

Zero Output Impedance (𝑅𝑂): Zero for an ideal Op-Amp and ensures

that o/p voltage of an Op-Amp remains the same irrespective of

the value of the load resistance connected

Zero Offset Voltage: Presence of a small output voltage even if

𝑉1 βˆ’ 𝑉2 = 0 is called β€˜Offset Voltage’ - Zero for an Ideal Op-Amp

Ensures that output is zero for zero input signal

Infinite Bandwidth:

Bandwidth: Range of frequency over which satisfactory amplifier performance

is obtained

Infinite Bandwidth implies Operating frequency range is 0 to ∞

Ensures that gain of Op-Amp will be constant over freq. range from DC

frequency (0) to infinite frequency

Amplify AC as well as DC

Infinite CMRR: Infinite for ideal Op-Amp and ensures Zero Noise output voltage

( 𝐴𝐢 = 0)

Infinite Slew Rate:

Slew Rate: Maximum rate of change of output voltage with time - 𝑉 πœ‡π‘ 

𝑆𝑙𝑒𝑀 π‘…π‘Žπ‘‘π‘’ 𝑆 =𝑑𝑉0𝑑𝑑

(π‘šπ‘Žπ‘₯π‘–π‘šπ‘’π‘š)

Infinite Slew Rate implies changes in the output voltage occurs simultaneously

with changes in the input voltage. (e.g. Step Input)

No effect of temperature: Characteristics of an op-amp does not

change with temperature

Power Supply Rejection Ratio (PSRR): This is defined as ratio of

change in input offset voltage due to changes in supply voltage

producing it, keeping other power supply voltage constant (Power

Supply Sensitivity)

If 𝑉𝐸𝐸 is constant and due to change in 𝑉𝐢𝐢, there is change in

input offset voltage, then PSRR is expressed as,

𝑃𝑆𝑅𝑅 =βˆ†π‘‰π‘–π‘œπ‘ βˆ†π‘‰πΆπΆ

(π‘šπ‘‰π‘‰ π‘œπ‘Ÿ

πœ‡π‘‰π‘‰ )

Similarly,

𝑃𝑆𝑅𝑅 =βˆ†π‘‰π‘–π‘œπ‘ βˆ†π‘‰πΈπΈ

Ideal Voltage Transfer Curve

Voltage transfer curve: π‘½πŸŽ plotted against 𝑽𝒅 assuming constant gain –

TRANSFER CHARACTERISTICS

𝑉0 is proportional to 𝑉𝑑 only up to positive and negative saturation

voltages of Op-Amp & remains constant later

Practically saturation voltages are slightly less than + 𝑉𝐢𝐢 and - 𝑉𝐸𝐸

BLOCK DIAGRAM OF AN OPAMP

INPUT STAGE

INTERMEDIATE STAGE

LEVEL SHIFTING STAGE

OUTPUT STAGE

INPUT STAGE

A β€˜DIBO’ differential amplifier satisfies all requirements and is most commonly used as input stage

Voltage Gain

Constant Current

High Input Impedance

2 Terminals

Small Input Offset voltage

Small Input Offset current

High CMRR

CONSTANT CURRENT SOURCE – Provides high emitter resistance to basic circuit,

eliminates changes due to common mode signals (improves CMRR of circuit)

INPUT STAGE WITH CONSTANT CURRENT CIRCUIT

LEVEL SHIFTING STAGE

Direct Coupling: Stage by stage DC level increases well above ground potential - β€˜May drive transistors into saturation, cause distortion’

An Emitter Follower (Common Collector) with a voltage divider circuit is used in STAGE 3

High Input Impedance: Also prevents loading of gain stage

Low Output Impedance: Easily drives o/p stage

Level Shifter: Shifts DC level at o/p of Stage 2

downwards to 0v

Buffer: Isolates high gain stages from o/p stage

π‘½πŸŽ = π‘½π’Šπ’ βˆ’ 𝑽𝑩𝑬

π‘½πŸŽ βˆ’ π‘½π’Šπ’ = βˆ’π‘½π‘©π‘¬ ;

𝑼𝒔𝒖𝒂𝒍 π‘Ίπ’‰π’Šπ’‡π’• π’π’ƒπ’•π’‚π’Šπ’π’†π’… = 𝟎. πŸ•π‘½

OUTPUT STAGE

Supplies load and low o/p impedance

Large o/p voltage swing capability

Low Output Impedance

Low power dissipation

Short circuit protection

Class B push-pull amplifier may be used - Emitter Follower with

complementary transistors

Limitation: As long as 𝑉𝑖𝑛 < 𝑉𝐡𝐸, output voltage remains 0 - causes

β€˜Crossover Distortion’

Diode biasing voltage causes both transistors to slightly conduct even

when no input signal is present

About 24 Transistors, few resistors, only 1 Capacitor, 2 power supplies and short circuit protection

EQUIVALENT CIRCUIT OF A PRACTICAL OPAMP

Op-Amp parameters are represented in terms of physical components for purpose of Analysis

π‘½πŸŽ = 𝑨𝑢𝑳𝑽𝒅 = π‘½πŸ βˆ’ π‘½πŸ

𝑨𝑢𝑳 - Open Loop Voltage Gain

𝑽𝒅 = Difference Voltage

π‘½πŸ - Non –Inverting voltage w.r.t. ground

π‘½πŸ - Inverting input voltage w.r.t ground

π‘Ήπ’Šπ’ - Input Resistance of Op-Amp

𝑹𝒐 - Output Resistance of Op-Amp

𝑨𝑢𝑳𝑽𝒅 - Thevenin’s Equivalent voltage source 𝑹𝒐 - Thevenin’s Equivalent resistance

PRACTICAL OP-AMP CHARACTERISTICS

OPEN LOOP GAIN: Voltage gain of op-amp without feedback (several thousands)

INPUT IMPEDANCE: Finite (>1MΩ and may be increased to several M𝜴 if FETs are

used in input stage)

OUTPUT IMPEDANCE: Finite (few 100 Ξ© and may be reduced to 1 - 2 Ξ© using

negative feedback)

BANDWIDTH: Finite and small in O.L. configuration (may be increased to a suitable

value by using a negative feedback)

INPUT OFFSET VOLTAGE: A small non-zero o/p voltage is present even if both i/p

terminals are grounded (ideally 0)

The D.C. voltage applied to a particular terminal that makes o/p voltage 0 when

other terminal is grounded is called Input Offset Voltage π‘‰π‘–π‘œπ‘ 

Voltage, terminal, polarity etc specified by manufacturer

INPUT BIAS CURRENT: Practical Op-Amps have some current flowing into

the input terminals (10βˆ’6 βˆ’ 10βˆ’14𝐴)

Due to improper matching of transistors, I/p terminals (base terminals

of 2 transistors) conduct small amount of d.c. currents known as bias

currents (𝐼𝑏1π‘Žπ‘›π‘‘πΌπ‘2)

Manufacturers specify average bias current 𝐼𝑏

𝑰𝒃 =π‘°π’ƒπŸ + π‘°π’ƒπŸ

𝟐

Transistors of the Differential Amplifier (used as i/p stages) must be

biased correctly

INPUT OFFSET CURRENT: Difference in magnitudes of 𝐼𝑏1 and 𝐼𝑏2 is called Input Offset Current

π‘°π’Šπ’π’” = π‘°π’ƒπŸ βˆ’ π‘°π’ƒπŸ

Magnitude: Small (20 – 60 nA) when input Vg = 0

QUESTIONS

If base currents for emitter coupled transistor of D.A. are 18πœ‡π΄

and 22πœ‡π΄, find Input bias current and Input Offset current

For a particular op-amp input offset current is 20nA while input

bias current is 60nA. Calculate values of two input bias

currents.

PSRR (POWER SUPPLY REJECTION RATIO): Change in offset voltage due

to change in supply producing it

SLEW RATE: Max rate of change of output voltage with time

𝑺 =π’…π‘½πŸŽ

𝒅𝒕

𝑽𝑬𝑬 const.,

𝑷𝑺𝑹𝑹 =βˆ†π‘½π’Šπ’π’”

βˆ†π‘½π‘ͺπ‘ͺ

𝑽π‘ͺπ‘ͺ const.,

𝑷𝑺𝑹𝑹 =βˆ†π‘½π’Šπ’π’”

βˆ†π‘½π‘¬π‘¬

Typically 30πœ‡π‘‰/𝑉 for IC 741

Sq. wave is applied, β€˜F’ is increased

till o/p is distorted and observed

Assume voltage rises from -6 to 6 in 24πœ‡s,

𝑆 =6 βˆ’ (βˆ’6)

24= 0.5𝑉/πœ‡s

Ideally it should be infinite!

When a high frequency large amplitude signal is given, internal capacitor

voltage cannot change simultaneously

If max internal charging current is known, S is also given by

𝑺 =π‘°π’Žπ’‚π’™

π‘ͺ

FACTORS AFFECTING SLEW RATE

Charging rate of capacitor

Current limiting & saturation of

internal stages

𝒅𝑽π‘ͺ

𝒅𝒕=

𝑰

π‘ͺ;

Small Capacitor

Large Charging Current High Charging Rate

SLEW RATE EQUATION Consider a sinusoidal input signal

𝑉𝑠 = π‘‰π‘šπ‘ π‘–π‘›πœ”π‘‘ Output voltage will also be purely sinusoidal

𝑉0 = π‘‰π‘šπ‘ π‘–π‘›πœ”π‘‘

π’…π‘½πŸŽ

𝒅𝒕= π‘½π’Ž πŽπ’„π’π’”πŽπ’•

π’…π‘½πŸŽ

π’…π’•π’Žπ’‚π’™

= π‘Ίπ’π’†π’˜ 𝑹𝒂𝒕𝒆 = πŽπ‘½π’Ž

MAXIMUM SIGNAL FREQUENCY If the output is distortion free then, max allowable frequency of operation may be determined using slew rate

This frequency is called full power bandwidth of Op-Amp

𝑺 = πŸπ…π’‡π‘½π’Ž ; 𝑽/𝒔

π’‡π’Žπ’‚π’™ =𝑺

πŸπ…π‘½π’Ž

OPEN LOOP OPAMP CONFIGURATION

Configuration in which there is no feedback from output to

input

Output depends upon input but has no effect upon input

3 modes of operation

Differential Amplifier

Inverting Amplifier

Non-Inverting Amplifier

DIFFERENTIAL AMPLIFIER

Open Loop Differential Amplifier

π‘½πŸŽ = 𝑨𝑢𝑳 π‘½πŸ βˆ’ π‘½πŸ

π‘½πŸŽ = 𝑨𝑢𝑳 𝑽𝒅

π‘½π’Šπ’πŸ , π‘½π’Šπ’πŸ - Signal Sources π‘Ήπ‘ΊπŸ , π‘Ήπ‘ΊπŸ - Source Resistances

π‘½πŸπ’‚π’π’… π‘½πŸ can be AC or DC

Output Polarity depends upon polarity of difference voltage

INVERTING AMPLIFIER

Amplifier in which output is inverted - 180Β° phase shift with input

Open Loop Inverting Amplifier

π‘½πŸŽ = 𝑨𝑢𝑳 𝟎 βˆ’ π‘½πŸ

π‘½πŸŽ = 𝑨𝑢𝑳 𝑽𝒅

Input is applied to inverting

terminal

N.I. terminal is grounded

π‘½πŸŽ = βˆ’π‘¨π‘Άπ‘³ π‘½π’Šπ’πŸ

NON INVERTING AMPLIFIER

Amplifier in which output is amplified without any phase shift between

input and output

Open Loop Non Inverting Amplifier

π‘½πŸŽ = 𝑨𝑢𝑳 π‘½πŸ βˆ’ 𝟎

π‘½πŸŽ = 𝑨𝑢𝑳 𝑽𝒅

Input is applied to N.I. terminal

Inverting terminal is grounded

π‘½πŸŽ = 𝑨𝑢𝑳 π‘½π’Šπ’πŸ

Large Gain of Op-Amp - A very small voltage input drives Op-amp

voltage to saturation

Voltage Transfer Curve

In O.L. configuration: Output is at +Vsat or –Vsat

For A.C. inputs: Output may switch between +Vsat or –Vsat

An Op-Amp with 𝑨𝑢𝑳 = 𝟐𝟎𝟎, 𝟎𝟎𝟎 is used as a differential amplifier in open

loop mode. Input voltages are π‘½π’Šπ’πŸ = πŸ–π’Žπ‘½ (π’“π’Žπ’”) and

π‘½π’Šπ’πŸ = πŸπŸ”π’Žπ‘½ (π’“π’Žπ’”) Sketch the input and output waveforms. Op-amp

saturation voltages are Β±13𝑉

CLOSED LOOP OPAMP CONFIGURATION

Configuration in which there is a feedback from output to

input

Feedback resistor β€˜π‘…π‘“β€™connects output to

inverting input terminal

Resulting Gain – β€˜Closed Loop Gain’

For linear applications an Op-Amp is always used with a β€˜Negative Feedback’ –

controls gain

ADVANTAGES OF NEGATIVE FEEDBACK

Reduces gain and makes it controllable

Increases bandwidth (freq. range)

Increases input resistance ; decreases output resistance of op-amp

Reduces effects of temperature, power supply on gain of circuit

Realistic Simplifying Assumptions (Analysis of op-amp circuits)

1. ZERO INPUT CURRENT: Current drawn by either of input terminals is β€˜zero’ (practically πœ‡A or nA)

2. VIRTUAL GROUND: Differential input voltage β€˜π‘‰π‘‘β€™ is essentially zero

Under linear range of operation there is virtually a β€˜short circuit’ between the two input terminals (in the sense their voltages are same)

e.g. If N.I. terminal is grounded, by concept of virtual ground, inverting terminal is also at ground potential

𝐴𝑠 π‘”π‘Žπ‘–π‘› 𝐴𝑂𝐿 β†’ ∞ π‘‘π‘–π‘“π‘“π‘’π‘Ÿπ‘’π‘›π‘π‘’ π‘£π‘œπ‘™π‘‘π‘Žπ‘”π‘’ 𝑉𝑑 β†’ 0 𝑽𝒅 =π‘½πŸŽ

𝑨𝑢𝑳

BASIC LINEAR APPLICATIONS

Linear Application: Output Voltage varies linearly with respect to

input.

Negative feedback is the base of linear Applications

Realistic Assumptions may be used for analysis

3 Basic Configurations

Inverting Amplifier

Non Inverting Amplifier

Voltage Follower

CLOSED LOOP INVERTING AMPLIFIER

Phase Shift of 180Β° between input and amplified output

β€’ *DERIVATION*

Expression for Closed Loop Gain

𝑨π‘ͺ𝑳 =π‘½πŸŽ

π‘½π’Šπ’= βˆ’

𝑹𝒇

π‘ΉπŸ

A sine wave of 0.5V peak voltage is applied to an inverting

amplifier using 𝑅1 = 10π‘˜Ξ© and 𝑅𝑓 = 50π‘˜Ξ© . Supply voltage used is

Β± 12𝑉. Determine the output and sketch waveform.

If the amplitude of sine wave is now increased to 5V, what will be

the output?

CLOSED LOOP NON-INVERTING AMPLIFIER

Amplifies the input without any phase shift between input and

output

Expression for Closed Loop Gain

*DERIVATION*

𝑨π‘ͺ𝑳 =π‘½πŸŽ

π‘½π’Šπ’= 𝟏 +

𝑹𝒇

π‘ΉπŸ

QUESTION

For the op-amp configuration gain required is 61. Determine appropriate

value of feedback resistance 𝑅𝑓

VOLTAGE FOLLOWER

A circuit in which output voltage follows the input voltage is called

a voltage follower circuit

Node B is at potential 𝑉𝑖𝑛. Node A is also at same same potential 𝑉𝑖𝑛

(Virtual Ground)

𝑽𝑨 = 𝑽𝑩 = π‘½π’Šπ’

Node A is directly connected to output

π‘½πŸŽ = 𝑽𝑨 = π‘½π’Šπ’

Voltage Gain here is unity

Also called source follower, unity gain amplifier, buffer amplifier,

isolation amplifier

ACTIVITY: Find out advantages/applications of a voltage follower circuit

PRACTICAL INVERTING AMPLIFIER

Input Resistance is less than infinity ; Open Loop voltage gain is less than infinity ;

Output resistance is not 0

𝑨π‘ͺ𝑳 = βˆ’π‘¨π‘Άπ‘³ 𝑹𝒇

π‘ΉπŸ + 𝑹𝒇 + π‘ΉπŸπ‘¨π‘Άπ‘³

*DERIVATION*

CLOSED LOOP VOLTAGE GAIN (𝑨π‘ͺ𝑳)

PARAMETERS

Closed Loop Voltage Gain (𝑨π‘ͺ𝑳)

Input Resistance with Feedback (𝑹𝑰𝑡𝑭)

Output Resistance with Feedback (π‘ΉπŸŽπ‘­)

BLOCK DIAGRAM OF PRACTICAL INVERTING AMPLIFIER

A – Forward Path Gain

𝛽 – Feedback Path Gain

K – Attenuation Factor

𝑨π‘ͺ𝑳 =π‘½πŸŽ

π‘½π’Šπ’= βˆ’

𝑨𝑲

𝟏 + 𝑩𝑨

𝑨π‘ͺ𝑳 = βˆ’

𝑨𝑢𝑳

𝑹𝒇

(π‘ΉπŸ+𝑹𝒇)

𝟏 +(π‘ΉπŸ)

(π‘ΉπŸ+𝑹𝒇)𝑨𝑢𝑳

We observe that

A : 𝑨𝑢𝑳 - Forward Path Gain

𝜷 : (π‘ΉπŸ)

(π‘ΉπŸ+𝑹𝒇) - Feedback Path Gain

K : 𝑹𝒇

(π‘ΉπŸ+𝑹𝒇) - Attenuation Factor

*DERIVATION*

MILLER’S THEOREM / MILLER’S THEOREM FOR VOLTAGES

In a linear circuit, if there exists a branch with impedance β€˜Z’ connecting

two nodes with nodal voltages V1 and V2, then we can replace this

branch by 2 branches connecting the corresponding nodes to ground by 2

impedances Z1 and Z2

Mainly used for analysis / simplification

𝑍1 =𝑍

1 βˆ’ 𝐾 𝑍2 =

𝐾𝑍

𝐾 βˆ’ 1 𝐾 =

𝑉2𝑉1

= 𝑂𝑝𝑒𝑛 πΏπ‘œπ‘œπ‘ πΊπ‘Žπ‘–π‘›

Feedback Resistor = 𝑹𝒇

𝑍1 =𝑍

1 βˆ’ 𝐾

𝑍2 =𝐾𝑍

𝐾 βˆ’ 1

=𝑅𝑓

1 + 𝐴𝑂𝐿

=𝑅𝑓𝐴𝑂𝐿

1 + 𝐴𝑂𝐿

Millerized Resistance

𝐾 = 𝑂. 𝐿. πΊπ‘Žπ‘–π‘› = βˆ’π΄π‘‚πΏ

INPUT RESISTANCE WITH FEEDBACK (π‘Ήπ’Šπ’π‘­)

To find Input Resistance with feedback, split 𝑅𝑓 into its Miller Components

π‘Ήπ’Šπ’π‘­ = π‘ΉπŸ +π‘Ήπ’‡π‘Ήπ’Šπ’

𝑹𝒇 + π‘Ήπ’Šπ’ + π‘¨π‘Άπ‘³π‘Ήπ’Šπ’

π‘Ήπ’Šπ’π‘­ = π‘ΉπŸ (π’Šπ’…π’†π’‚π’π’π’š)

π‘Ήπ’Šπ’π‘­ = π‘ΉπŸ + [𝑹𝒇

𝟏 + 𝑨𝑢𝑳βˆ₯ π‘Ήπ’Šπ’]

THEVENIN’S THEOREM

Any circuit made up of resistors and sources, viewed from two terminals of that circuit, is equivalent to a VOLTAGE SOURCE in SERIES with a RESISTANCE, or to

a CURRENT SOURCE in PARALLEL with a RESISTANCE

VOLTAGE SOURCE = Open Circuit Voltage of the circuit

CURRENT SOURCE = Short Circuit Current of the circuit

RESISTANCE = Equivalent Resistance of the circuit

NOTE:

Independent source is set equal to zero, & equivalent resistance is found

Dependent sources are kept as it is & equivalent resistance is found

vTH

+

-

RTH A

B

~Any circuit

made up of

resistors and

sources

A

B

A

B

~ iN

RN

OUTPUT RESISTANCE WITH FEEDBACK (𝑹𝑢𝑭)

To find Output Resistance with feedback, an equivalent circuit using is found

using Thevenin’s Theorem

Dependent source 𝐴𝑂𝐿𝑉𝑑 is kept as it is

Independent Source 𝑉𝑖𝑛 is made 0

π‘ΉπŸŽπ‘­ =π‘ΉπŸŽ

𝟏 + π‘¨π‘Άπ‘³πœ·

*DERIVATION*

𝑹𝑢𝑭 = π‘ΉπŸŽ (π’Šπ’…π’†π’‚π’π’π’š)

Feedback reduces output resistance

Output Resistance is 𝟏

𝟏+π‘¨π‘Άπ‘³πœ· times that of

ideal o/p Resistance

For a practical Inverting Amplifier, values of 𝑅1π‘Žπ‘›π‘‘ 𝑅𝑓 are 470𝛺

and 4.7 k𝛺. Various specs. of the op-amp are

(a) Open loop Gain = 2 x 105

(b) Input resistance = 2M 𝛺

(c) Output Resistance = 75 𝛺

(d) Supply = Β±15V

Calculate closed loop voltage gain, input resistance, output

resistance

PRACTICAL NON-INVERTING AMPLIFIER

Difference voltage is the difference between INPUT voltage and FEEDBACK

voltage

*DERIVATION*

CLOSED LOOP VOLTAGE GAIN (𝑨π‘ͺ𝑳)

𝑨π‘ͺ𝑳 =π‘½πŸŽ

π‘½π’Šπ’=

𝑨𝑢𝑳 π‘ΉπŸ + 𝑹𝒇

π‘ΉπŸ +𝑹𝒇 + π‘¨π‘Άπ‘³π‘ΉπŸ

𝑨π‘ͺ𝑳 = 𝟏 +𝑹𝒇

π‘ΉπŸ (π’Šπ’…π’†π’‚π’π’π’š!)

BLOCK DIAGRAM OF PRACTICAL NON INVERTING AMPLIFIER

A – Forward Path Gain

𝛽 – Feedback Path Gain

𝑨π‘ͺ𝑳 =π‘½πŸŽ

π‘½π’Šπ’=

𝑨

𝟏 + 𝑩𝑨

𝑨π‘ͺ𝑳 = βˆ’π‘¨π‘Άπ‘³

𝟏 +(π‘ΉπŸ)

(π‘ΉπŸ+𝑹𝒇)𝑨𝑢𝑳

We observe that

A : 𝑨𝑢𝑳 - Forward Path Gain

𝜷 : (π‘ΉπŸ)

(π‘ΉπŸ+𝑹𝒇) - Feedback Path Gain

*DERIVATION*

INPUT RESISTANCE WITH FEEDBACK (π‘Ήπ’Šπ’π‘­)

π‘Ήπ’Šπ’π‘­ = π‘Ήπ’Šπ’ 𝟏 + π‘¨π‘Άπ‘³πœ·

𝑅𝑖𝑛𝐹 = 𝑅𝑖𝑛 (π‘–π‘‘π‘’π‘Žπ‘™)

π‘Ήπ’Šπ’π’‡ =π‘½π’Šπ’

π‘°π’Šπ’

𝐼𝑖𝑛 =𝑉𝑑𝑅𝑖𝑛

𝑉0 = 𝐴𝑂𝐿𝑉𝑑

π‘°π’Šπ’ =π‘½πŸŽ 𝑨𝑢𝑳

π‘Ήπ’Šπ’

𝑉0𝑉𝑖𝑛

=𝐴𝑂𝐿

1 + 𝐴𝑂𝐿𝛽

Defined as ratio of input voltage 𝑉𝑖𝑛 and input current 𝐼𝑖𝑛

π‘½π’Šπ’ =π‘½πŸŽ(𝟏 + π‘¨π‘Άπ‘³πœ·)

𝑨𝑢𝑳

Substituting all the values,

OUTPUT RESISTANCE WITH FEEDBACK (𝑹𝑢𝑭)

To find Output Resistance with feedback, an equivalent circuit using is found

using Thevenin’s Theorem

Dependent source 𝐴𝑂𝐿𝑉𝑑 is kept as it is

Independent Source 𝑉𝑖𝑛 is made 0

π‘ΉπŸŽπ‘­ =π‘ΉπŸŽ

𝟏 + π‘¨π‘Άπ‘³πœ·

*DERIVATION*

𝑹𝑢𝑭 = π‘ΉπŸŽ (π’Šπ’…π’†π’‚π’π’π’š)

For a non-inverting amplifier the values of 𝑅1π‘Žπ‘›π‘‘ 𝑅𝑓 are

1k𝛺 and 10k𝛺 respectively. Various op-amp parameters

are,

(a) Input resistance = 2M 𝛺

(b) Output Resistance = 75 𝛺

(c) Open Loop Gain = 2 x 105

Calculate closed loop gain, input resistance, output

resistance

OPERATIONAL AMPLIFIER – PIN DETAILS

Circuit Symbol and Terminals

Triangle – Direction of flow

PIN (Part Identification Number)

8-pin mini DIP

Fabricated on a tiny silicon chip

Metal Can package:

Silicon chip is bonded to bottom metal

Available in 3, 5, 8, 10 and 12 leads configuration

Tab identifies pin 8

14 pin DIP /8 pin DIP

Available in plastic/ceramic case

Notch/Dot identifies pin 1.

Terminals are numbered counter clockwise

Identification Code

Letter Prefix: Manufacturer

Circuit Designation: Type of op-amp and temperature range

C : Commercial 0 to 70℃

I : Industrial -25 to 80℃

M : Military -55 to 125℃

Letter Suffix: Package Style that houses the Op-Amp

D: Plastic dual-in-line for surface mounting on PC board

J: Ceramic dual-in-line

N,P: Plastic dual-in-line for insertion into sockets

e.g. LM 741C N