Upload
rares-botezatu
View
219
Download
0
Embed Size (px)
Citation preview
8/13/2019 PC curs4
1/27
Protocoale de ComunicatiiCURS 4
SPI
1
8/13/2019 PC curs4
2/27
SPI-BUS
2
8/13/2019 PC curs4
3/27
SPI-BUS
3
SPI stands for Serial Peripheral Interface.
SPI is a synchronous protocol that allows a master device toinitiate communication with a slave device.
Data is exchanged between these devices. We will look at
this more in detail as we progress though this tutorial. SPI is implemented in the PICmicro MCU by a hardware
module called the Synchronous Serial Port or the MasterSynchronous Serial Port.
This module is built into many different PICmicro devices.
It allows serial communication between two or moredevices at a high speed and is reasonably easy toimplement.
8/13/2019 PC curs4
4/27
SPI-BUS
4
8/13/2019 PC curs4
5/27
SPI-BUS
5
8/13/2019 PC curs4
6/27
SPI-BUS
6
8/13/2019 PC curs4
7/27
SPI-BUS
7
8/13/2019 PC curs4
8/27
SPI-BUS
8
SPI is a Data Exchange protocol. As data is being clocked out, newdata is also being clocked in.
When one transmits data, the incoming data must be read beforeattempting to transmit again. If the incoming data is not read, thenthe data will be lost and the SPI module may become disabled as a
result. Always read the data after a transfer has taken place, even if the
data has no use in your application.
Data is always exchanged between devices. No device can just bea transmitter or just a receiver in SPI.
Each device has two data lines, one for input and one for output. These data exchanges are controlled by the clock line, SCK, which is
controlled by the master device.
8/13/2019 PC curs4
9/27
SPI-BUS
9
8/13/2019 PC curs4
10/27
SPI-BUS
10
Often a slave select signal will control when a device is accessed.
This signal must be used for when more than one slave exists in asystem, but can be optional when only one slave exists in thecircuit.
As a general rule, it should be used.
This signal is known as the SS signal and stands for Slave Select. Itindicates to a slave that the master wishes to start an SPI dataexchange between that slave device and itself.
The signal is most often active low, so a low on this line will indicatethe SPI is active, while a high will signal inactivity.
It is often used to improve noise immunity of the system.
Its function is to reset the SPI slave so that it is ready to receive thenext byte.
8/13/2019 PC curs4
11/27
SPI-BUS
11
8/13/2019 PC curs4
12/27
SPI-BUS
12
8/13/2019 PC curs4
13/27
SPI-BUS
13
8/13/2019 PC curs4
14/27
SPI-BUS
14
8/13/2019 PC curs4
15/27
SPI-BUS
15
8/13/2019 PC curs4
16/27
SPI-BUS
16
8/13/2019 PC curs4
17/27
SPI-BUS
17
8/13/2019 PC curs4
18/27
SPI-BUS
18
8/13/2019 PC curs4
19/27
SPI-BUS
19
8/13/2019 PC curs4
20/27
SPI-BUS
20
SPI creates a data loop between two devices.
Data leaving the master exits on the SDO (serial data output) line.
Data entering the master enters on the serial data input, SDI line.
A clock (SCK), is generated by the master device. It controls when and howquickly data is exchanged between the two devices.
SS, allows a master device to control when a particular slave is beingaddressed.
This allows the possibility of having more than one slave and simplifies thecommunications.
When the SS signal goes low at a slave device, only that slave is accessedby SPI.
SSPSR is the shift register for the SPI module. It shifts data in and out ofthe device. The data travels in a loop to the next shift register.
The data is shifted out the SDO pin of one device and into the SDI pin ofthe other.
8/13/2019 PC curs4
21/27
SPI-BUS
21
8/13/2019 PC curs4
22/27
SPI-BUS
22
8/13/2019 PC curs4
23/27
SPI-BUS
23
8/13/2019 PC curs4
24/27
SPI-BUS
24
8/13/2019 PC curs4
25/27
SPI-BUS
25
8/13/2019 PC curs4
26/27
SPI-BUS
26
8/13/2019 PC curs4
27/27
SPI-BUS
27