40
Ex. No. 1 Date: R, R-C AND UJT TRIGGERING CIRCUITS Aim: To study the operation of resistance, resistance capa citance and UJT triggering circuits of SCR APPARATUS REQUIRED: Theory: Resista!e Tr i""eri": Resistance trigger circuits are the simplest & most economical method. During the  positive half cycle of the input voltage, SCR become forard biased but it ill not conduct until its gate current e!ceeds "gmin . Diode D allos the flo of current during positive half cycle only. R# is the variable resistance & R is the stabili$ing resistance .R% is used to limit the gate current. During the positive half cycle current "g flos. "g increases and hen "g "gmin the SCR turns '( .The firing angle can be varied from ) * +) by varying the resistance R. Pro!e#$re: R %iri" %. Connections are made as shon in fig. #. Sitch on the poer supply to the CR'. -. Set the CR' to the line trigger mode. . Sitch on poer supply to the SCR trainer. /. 'bserve the aveform on the CR'. 0. Study the aveforms for various firing angle b y varying the pot in R trigger circuit. 1. 'bserve the range of firing ang le control. 2. 3or any one particular firing angle plot the aveforms of the ac voltage, voltage across the load and the SCR. +. 4easure the average dc voltage across the load and rms value of the ac input voltage using a digital multimeter. %). Calculate the dc output voltage using the e5uation. 6 7 6r ms value of ac input voltage 6m 7 89#6rms.:nd compare the measured value. %

Pe Lab Manual EEE 6TH SEM R-2013

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Ex. No. 1 Date:

R, R-C AND UJT TRIGGERING CIRCUITSAim:

To study the operation of resistance, resistance capacitance and UJT triggering circuits of

SCR

APPARATUS REQUIRED:

Theory: Resista!e Tri""eri":

Resistance trigger circuits are the simplest & most economical method. During the

positive half cycle of the input voltage, SCR become forard biased but it ill not conduct until

its gate current e!ceeds "gmin . Diode D allos the flo of current during positive half cycle

only. R# is the variable resistance & R is the stabili$ing resistance .R% is used to limit the gate

current. During the positive half cycle current "g flos. "g increases and hen "g "gmin the

SCR turns '( .The firing angle can be varied from ) * +) by varying the resistance R.

Pro!e#$re: R %iri"

%. Connections are made as shon in fig.

#. Sitch on the poer supply to the CR'.

-. Set the CR' to the line trigger mode.. Sitch on poer supply to the SCR trainer.

/. 'bserve the aveform on the CR'.

0. Study the aveforms for various firing angle by varying the pot in R trigger circuit.

1. 'bserve the range of firing angle control.

2. 3or any one particular firing angle plot the aveforms of the ac voltage, voltage across the

load and the SCR.

+. 4easure the average dc voltage across the load and rms value of the ac input voltage using a

digital multimeter.

%). Calculate the dc output voltage using the e5uation.

6 7 6rms value of ac input voltage

6m 7 89#6rms.:nd compare the measured value.

%

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Cir!$it Dia"ram: R & Tri""eri" Cir!$it:

'o#e( Gra)h: R & Tri""eri" Cir!$it:

#

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Pro!e#$re: RC %IRING:

%. Connections are made as shon in fig.

#. Sitch on the poer supply to the CR'.

-. Set the CR' to the line trigger mode.

. Sitch on poer supply to the SCR trainer./. 'bserve the aveform on the CR'.

0. Study the aveforms for various firing angle by varying the pot in R trigger circuit.

1. 'bserve the range of firing angle control. t u t e o f T e c h n o l o g y ;age /-

2. 3or any one particular firing angle plot the aveforms of the ac voltage, voltage across the

load and the SCR.

+. 4easure the average dc voltage across the load and rms value of the ac input voltage using g< a

digital millimeter.

%). Calculate the dc output voltage using the e5uation.

Theory: RC Tri""eri":

=y varying the variable resistance R, the firing angle can be varied from ) *%2) ."n the

negative half cycle the capacitance C charges through the diode D# ith loer plate positive to,

the pea> supply voltage ?ma! .This Capacitor voltage remains constant at until supply voltage

attains $ero value. During the positive half cycle of the input voltage, C begins to charge through

R. @hen the capacitor voltage reaches the minimum gate trigger voltage SCR ill turn on.

Cir!$it Dia"ram: RC Tri""eri" Cir!$it:

-

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'o#e( Gra)h:

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Pro!e#$re: UJT Tri""eri" Cir!$it

%. Connect a & > terminal of UJT triggering circuit to the gate cathode terminals of SCR.#. Aive a # 6 ac supply.

-. 'bserve the aveforms and plot it for one particular firing angle by adBusting the

potentiometer and observe the range over hich firing angle is controllable.. 'bserve that capacitor voltage is set at every half cycle.

Theory: UJT Tri""eri" Cir!$it

: synchroni$ed UJT triggered circuit using an UJT is shon in the figure. Diodes D% to

D rectify ac to dc. Resistor R% loers 6dc to a suitable value for the $ener diode and UJT.

Eener diode E functions to clip the rectified voltage to a standard level, 6$ hich remains

constant e!cept near the 6dc $ero. The voltage 6$ is applied to the charging circuit RC. Current

", charges capacitor c at a rate determined by R voltage across capacitor is mar>ed by 6c

as shon. @hen 6c reaches the uniBunction threshold voltage 6$, the t7=% Bunction of UJT

brea>s don and the capacitor c discharges through the primary of pulse transformer sending a

current C# as shon.

:s the current i# is in the form of pulse, indings of the pulse transformer have pulse

voltages at their secondary terminals. ;ulse at the to secondary indings feeds the same in

phase pulse to to SCRs of a full ave circuits. SCR ith positive anode voltage ould turn

'(. :s soon as the capacitor discharges, it starts to recharge as shon. Rate of rise of capacitor

voltage can be controlled by varying R. The firing angle can be controlled up to above %/)o.

This method of controlling the output poer by varying the charging resistor r is called ramp

control, open loop control ForG manual control.

Cir!$it Dia"ram: UJT Tri""eri" Cir!$it

/

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'o#e( Gra)h:

Ta*$(ar Co($m:

RESU+T:

0

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Ex. No. a Date:

C/ARACTERISTICS 0% SCR

AI':• To obtain 67" characteristics and to find on7state forard resistance of given SCR.

• To determine holding, latching current and brea> over voltage of given SCR.

APPARATUS REQUIRED:• Trainer >it.

• ;atch cards.

• 4ultimeters.

PR0CEDURE:• Connections are made as shon in the circuit diagram.

• Set R% and R# to mid position and 6% and 6# to minimum.

• Set the gate current "A "A% Fsuch that forard brea> over voltage is beteen %/ to #)

6G, by varying R# and 6#.

• Sloly vary 6% in steps of #6 and note don 6:H and ":> at each step till SCR

conducts. F(ote don ma!imum 6:H, hich is forard brea> over voltage Bust before

SCR conductsG.

%INDING +ATC/ING CURRENTI

• ?nsure that the SCR is in the state of conduction.

• Start reducing F6:HG anode voltage in steps of #6 simultaneously chec> the state of

SCR by sitching off gate supply 6#. "f SCR sitches off Bust by removing gate

terminal, and sitches on by connecting gate supply, then the corresponding anodecurrent ": is the latching current F"KG for the SCR.

%INDING /0+DING CURRENTI

• ?nsure that the SCR is in the state of conduction.

• Sitch off the gate supply permanently.

• Start reducing F6:HG anode voltage in steps of #6 simultaneously chec> the state of

SCR. "f SCR sitches off. (ote don the anode current F":G Bust before it drops to $ero,

hich ill be "L.

• Reverse the anode voltage polarity.

• 6ary 6:H in steps of /6 till #/6 and note don 6:H and ": values at each step• ;lot forard and reverse characteristics using the above7tabulated values. 3ind the SCR

forard resistance using the graph.

• Repeat the above procedure for the forard and reverse characteristics of SCR for a gate

current "g "g#.

1

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CIRCUIT DIAGRA':

SCR SpecificationsI

"t FrmsG 7 %0 : 6=' 3orard brea> over voltage"t FrmsG 7 %) : 6=R Reverse brea> over voltage

"t FrmsG 7 %0) : "g Aate current

RESU+T:The values of 6:H and ":H are noted don, plotted and SCR forard resistance is

found. The values obtained are verified.

2

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Ex. No. * Date:

C/ARACTERISTICS 0% TRIAC

AI'I

To determine the characteristics of TR":C.

:PPARATUS REQUIREDI

S.No. APPARATUS RANGE TPEQUANTIT

% TR":C 4odule >it ##) 6 9 / : %

# Regulated ;oer Supply F)7/G 6 %

- Regulated ;oer Supply F)7%/G 6 %

6oltmeter F)7-)G 6 4C %

/ :mmeter F)7-)Gm: 4C %0 :mmeter F)7/)Gm: 4C %

1 Resistor % >M %

2 ;atch Chords %)

PR0CEDURE:

%. 4a>e the connections as per the circuit diagram.

#. Sitch on the supply.

-. Set the gate current at a fi!ed value by varying R;S on the

. gate7 cathode side.

/. "ncrease the voltage applied across anode and corresponding current is noted.

0. The above steps are repeated for different values of " A.

1. Dra the graph beteen anode to cathode voltage F6 :H G and anode

2. current F" :G

+

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TA2U+AR C0+U'N:

S.No.IG =….(mA) IG=….(mA)

VAK (V) IA (mA) VAK (V) IA (mA)

RESULT :

Thus the Characteristics of TRIAC was obtained.

%)

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Ex. No. 3a Date:

C/ARACTERISTICS 0% '0S%ET

AI':

To dra static characteristic of 4'S3?T and hence to determine the output resistance

and Trans conductance.

APPARATUS REQUIRED:

4'S3?T module,

4ultimeters,

;atch chords.

CIRCUIT DIAGRA':

PR0CEDURE:

a Tras4er Chara!teristi!s:

N Connect the circuit as shon in the fig #.% FaG.

N Set 6DS %)6 by varying 6%. Heep R% slightly more than of the total value.

N 6ary 6AS by varying 6# F>eep R# to minimum positionG and note don "DS for every )./6

variation of 6AS till /6 of 6AS.

N 4in 6AS voltage that is re5uired for conduction is OThreshold voltageP F6TLG.

N Repeat the above e!periment for different values of 6DS# %/6.

%%

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* Drai Chara!teristi!s:

5 Rig up the circuit as shon in the fig #.%FaG.

5 :dBust 6A by varying 6# to 6T/.

5 6ary 6DS by varying 6% in steps of )./v and note don "DS FTill "DS is constantG.

N Repeat the above procedure for different values of 6AS# 6T/Q ).% 6.

RESU+TI The transfer characteristics & collector characteristics are obtained and their

respective graphs are plotted and output resistance and Trans conductance are found.

%#

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Ex. No. 3a Date:

C/ARACTERISTICS 0% IG2T

AI':

To dra static characteristic of "A=T and hence to determine the output resistance and

Trans conductance.

APPARATUS REQUIRED:

"A=T module,

4ultimeters,

;atch chords.

CIRCUIT DIAGRA':

PR0CEDURE:

Tras4er Chara!teristi!s:

• Connect the circuit as shon in figure.

• "nitially Heep 6% & 6# to minimum. Set 6%6C?% %)6.

• Sloly vary 6# F6A? G and note don "c and 6A? reading for every )./6. F6FA?G4:

26G

• The minimum gate 6oltage 6A?, hich is re5uired for conduction of "A=T is called

threshold voltage 6 TL.• "f 6A? is less than 6TL, very small lea>age current flos from collector to emitter. "f

6A? is greater than 6TL, then collector current depends on 6C? magnitude.

• Repeat the same for different values of 6A? and dra the graph of 6A? 69S "c.

Co((e!tor Chara!teristi!s:

%-

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• "nitially set 6# to 6A?% /6. F 6TLG

• Sloly vary 6% and note don "c and 6A?. 3or a particular gate voltage there is a pinch

off voltage F6pG beteen collector and emitter.

• "f 6ce is less than 6p the device or>s in constant gain region and "c is directly

proportional to 6ce.• "f 6ce is more than 6p, constant "c flos from the device and this operating region is

called as constant current region.

• Repeat the above for different values of 6A? and note don "c v9s 6ce.

• Dra the graph "c v9s 6A? for different values of 6A?.

TA2U+AR C0+U'N:

Tras4er Chara!teristi!s:

RESU+T:

The transfer characteristics & collector characteristics are obtained and their respective

graphs are plotted. The values of "c, 6A?, 6C? are noted don in tabular columns and verified.

Ex. No. 7 Date:

AC T0 DC /A+% C0NTR0++ED C0N6ERTER

%

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1 Auto

Transformer

230V/0-270V

1 Isolation

Transformer

AI':

To construct a single phase half controlled Converter and plot its output response.

APPARATUS REQUIRED:

S.N0. APPARATUS RANGE TPE QUANTIT

%Lalf controlled Converter

;oer circuit >it%φ, #-)6,%): 7 %

- SCR firing circuit >it %Φ ,#-)6,/: 7 %

"solation Transformer #-)69%%/7//7)7//7

%%/7 %

/ :uto7transformer #-)69)7#1)6, : 7 %

0 Koading Rheostat %))Ω 9 #: 7 %

1 CR' #)4L$ 7 %

2 ;atch chords 7 7 %/

%0R'U+A:

t

3iring angle ) 777777777 ! %2) %)ms

t non7conducting period of thyristor.

6o$t896s1Cos;<=

PR0CEDUREI

%. 4a>e the connections as per the circuit diagram.

#. Heep the multiplication factor of the CR's probe at the ma!imum position.

-. Sitch on the thyristor >it and firing circuit >it.

. Heep the firing circuit >nob at the %2) ° position.

/. 6ary the firing angle in steps.

0. (ote don the voltmeter reading and aveform from the CR'.

1. Sitch off the poer supply and disconnect.

CIRCUIT DIAGRA' :

P

%/

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T1 T

N D1 D

TA2U+AT0R C0+U'N:

S.No. %iri" A"(e De"ree

0$t)$t 6o(ta"e6o 6o(ts

No Co#$!ti"Perio# > T ? Se!

0*ser@e# A"(e 0 De"ree

%0

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'0DE+ GRAP/:

6in

π -π t

6T

t

π #π -π t

RESU+T :

Thus a single7phase half controlled converter as constructed and their 'utput aveforms ere

plotted.

%1

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D

Ex. No. Date:

AC T0 DC %U++ C0NTR0++ED C0N6ERTER

AI':

To construct a single phase fully controlled Converter and plot its response.

APPARATUS REQUIRED:

S.N0 ITE' RANGE T

PE

QUANT

IT% 3ully controlled Converter

;oer circuit >it

%φ, #-)6,%): 7 %

- SCR firing circuit >it %Φ ,#-)6,/: 7 %

"solation Transformer #-)69%%/7//7)7//7

%%/

7 %

/ :uto7transformer #-)69)7#1)6, : 7 %0 Koading Rheostat %))Ω 9 #: 7 %

1 CR' #)4L$ 7 %

2 ;atch chords 7 7 %/

%0R'U+A :

t

3iring angle ) 777777777 ! %2)

%)ms

t non7conducting period of thyristor.

6o$t86sCos;<= Ia@"86a@"<R

PR0CEDURE:

%. 4a>e the connections as per the circuit diagram..

#. Heep the multiplication factor of the CR's probe at the ma!imum position.

-. Sitch on the thyristor >it and firing circuit >it.

. Heep the firing circuit >nob at the %2) ° position.

/. 6ary the firing angle in steps.

0. (ote don the voltmeter reading and aveform from the CR'.

1. Sitch off the poer supply and disconnect.

CIRCUIT DIAGRA' :

%2

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1Auto

Transformer

230V/0-270V

1 -Isolation

Transformer

1:1

TA2U+AR C0+U'N:

S.No.

%iri" a"(e

#e"ree

0$t)$t @o(ta"e

6o @o(ts

No !o#$!ti"

Perio# > t ? se!

0*ser@e# a"(e

o #e"ree

%+

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'0DE+ GRAP/ :

π -π t

6T

t

π #π -π t

RESU+T:

Thus a single7phase fully controlled converter as constructed and their responses ere

plotted.

#)

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Ex. No. B Date:

STEP UP AND STEP D0N '0S%ET 2ASED C/0PPERS

AI':

To construct Step don & Step up 4'S3?T based choppers and to dra its output

response.

APPARATUS REQUIRED:

S.N

0

ITE' RANGE QUANTIT

%Step up & Step don 4'S3?T

based chopper >it

%

# CR' #) 4LE %

- ;atch chords %/

PR0CEDURE STEP UP C/0PPER STEP D0N C/0PPER :

%. "nitially >eep all the sitches in the '33 position

#. "nitially >eep duty cycle ;'T in minimum position

-. Connect banana connector #6 DC source to #6 DC imput.

. Connect the driver pulse Voutput to 4'S3?T input

/. Sitch on the main supply0. Chec> the test point aveforms ith respect to ground.

1. 6ary the duty cyle ;'T and tabulate the Ton, Toff & output voltage

2. Trace the aveforms of 6o 6s & "o

+. Dra the graph for 6o 6s Duty cycle, H

#%

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CIRCUIT DIAGRA' STEP UP C/0PPER :

CIRCUIT DIAGRA' STEP D0N C/0PPER:

TA2U+AR C0+U'N STEP UP C/0PPER:6s 8 6

S.N0 T 0N

se!

T0%%

se!

T

se!

D$ty Ratio, F8T0N < T 6o8F6s6

TA2U+AR C0+U'N STEP D0N C/0PPER:

6s 8 6

S.N0 T 0Nse!

T0%%se!

Tse!

D$ty Ratio, F8T0N < T 6o8F6s6

##

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'0DE+ GRAP/ STEP UP C/0PPER :

#-

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'0DE+ GRAP/ STEP D0N C/0PPER :

RESU+T:

Thus the output response of Step don & Step up 4'S3?T based choppers ere dran.

Ex. No. Date:

IG2T 2ASED SING+E P/ASE P' IN6ERTER

AI':

To obtain Single phase output ave forms for "A=T based ;@4 inverter

APPARATUS REQUIRED:

S.No ITE' RANGE TP QUANTIT

#

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. E % "A=T =ased ;@4 inverter

Hit

##)9%): %

# CR' #)4LE %

- ;atch Chord %)

Koad rheostat /)Ω9/: %

PR0CEDURE:

%. 4a>e the connection as per the circuit diagram.

#. Connect the gating signal from the inverter module.

-. Sitch '( D.C # 6.

. Heep the fre5uency >nob to particulars fre5uency.

/. 'bserve the rectangular and triangular carrier aveforms on the CR'.

0. 'btain the output aveform across the load Rheostat.

#/

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D2

D3

D1

-

+

24V,D.C

Vo

D4

T1

T2

T3

T4

0/A

C1

C2

CIRCUIT DIAGRA':

TA2U+AR C0+U'N:

S.o 0$t)$t @o(ta"e @ Time ms

#0

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t

t

Vref

V!ar

Vo

'0DE+ GRAP/:

RESU+T:

Thus the output aveform for "A=T inverter F;@4G as obtained.

#1

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Ex. No. H Date:

IG2T 2ASED T/REE P/ASE P' IN6ERTER

AI':

To obtain three phase output ave forms for "A=T based ;@4 inverter

APPARATUS REQUIRED:

S.No

.

ITE' RANGE TP

E

QUANTIT

% "A=T =ased ;@4 inverter

Hit

##)9%): %

# CR' #)4LE %

- ;atch Chord %)

Koad rheostat /)Ω9/: %

PR0CEDURE:

%. 4a>e the connection as per the circuit diagram.

#. Connect the gating signal from the inverter module.

-. Sitch '( D.C # 6.

. Heep the fre5uency >nob to particulars fre5uency.

/. 'bserve the input and output aveforms for %2) conduction mode and %#) conduction

mode in the CR'.

0. 'btain the output aveform across the load Rheostat.

CIRCUIT DIAGRA':

#2

K:4;K':D

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TA2U+AR C0+U'N:

S.No. 0$t)$t 6o(ta"e 6 Time ms

'0DE+ GRAP/:

RESU+T:

Thus the output aveform for "A=T inverter F;@4G as obtained.

Ex. No. Date:

#+

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1-P/ASE AC 60+TAGE C0NTR0+ USING TRIACAI':

To study the %7phase :C voltage control using TR":C.

APPARATUS REQUIRED:• Kamp W 0)@

• Resistor 7 %)) 9 %@

• ;otentio meter W %))H

• Capacitor W ).% 3 9 ))6

• Resistor W %H

• D":C W D=-

• TR":C =T %-0

• Unearthed oscilloscope

CIRCUIT DIAGRA':

CIRCUIT 0PERATI0N:%. @hen potentiometer is in minimum position drop across potentiometer is $ero and hence

ma!imum voltage is available across capacitor. This 6c shorts the diac F6c X 6boG and triggers

the triac turning triac to '( W state there lamp glos ith ma!imum intensity.

#. @hen the potentiometer is in ma!imum position voltage drop across potentiometer is

ma!imum. Lence minimum voltage is available across capacitor F6c 4 6boG hence triac to is

not triggered hence lamp doesnot glo.

-. @hen potentiometer is in medium position a small voltage is available across capacitor hencelamp glos ith minimum intensity.

PR0CEDURE:%. Connections are given as per the circuit diagram

#. "nitially potentiometer >ept at minimum position so lap does not glo at this instant.

-. (ote the voltage across the diac and triac.

. Capacitor and potentiometer using multimeter and CR'.

-)

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/. ;otentiometer is no placed at medium and then to minimum position and their voltages ere

noted.

Theory:Triac is a bidirectional thyristor ith three terminals. Triac is the ord derived by

combining the capital letters from the ords TR"ode and :C. "n operation triac is e5uivalent toto SCRs connected in anti7parallel. "t is used e!tensively for the control of poer in ac circuit

as it can conduct in both the direction. "ts three terminals are 4T% Fmain terminal %G, 4T# Fmain

terminal #G and A FgateG.

RESU+T:Thus the operation and performance of the %7phase :C voltage control using D":C and

TR":C.

Ex. No. 1 Date:

-%

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SITC/ED '0DE P0ER C0N6ERTER AI':

To study the sitched mode poer converter using DC to DC converter circuit.

APPARATUS REQUIRED:

CIRCUIT DIAGRA':

2(o!F Dia"ram:

Cir!$it Dia"ram:

a@e %orm:

-#

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Ta*$(atio:

S.No Set 6o(ta"e 6 0N-Time

toKs

P' Si"a(

6o(ta"e@o(ts

D$ty!y!(e D8

ton

T

RESU+T:Thus the operation and performance of the sitched mode poer converter using DC to

DC converter.

--

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Ex. No. 11 Date:

SI'U+ATI0N 0% PE CIRCUITS

AI':To design & simulate the poer electronics circuits using 4at7 Kab softare.

APPARATUS REQUIRED:• 4:T7K:= T''KS

PR0CEDURE:

AC 60+TAGE C0NTR0++ERS:

CIRCUIT DIAGRA':

TA2U+ATI0N:

S.No. Non-Conducting

P!iod (m")

Conducting

P!iod (m")

#i!ing Ang$

(% )

&ut'ut

Vo$tg (V)

-

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'0DE+ GRAP/

-/

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DC to DC C0N6ERTER:

'0DE+ GRAP/:

-0

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SING+E P/ASE SE'I C0N6ERTER:

'0DE+ GRAP/:

-1

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SING+E P/ASE %U++C0N6ERTER:

'0DE+ GRAP/:

-2

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T/REE P/ASE %U++ C0N6ERTER:

'0DE+ GRAP/:

-+

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T/REE P/ASE SE'I C0N6ERTER:

'0DE+ GRAP/: