phd98n03

PHP/PHB/PHD98N03LTN-channel enhancement mode field-effect transistorRev. 02 18 October 2001 Product data

1. DescriptionN-channel logic level field-effect power transistor in a plastic package usingTrenchMOS1 technology.

Product availability:PHP98N03LT in SOT78 (TO-220AB)PHB98N03LT in SOT404 (D2-PAK)PHD98N03LT in SOT428 (D-PAK).

2. Features

n Low on-state resistancen Fast switching.

3. Applicationsn Computer motherboard high frequency DC to DC converters.

4. Pinning information

[1] It is not possible to make connection to pin 2 of the SOT404 and SOT428 packages.

1. TrenchMOS is a trademark of Koniklijke Philips Electronics N.V.

Table 1: Pinning - SOT78, SOT404, SOT428 simplified outline and symbolPin Description Simplified outline Symbol1 gate (g)

SOT78 (TO-220AB) SOT404 (D2-PAK) SOT428 (D-PAK)

2 drain (d) [1]3 source (s)mb mounting base,

connected to drain (d)

MBK1061 2

mb

3

1 3

2

MBK116

mb

MBK091Top view

1 3

mb

2s

d

g

MBB076

Philips Semiconductors PHP/PHB/PHD98N03LTN-channel enhancement mode field-effect transistor

Product data Rev. 02 18 October 2001 2 of 149397 750 08726 Koninklijke Philips Electronics N.V. 2001. All rights reserved.

5. Quick reference data

6. Limiting values

Table 2: Quick reference dataSymbol Parameter Conditions Typ Max UnitVDS drain-source voltage (DC) Tj = 25 to 175 C - 25 VID drain current (DC) Tmb = 25 C; VGS = 5 V - 75 APtot total power dissipation Tmb = 25 C - 111 WTj junction temperature - 175 CRDSon drain-source on-state resistance Tj = 25 C; VGS = 10 V; ID = 25 A 5.2 5.9 m

Tj = 25 C; VGS = 5 V; ID = 25 A 6.2 7.3 m

Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol Parameter Conditions Min Max UnitVDS drain-source voltage (DC) Tj = 25 to 175 C - 25 VVDGR drain-gate voltage (DC) Tj = 25 to 175 C; RGS = 20 k - 25 VVGS gate-source voltage (DC) - 15 VVGSM gate-source voltage tp 50 s; pulsed;

duty cycle 25%; Tj 150 C- 20 V

ID drain current (DC) Tmb = 25 C; VGS = 5 V; Figure 2 and 3 - 75 ATmb = 100 C; VGS = 5 V; Figure 2 - 66 A

IDM peak drain current Tmb = 25 C; pulsed; tp 10 s; Figure 3 - 240 APtot total power dissipation Tmb = 25 C; Figure 1 - 111 WTstg storage temperature 55 +175 CTj operating junction temperature 55 +175 CSource-drain diodeIS source (diode forward) current (DC) Tmb = 25 C - 75 AISM peak source (diode forward) current Tmb = 25 C; pulsed; tp 10 s - 240 A



Fig 1. Normalized total power dissipation as afunction of mounting base temperature.

Fig 2. Normalized continuous drain current as afunction of mounting base temperature.

Tmb = 25 C; IDM is single pulse

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

03aa16

0

40

80

120

0 50 100 150 200Tmb (oC)

Pder(%)

03af00

0

40

80

120

0 50 100 150 200Tmb (C)

Ider (%)

PderPtot

Ptot 25 C( )

---------------------- 100%= IderID

ID 25 C( )

------------------- 100%=

03af02

1

10

102

103

1 10 102VDS (V)

ID(A)

DC

100 ms

10 ms

RDSon = VDS / ID

1 ms

tp = 10 s

100 s



7. Thermal characteristics

7.1 Transient thermal impedance

Table 4: Thermal characteristicsSymbol Parameter Conditions Value UnitRth(j-mb) thermal resistance from junction to mounting

baseFigure 4 1.35 K/W

Rth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/Wmounted on a printed circuit board; minimumfootprint; SOT404 and SOT428 packages

50 K/W

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

03af01

10-3

10-2

10-1

1

10

10-5 10-4 10-3 10-2 10-1 1 10tp (s)

Zth(j-mb)(K/W)

single pulse

= 0.5

0.2

0.1

0.05

0.02

tp

tp

T

P

t

T =



8. Characteristics

Table 5: CharacteristicsTj = 25 C unless otherwise specified.Symbol Parameter Conditions Min Typ Max UnitStatic characteristicsV(BR)DSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V

Tj = 25 C 25 - - VTj = 55 C 22 - - V

VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9Tj = 25 C 1 1.5 2 VTj = 175 C 0.5 - - VTj = 55 C - - 2.3 V

IDSS drain-source leakage current VDS = 25 V; VGS = 0 VTj = 25 C - 0.05 1 ATj = 175 C - - 500 A

IGSS gate-source leakage current VGS = 15 V; VDS = 0 V - 10 100 nARDSon drain-source on-state resistance VGS = 5 V; ID = 25 A; Figure 7 and 8

Tj = 25 C - 6.2 7.3 mTj = 175 C - 10.5 12.4 m

VGS = 10 V; ID = 25 A; Figure 7 and 8Tj = 25 C - 5.2 5.9 m

Dynamic characteristicsQg(tot) total gate charge ID = 50 A; VDD = 15 V; VGS = 5 V; Figure 13 - 40 - nCQgs gate-source charge - 16 - nCQgd gate-drain (Miller) charge - 15 - nCCiss input capacitance VGS = 0 V; VDS = 20 V; f = 1 MHz; Figure 11 - 3000 - pFCoss output capacitance - 710 - pFCrss reverse transfer capacitance - 510 - pFtd(on) turn-on delay time VDD = 15 V; ID = 12.5 A; VGS = 5 V;

RG = 5.6 ; resistive load- 18 - ns

tr turn-on rise time - 80 - nstd(off) turn-off delay time - 104 - nstf turn-off fall time - 104 - nsSource-drain diodeVSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12 - 0.9 1.2 Vtrr reverse recovery time IS = 10 A; dIS/dt = 100 A/s; VGS = 0 V - 37 - nsQr recovered charge - 20 - nC



Tj = 25 C Tj = 25 C and 175 C; VDS > ID x RDSonFig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.Fig 6. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

Tj = 25 C

Fig 7. Drain-source on-state resistance as a functionof drain current; typical values.

Fig 8. Normalized drain-source on-state resistancefactor as a function of junction temperature.

03af03

0

20

40

60

80

0 0.2 0.4 0.6 0.8 1VDS (V)

ID(A)

2.5 V

5 VTj = 25 C

VGS = 2 V

10 V3 V

3.5 V

03af05

0

20

40

60

80

0 1 2 3 4VGS (V)

ID(A)

VDS > ID x RDSon

Tj = 25 C175 C

03af04

0

0.005

0.01

0.015

0.02

0 20 40 60 80ID (A)

RDSon()

VGS = 3 V

Tj = 25 C

5V10 V

3.5 V

03af18

0

0.4

0.8

1.2

1.6

2

-60 0 60 120 180Tj (C)

a

aRDSon

RDSon 25 C( )----------------------------=



ID = 1 mA; VDS = VGS Tj = 25 C; VDS = 5 V

Fig 9. Gate-source threshold voltage as a function ofjunction temperature.

Fig 10. Sub-threshold drain current as a function ofgate-source voltage.

VGS = 0 V; f = 1 MHz

Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.

03aa33

0

0.5

1

1.5

2

2.5

-60 0 60 120 180Tj (oC)

VGS(th)(V) max

typ

min

03aa36

10-6

10-5

10-4

10-3

10-2

10-1

0 0.5 1 1.5 2 2.5 3VGS (V)

ID(A)

maxtypmin

03af07

102

103

104

10-1 1 10 102VDS (V)

C(pF) Ciss

Coss

Crss



Tj = 25 C and 175 C; VGS = 0 V ID = 50 A; VDD = 15 V

Fig 12. Source (diode forward) current as a function ofsource-drain (diode forward) voltage; typicalvalues.

Fig 13. Gate-source voltage as a function of gatecharge; typical values.

03af06

0

20

40

60

80

0 0.4 0.8 1.2VSD (V)

IS(A)

Tj = 25 C175 C

VGS = 0 V

03af08

0

2

4

6

8

10

0 40 80 120QG (nC)

VGS(V)

ID = 50 A

Tj = 25 CVDD = 15 V



9. Package outline

Fig 14. SOT78 (TO-220AB).

REFERENCESOUTLINEVERSION

EUROPEANPROJECTION ISSUE DATE

IEC JEDEC EIAJ

SOT78 SC-463-lead TO-220AB

D

D1

q

p

L

1 2 3

L1(1)

b1

e e

b

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78

DIMENSIONS (mm are the original dimensions)

AEA1

c

Note1. Terminals in this zone are not tinned.

Q

L2

UNIT A1 b1 D1 e p

mm 2.54

q QA b Dc L2max.

3.0 3.83.615.013.5

3.302.79

3.02.7

2.62.2

0.70.4

15.815.2

0.90.7

1.31.0

4.54.1

1.391.27

6.45.9

10.39.7

L1(1)E L

00-09-0701-02-16

mountingbase



Fig 15. SOT404 (D2-PAK)

UNIT A



IEC JEDEC EIAJ

mm

A1 D1D

max.E e Lp HD Qc

2.54 2.602.20

15.8014.80

2.902.1011

1.601.20

10.309.70

4.504.10

1.401.27

0.850.60

0.640.46

b


SOT404

0 2.5 5 mm

scale

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads(one lead cropped) SOT404

e e

E

b

D1

HD

D

Q

Lp

c

A1

A

1 3

2

mountingbase

99-06-2501-02-12



Fig 16. SOT428 (D-PAK)



IEC JEDEC EIAJ

SOT428 TO-252 SC-63 98-04-0799-09-13

0 10 20 mm

scale

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads(one lead cropped) SOT428

E

b2 D1

w AMb cb1

L1L

1 3

2

D

E1

HE

L2

Note1. Measured from heatsink back to lead.

e1

e

A A2

A

A1

y

seating plane

mountingbase

A1(1)D

max.b

D1max.

Emax.

HEmax.

wy

max.A2 b2

b1max.

cE1

min. e e1L1

min. L2LA

max.UNIT


0.2 0.2mm 2.382.220.650.45

0.890.71

0.890.71

1.10.9

5.365.26

0.40.2

6.225.98

4.814.45

2.285 4.57 10.49.6 0.50.70.5

6.736.47 4.0

2.952.55



10. Revision history

Table 6: Revision historyRev Date CPCN Description02 20011018 - Product data; second version. Supersedes data PHP98N03LT-01 of 16 July 2001 (9397

750 08338). Modifications: Table 5 Characteristics on page 5: added Qr and trr.

01 20010716 - Product data; initial version.

9397 750 08726


Koninklijke Philips Electronics N.V. 2001. All rights reserved.

Product data Rev. 02 18 October 2001 13 of 14

Contact informationFor additional information, please visit http://www.semiconductors.philips.com.For sales office addresses, send e-mail to: [email protected]. Fax: +31 40 27 24825

11. Data sheet status

[1] Please consult the most recently issued data sheet before initiating or completing a design.[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

12. DefinitionsShort-form specification The data in a short-form specification isextracted from a full data sheet with the same type number and title. Fordetailed information see the relevant data sheet or data handbook.Limiting values definition Limiting values given are in accordance withthe Absolute Maximum Rating System (IEC 60134). Stress above one ormore of the limiting values may cause permanent damage to the device.These are stress ratings only and operation of the device at these or at anyother conditions above those given in the Characteristics sections of thespecification is not implied. Exposure to limiting values for extended periodsmay affect device reliability.Application information Applications that are described herein for anyof these products are for illustrative purposes only. Philips Semiconductorsmake no representation or warranty that such applications will be suitable forthe specified use without further testing or modification.

13. DisclaimersLife support These products are not designed for use in life supportappliances, devices, or systems where malfunction of these products canreasonably be expected to result in personal injury. Philips Semiconductorscustomers using or selling these products for use in such applications do soat their own risk and agree to fully indemnify Philips Semiconductors for anydamages resulting from such application.Right to make changes Philips Semiconductors reserves the right tomake changes, without notice, in the products, including circuits, standardcells, and/or software, described or contained herein in order to improvedesign and/or performance. Philips Semiconductors assumes noresponsibility or liability for the use of any of these products, conveys nolicence or title under any patent, copyright, or mask work right to theseproducts, and makes no representations or warranties that these products arefree from patent, copyright, or mask work right infringement, unless otherwisespecified.

Data sheet status[1] Product status[2] DefinitionObjective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors

reserves the right to change the specification in any manner without notice.Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a

later date. Philips Semiconductors reserves the right to change the specification without notice, in order toimprove the design and supply the best possible product.

Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right tomake changes at any time in order to improve the design, manufacturing and supply. Changes will becommunicated according to the Customer Product/Process Change Notification (CPCN) procedureSNW-SQ-650A.

Koninklijke Philips Electronics N.V. 2001.Printed in The NetherlandsAll rights are reserved. Reproduction in whole or in part is prohibited without the priorwritten consent of the copyright owner.The information presented in this document does not form part of any quotation orcontract, is believed to be accurate and reliable and may be changed without notice. Noliability will be accepted by the publisher for any consequence of its use. Publicationthereof does not convey nor imply any license under patent- or other industrial orintellectual property rights.Date of release: 18 October 2001 Document order number: 9397 750 08726

Contents


1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Pinning information . . . . . . . . . . . . . . . . . . . . . . 15 Quick reference data . . . . . . . . . . . . . . . . . . . . . 26 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 27 Thermal characteristics. . . . . . . . . . . . . . . . . . . 47.1 Transient thermal impedance . . . . . . . . . . . . . . 48 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 910 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 1211 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 1312 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1313 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1. Description2. Features3. Applications4. Pinning information5. Quick reference data6. Limiting values7. Thermal characteristics7.1 Transient thermal impedance

8. Characteristics9. Package outline10. Revision history11. Data sheet status12. Definitions13. Disclaimers

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phd98n03