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ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
Linear
Linear
Switcher
TDI
DNP
PC4
TDOTDI TDOTDI
PWR5V
Linear Flash
Linear Flash
Headers and
SDRAMDDR 266
PS2
AudioAC97
Flash
SystemACE
2 lineCharacter LCD
VGA
64 bit LVDS Expansion Header
MousePS2
Keybrd
Differential SMA Clocks
100MHzXtal
OptionalUSERXtal
UART
DDR 266SDRAM
10/100/1000 PHYRJ45 Magnetics
ZBT SRAM
Circuit forAnalog DVM
XC95144XL
CPLD
IICEEPROM
Jack
320 User IOs8 Banks
FPGA Device Banks
CFGTDOTSTTDI
SysACE PlatFlash FPGA CPLD
PC4
DNP
CFGTDITSTTDO
TDI
Expansion
JTAG Chain
TDO
Compatibility and Available IOs
GPIO
Virtex 4FX
Periph 1
Periph 2
Platform
USBMGT Connectors
Host
4 SMA
1 SFP Cage
FX20
352 User IOs10 Banks
3.3V@6A max
2.5V@6A max
1.2V@6A max
Switcher
Switcher
Switcher
Linear
Linear1.5V@5A max
2 Serial-ATA
1.2V VREF
ML405 Block DiagramSCHEM, ML405 EVAL PLATFORM
0381199
1.1V@4A max
1.5V@6A max
1.25V@3A max
TDO
FX40, FX60
Power Supply
5-25-2006_11:18
B
BF1 32
1.0
VCC2V5
IO_L1P_D15_CC_LC_2_V16IO_L1N_D14_CC_LC_2_W16
IO_L2P_D13_LC_2_Y12IO_L2N_D12_LC_2_Y11IO_L3P_D11_LC_2_U16IO_L3N_D10_LC_2_U15IO_L4P_D9_LC_2_W11
IO_L4N_D8_VREF_LC_2_V11IO_L5P_D7_LC_2_W15IO_L5N_D6_LC_2_W14IO_L6P_D5_LC_2_Y13IO_L6N_D4_LC_2_W13IO_L7P_D3_LC_2_U14IO_L7N_D2_LC_2_V14IO_L8P_D1_LC_2_V13IO_L8N_D0_LC_2_V12
VN_SM_AF18VP_SM_AF17
IO_L1P_D31_LC_1_J15IO_L1N_D30_LC_1_J14IO_L2P_D29_LC_1_K13IO_L2N_D28_LC_1_J13IO_L3P_D27_LC_1_H14IO_L3N_D26_LC_1_G14IO_L4P_D25_LC_1_H13
IO_L4N_D24_VREF_LC_1_H12IO_L5P_D23_LC_1_J16IO_L5N_D22_LC_1_H16IO_L6P_D21_LC_1_K12IO_L6N_D20_LC_1_K11IO_L7P_D19_LC_1_G16IO_L7N_D18_LC_1_G15
IO_L8P_D17_CC_LC_1_H11IO_L8N_D16_CC_LC_1_J11
HSWAPEN_0_K16CCLK_0_M14D_IN_0_L13
PROGRAM_B_0_K17INIT_0_L15CS_B_0_M12DONE_0_K15
RDWR_B_0_R11VBATT_0_L17
M2_0_M16PWRDWN_B_0_U12
TMS_0_T10M0_0_P14TDO_0_R13TCK_0_U10M1_0_R15
DOUT_BUSY_0_T14TDI_0_U11TDN_0_E12TDP_0_F12
IO_L1P_GC_CC_LC_3_F15IO_L1N_GC_CC_LC_3_E15IO_L2P_GC_VRN_LC_3_F14IO_L2N_GC_VRP_LC_3_F13
IO_L3P_GC_LC_3_D15IO_L3N_GC_LC_3_D14IO_L4P_GC_LC_3_D13
IO_L4N_GC_VREF_LC_3_E13IO_L5P_GC_LC_3_C14IO_L5N_GC_LC_3_B14IO_L6P_GC_LC_3_C13IO_L6N_GC_LC_3_C12IO_L7P_GC_LC_3_A14IO_L7N_GC_LC_3_A13IO_L8P_GC_LC_3_A12IO_L8N_GC_LC_3_B12
IO_L1P_GC_LC_4_AE15IO_L1N_GC_LC_4_AF15IO_L2P_GC_LC_4_AF14IO_L2N_GC_LC_4_AF13IO_L3P_GC_LC_4_AD15IO_L3N_GC_LC_4_AD14IO_L4P_GC_LC_4_AE13
IO_L4N_GC_VREF_LC_4_AD13IO_L5P_GC_LC_4_AB14IO_L5N_GC_LC_4_AC14IO_L6P_GC_LC_4_AC13IO_L6N_GC_LC_4_AC12
IO_L7P_GC_VRN_LC_4_AA14IO_L7N_GC_VRP_LC_4_AA13IO_L8P_GC_CC_LC_4_AB12IO_L8N_GC_CC_LC_4_AA12
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
Added 50ohm for protection
DCI
(Feedback)
FPGA_BANK4
3.3V VCC0
FPGA_BANK3
2.5V VCC0
3.3V VCC0
FPGA_BANK0
Configuration
FPGA_BANK1
3.3V VCC0
FPGA_BANK2
3.3V VCC0
Optional
(Feedback)
In case FPGA and PLAT Flashor CPLD drive CCLK
(Feedback)
FPGA Banks 0,1,2,3,4SCHEM, ML405 EVAL PLATFORM
0381199
B
BF
7-8-2005_10:23
322
1.0
FPGA_DIN21R41947R
AE15AF15AF14AF13AD15AD14AE13AD13AB14AC14AC13AC12AA14AA13AB12AA12
U1
F15E15F14F13D15D14D13E13C14B14C13C12A14A13A12B12
U1
FPGA_PROG_B
PLATFLASH_CPLD_CCLK12
47R
R184
FPGA_TDNFPGA_TDP
K16M14L13K17L15M12K15R11L17M16U12T10P14R13U10R15T14U11E12F12
U1
AF18AF17J15J14K13J13H14G14H13H12J16H16K12K11G16G15H11J11
U1
V16W16Y12Y11U16U15W11V11W15W14Y13W13U14V14V13V12
U1
1 20R
R388
IIC_SEL_1
21R378
DNP
IIC_SCL_FPGAIIC_SDA_FPGA
SMA_DIFF_CLK_IN_P
FPGA_DIN
12
DNP
R221
GPIO_LED_3GPIO_LED_2PHY_TXCLK
SYS_MON_VP0SYS_MON_VN0
DDR_BA1DDR_A13
SRAM_FLASH_D18SRAM_FLASH_D19SRAM_FLASH_D20
FPGA_CS_B
FPGA_CCLK
LCD_DB5
SYSCLK_100MHZ
SRAM_CLK
MOUSE_CLKPHY_RXC_RXCLK
MOUSE_DATA
DDR_BA0
USERCLK
DDR_CK1_P
SYSACE_CLK
21
R219
1K
12
1K
R220
LCD_RWLCD_RS
SRAM_FLASH_D11
SRAM_FLASH_D0
SRAM_FLASH_D15SRAM_FLASH_D14SRAM_FLASH_D13SRAM_FLASH_D12
SRAM_FLASH_D10SRAM_FLASH_D9SRAM_FLASH_D8SRAM_FLASH_D7SRAM_FLASH_D6
SRAM_FLASH_D4SRAM_FLASH_D3SRAM_FLASH_D2SRAM_FLASH_D1
SRAM_FLASH_D5
LCD_DB7LCD_DB6
LCD_DB4
SRAM_FLASH_D16SRAM_FLASH_D17
SRAM_FLASH_D21SRAM_FLASH_D22SRAM_FLASH_D23SRAM_FLASH_D24SRAM_FLASH_D25SRAM_FLASH_D26SRAM_FLASH_D27SRAM_FLASH_D28SRAM_FLASH_D29SRAM_FLASH_D30SRAM_FLASH_D31
AUDIO_BIT_CLK
21
R222
DNP
SMA_DIFF_CLK_IN_N
DDR_CK1_NDDR_CK1_P
21
R223
4.7K
USB_CS_N
LCD_E
FLASH_AUDIO_RESET_N
AUDIO_SDATA_IN
FPGA_TDIFPGA_DOUT_BUSYFPGA_M1FPGA_PROM_CPLD_TCKFPGA_TDOFPGA_M0FPGA_PROM_CPLD_TMSNCFPGA_M2FPGA_VBATT
FPGA_DONE
FPGA_INIT
VCC2V5
0402
VTTDDR
VTTDDR
IO_L1P_ADC7_5_G20IO_L1N_ADC7_5_F20IO_L2P_ADC6_5_H19IO_L2N_ADC6_5_J19IO_L3P_ADC5_5_E22IO_L3N_ADC5_5_E21
IO_L4P_5_G19IO_L4N_VREF_5_H18IO_L5P_ADC4_5_G21IO_L5N_ADC4_5_F22IO_L6P_ADC3_5_F19IO_L6N_ADC3_5_F18IO_L7P_ADC2_5_E23IO_L7N_ADC2_5_D23
IO_L8P_CC_ADC1_LC_5_E20IO_L8N_CC_ADC1_LC_5_D20
IO_L17P_5_K20IO_L17N_5_L19IO_L18P_5_E17IO_L18N_5_F17IO_L19P_5_J23IO_L19N_5_K23IO_L20P_5_D18
IO_L20N_VREF_5_E18IO_L21P_5_K21IO_L21N_5_J21IO_L22P_5_C18IO_L22N_5_C17
IO_L23P_VRN_5_J24IO_L23N_VRP_5_H23
IO_L24P_CC_LC_5_A17IO_L24N_CC_LC_5_B17IO_L9P_CC_LC_5_D24IO_L9N_CC_LC_5_C24
IO_L10P_5_D21IO_L10N_5_C21IO_L11P_5_F24IO_L11N_5_F23IO_L12P_5_C23
IO_L12N_VREF_5_C22IO_L13P_5_H22IO_L13N_5_G22IO_L14P_5_G17IO_L14N_5_H17IO_L15P_5_H24IO_L15N_5_G24IO_L16P_5_C19IO_L16N_5_D19
IO_L25P_CC_LC_5_K22IO_L25N_CC_LC_5_L23
IO_L26P_5_L18IO_L26N_5_K18IO_L27P_5_L24IO_L27N_5_M24IO_L28P_5_D16
IO_L28N_VREF_5_E16IO_L29P_5_M22IO_L29N_5_N22IO_L30P_5_B16IO_L30N_5_C16IO_L31P_5_N24IO_L31N_5_N23IO_L32P_5_A15IO_L32N_5_B15
IO_L1P_6_H8IO_L1N_6_H7IO_L2P_6_A8IO_L2N_6_A7IO_L3P_6_F8IO_L3N_6_F7IO_L4P_6_G7
IO_L4N_VREF_6_H6IO_L5P_6_E8IO_L5N_6_E7IO_L6P_6_B7IO_L6N_6_C7IO_L7P_6_D8IO_L7N_6_C8
IO_L8P_CC_LC_6_D6IO_L8N_CC_LC_6_E6
IO_L17P_6_B9IO_L17N_6_A9IO_L18P_6_C3IO_L18N_6_D3IO_L19P_6_G10IO_L19N_6_F10IO_L20P_6_E3
IO_L20N_VREF_6_F3IO_L21P_6_E10IO_L21N_6_D10IO_L22P_6_K6IO_L22N_6_J5
IO_L23P_VRN_6_B10IO_L23N_VRP_6_A10IO_L24P_CC_LC_6_H4IO_L24N_CC_LC_6_G4IO_L9P_CC_LC_6_J9IO_L9N_CC_LC_6_K10
IO_L10P_6_B6IO_L10N_6_C6IO_L11P_6_H9IO_L11N_6_G9IO_L12P_6_D5
IO_L12N_VREF_6_E5IO_L13P_6_D9IO_L13N_6_C9IO_L14P_6_C4IO_L14N_6_D4IO_L15P_6_K8IO_L15N_6_K7IO_L16P_6_G5IO_L16N_6_F4
IO_L25P_CC_LC_6_E11IO_L25N_CC_LC_6_D11
IO_L26P_6_L7IO_L26N_6_M6IO_L27P_6_C11IO_L27N_6_B11IO_L28P_6_J4
IO_L28N_VREF_6_H3IO_L29P_6_G12IO_L29N_6_G11IO_L30P_6_K3IO_L30N_6_J3IO_L31P_6_L10IO_L31N_6_L9IO_L32P_6_M5IO_L32N_6_L5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
DCIOptional
FPGA_BANK5
2.5V VCC0
FPGA_BANK6
2.5V VCC0
FPGA Bank 5, 6
BF
B
1.0
3
7-8-2005_10:23
32
VGA_VSYNC
PHY_RESET
SMA_DIFF_CLK_OUT_PSMA_DIFF_CLK_OUT_N
GPIO_SW_CGPIO_LED_C
GPIO_LED_1
PHY_RXER
PHY_MDCKEYBOARD_CLK
VGA_R7
VGA_R6
VGA_R5
VGA_R4
GPIO_SW_EGPIO_LED_E
GPIO_SW_SGPIO_LED_S
GPIO_SW_W
GPIO_LED_WGPIO_SW_N
GPIO_LED_0
PHY_RXD3
VGA_G4
PHY_RXD2
PHY_TXD5
PHY_RXD4
PHY_RXD1
PHY_RXD5
PHY_RXD6
PHY_RXD0
PHY_TXD7
PHY_RXD7PHY_TXD3
PHY_TXCTL_TXEN
PHY_TXER
FPGA_CPU_RESET
PHY_MDIO
PHY_TXD6
PHY_TXD4
PHY_RXCTL_RXDV
VGA_B7
VGA_B6
VGA_B5
PHY_CRS
VGA_G5
PHY_TXD2PHY_TXD0
PHY_TXD1
USB_RESET_N
VGA_HSYNC
VGA_G6
PHY_INT
VGA_B4
VGA_G7
VGA_G3
VGA_B3
VGA_R3
AUDIO_SYNC
AUDIO_SDATA_OUT
DDR_DQS0DDR_DQS3
DDR_DQS2DDR_DQS1DDR_CAS_NDDR_RAS_N
DDR_WE_NDDR_A12
H8H7A8A7F8F7G7H6E8E7B7C7D8C8D6E6B9A9C3D3G10F10E3F3E10D10K6J5B10A10H4G4J9K10B6C6H9G9D5E5D9C9C4D4K8K7G5F4E11D11L7M6C11B11J4H3G12G11K3J3L10L9M5L5
U1
DDR_LOOP
G20F20H19J19E22E21G19H18G21F22F19F18E23D23E20D20K20L19E17F17J23K23D18E18K21J21C18C17J24H23A17B17D24C24D21C21F24F23C23C22H22G22G17H17H24G24C19D19K22L23L18K18L24M24D16E16M22N22B16C16N24N23A15B15
U1
DDR_LOOP
DDR_D4
DDR_D7
DDR_DM1
DDR_D6
DDR_D31
DDR_D3
DDR_D5
DDR_D9
DDR_DM3
DDR_D8
DDR_D30
DDR_D25
DDR_DM0
DDR_DM2
DDR_D29
DDR_D26
DDR_D28
DDR_D27
DDR_D24
DDR_D23
DDR_D22
DDR_D21
DDR_D20
DDR_D2
DDR_D19
DDR_D18
DDR_D17
DDR_D16
DDR_D15
DDR_D14
DDR_D13
DDR_D12
DDR_D11
DDR_D10
DDR_D1
DDR_D0
DDR_A9
DDR_A8
DDR_A7
DDR_A6
DDR_A5
DDR_A4
DDR_A3
DDR_A2
DDR_A11
DDR_A10
DDR_A1DDR_A0
1 2R2
47R
1
2
C4000.22UF
12
DNP
R225
21
R224
DNP
2
1 C3910.047UF
DDR_CS_NDDR_CKE
KEYBOARD_DATAPHY_TXC_GTXCLKGPIO_LED_NPHY_COL
VCC3V3
IO_L25P_CC_SM7_LC_7_AB24IO_L25N_CC_SM7_LC_7_AC24
IO_L26P_SM6_7_AB20IO_L26N_SM6_7_AB19IO_L27P_SM5_7_W20IO_L27N_SM5_7_W19
IO_L28P_7_W18IO_L28N_VREF_7_V18IO_L29P_SM4_7_AD24IO_L29N_SM4_7_AD23IO_L30P_SM3_7_AA20IO_L30N_SM3_7_AA19IO_L31P_SM2_7_AC23IO_L31N_SM2_7_AC22IO_L32P_SM1_7_AB22IO_L32N_SM1_7_AB21
IO_L17P_7_V21IO_L17N_7_U21IO_L18P_7_AC19IO_L18N_7_AC18IO_L19P_7_AA24IO_L19N_7_AA23IO_L20P_7_AA18
IO_L20N_VREF_7_Y18IO_L21P_7_Y22IO_L21N_7_AA22IO_L22P_7_AD20IO_L22N_7_AD19
IO_L23P_VRN_7_W21IO_L23N_VRP_7_Y20
IO_L24P_CC_LC_7_AC21IO_L24N_CC_LC_7_AD21
IO_L1P_7_P24IO_L1N_7_R23IO_L2P_7_AB15IO_L2N_7_AA15IO_L3P_7_R21IO_L3N_7_R20IO_L4P_7_AD16
IO_L4N_VREF_7_AC16IO_L5P_7_T23IO_L5N_7_T22IO_L6P_7_T17IO_L6N_7_U17IO_L7P_7_U24IO_L7N_7_T24
IO_L8P_CC_LC_7_Y16IO_L8N_CC_LC_7_Y15IO_L9P_CC_LC_7_W24IO_L9N_CC_LC_7_V24
IO_L10P_7_AB17IO_L10N_7_AB16IO_L11P_7_V23IO_L11N_7_V22IO_L12P_7_U19
IO_L12N_VREF_7_T18IO_L13P_7_W23IO_L13N_7_Y23IO_L14P_7_AA17IO_L14N_7_Y17IO_L15P_7_U20IO_L15N_7_T20IO_L16P_7_AD18IO_L16N_7_AC17
IO_L25P_CC_LC_8_AC7IO_L25N_CC_LC_8_AC6
IO_L26P_8_Y6IO_L26N_8_AA5IO_L27P_8_Y8IO_L27N_8_AA8IO_L28P_8_AB5
IO_L28N_VREF_8_AB4IO_L29P_8_AB7IO_L29N_8_AB6IO_L30P_8_AD4IO_L30N_8_AD3IO_L31P_8_AA7IO_L31N_8_Y7IO_L32P_8_AD6IO_L32N_8_AD5IO_L17P_8_AD9IO_L17N_8_AD8IO_L18P_8_Y3IO_L18N_8_W4IO_L19P_8_AC9IO_L19N_8_AC8IO_L20P_8_AA4
IO_L20N_VREF_8_AA3IO_L21P_8_AA9IO_L21N_8_AB9IO_L22P_8_Y5IO_L22N_8_W5
IO_L23P_VRN_8_W9IO_L23N_VRP_8_W8
IO_L24P_CC_LC_8_AC4IO_L24N_CC_LC_8_AC3
IO_L1P_8_AD11IO_L1N_8_AD10IO_L2P_8_L4IO_L2N_8_L3
IO_L3P_8_AB11IO_L3N_8_AC11IO_L4P_8_M4
IO_L4N_VREF_8_N4IO_L5P_8_T9IO_L5N_8_T8IO_L6P_8_P5IO_L6N_8_R5
IO_L7P_8_AA10IO_L7N_8_AB10
IO_L8P_CC_LC_8_P4IO_L8N_CC_LC_8_R3
IO_L9P_CC_LC_8_W10IO_L9N_CC_LC_8_Y10
IO_L10P_8_N3IO_L10N_8_P3IO_L11P_8_U6IO_L11N_8_U5IO_L12P_8_T4
IO_L12N_VREF_8_T3IO_L13P_8_U7IO_L13N_8_V6IO_L14P_8_U4IO_L14N_8_V4IO_L15P_8_U9IO_L15N_8_V8IO_L16P_8_V3IO_L16N_8_W3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Enable DCI
FPGA_BANK8
3.3V VCC0
FPGA_BANK7
3.3V or 2.5V VCC0
(Feedback)
FPGA Bank 7, 8
B
1.0
4 32
7-8-2005_10:23
BF
HDR1_56HDR1_54HDR1_50
HDR1_16HDR1_46
AC7AC6Y6AA5Y8AA8AB5AB4AB7AB6AD4AD3AA7Y7AD6AD5AD9AD8Y3W4AC9AC8AA4AA3AA9AB9Y5W5W9W8AC4AC3AD11AD10L4L3AB11AC11M4N4T9T8P5R5AA10AB10P4R3W10Y10N3P3U6U5T4T3U7V6U4V4U9V8V3W3
U1
FPGA_CCLK21R228
DNP
BUS_ERROR_112
0RR413
SRAM_ADV_LD_N
HDR2_14
HDR2_6HDR2_8
HDR1_34HDR1_36
HDR1_28HDR1_26
HDR2_12HDR2_10
HDR1_64HDR1_62
HDR1_60
HDR1_52
HDR1_48
HDR1_44
HDR1_42
HDR1_40HDR1_38
HDR1_32
HDR1_30
HDR1_24
HDR1_22
HDR1_20
HDR1_18
HDR1_8
HDR1_6
HDR1_4
HDR1_2HDR1_14
HDR1_12
HDR1_10
AB24AC24AB20AB19W20W19W18V18AD24AD23AA20AA19AC23AC22AB22AB21V21U21AC19AC18AA24AA23AA18Y18Y22AA22AD20AD19W21Y20AC21AD21P24R23AB15AA15R21R20AD16AC16T23T22T17U17U24T24Y16Y15W24V24AB17AB16V23V22U19T18W23Y23AA17Y17U20T20AD18AC17
U1
SRAM_FLASH_WE_NSRAM_FLASH_OE_N
SYSACE_MPCE
SYSACE_MPIRQ
SRAM_CLKVGA_CLK
SYSACE_MPOE_USB_RD_N
SYSACE_MPWE_USB_WR_N
SYSACE_A1_USB_A0
SYSACE_A2_USB_A1SYSACE_MPA03
SYSACE_USB_D0
SYSACE_USB_D1
SYSACE_USB_D2SYSACE_USB_D3
SYSACE_USB_D4
SYSACE_USB_D5
SYSACE_USB_D6SYSACE_USB_D7
SYSACE_USB_D8
SYSACE_USB_D9SYSACE_USB_D10
SYSACE_USB_D11
SYSACE_USB_D12
SYSACE_USB_D13
SYSACE_USB_D14
SYSACE_USB_D15
SYSACE_MPA04
SYSACE_MPA05
SYSACE_MPA06
UART_SIN
UART_SOUT
USB_INT
IIC_SEL_0
FLASH_CE2_SRAM_CE1_N
SRAM_FLASH_A11
SRAM_FLASH_A12
SRAM_FLASH_A13
SRAM_FLASH_A1
SRAM_FLASH_A0
SRAM_FLASH_A15SRAM_FLASH_A14
SRAM_BW2SRAM_BW3SRAM_BW0SRAM_BW1
SRAM_FLASH_A3
SRAM_FLASH_A2
SRAM_FLASH_A18SRAM_FLASH_A17
SRAM_FLASH_A16
SRAM_FLASH_A4
SRAM_FLASH_A20
SRAM_FLASH_A19
SRAM_FLASH_A6
SRAM_FLASH_A5
SRAM_FLASH_A10
SRAM_FLASH_A9
SRAM_FLASH_A8
SRAM_FLASH_A7
VCCO_712
DNP
R290
12
49.9R
R165
21
R166
49.9R
21
R289
DNP
HDR2_2HDR2_4HDR2_18HDR2_20HDR2_22HDR2_24HDR2_26HDR2_28HDR2_30HDR2_32HDR2_34_SYS_MON_VN7HDR2_36_SYS_MON_VP7HDR2_38_SYS_MON_VN6HDR2_40_SYS_MON_VP6HDR2_42_SYS_MON_VN5HDR2_44_SYS_MON_VP5HDR2_46_SYS_MON_VN4HDR2_48_SYS_MON_VP4HDR2_50HDR2_52HDR2_54_SYS_MON_VN3HDR2_56_SYS_MON_VP3HDR2_58_SYS_MON_VN2HDR2_60_SYS_MON_VP2HDR2_62_SYS_MON_VN1HDR2_64_SYS_MON_VP1
HDR1_58
HDR2_16
VCC3V3
IO_L17P_10_M10IO_L17N_10_M9IO_L18P_10_N8IO_L18N_10_N7IO_L19P_10_M11IO_L19N_10_N11IO_L20P_10_P8
IO_L20N_VREF_10_R8IO_L21P_10_P11IO_L21N_10_P10IO_L22P_10_P6IO_L22N_10_N6
IO_L23P_VRN_10_N9IO_L23N_VRP_10_P9
IO_L24P_CC_LC_10_R7IO_L24N_CC_LC_10_R6
IO_L17P_9_M20IO_L17N_9_M19IO_L18P_9_P16IO_L18N_9_N16IO_L19P_9_N21IO_L19N_9_M21IO_L20P_9_N18
IO_L20N_VREF_9_N17IO_L21P_9_P19IO_L21N_9_N19IO_L22P_9_R17IO_L22N_9_R16
IO_L23P_VRN_9_P21IO_L23N_VRP_9_P20
IO_L24P_CC_LC_9_R18IO_L24N_CC_LC_9_P18
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
FPGA_BANK9
3.3V VCC0
3.3V VCC0
Enable DCI
FPGA_BANK10
FPGA Bank 9, 10
7-8-2005_10:23
325
1.0
BF
B
M20M19P16N16N21M21N18N17P19N19R17R16P21P20R18P18
U1
M10M9N8N7M11N11P8R8P11P10P6N6N9P9R7R6
U1
12R256
4.7K12
4.7K
R246
124.7K
R259
2 1R257
4.7K
124.7K
R258
SRAM_DQP1SRAM_DQP2
BUS_ERROR_2
124.7K
R248
GPIO_DIP_SW1FLASH_BYTE_N
GPIO_DIP_SW2
21
R230
49.9R
12
49.9R
R229
CPLD_IO_1SRAM_FLASH_A21
CPLD_IO_2
SRAM_MODE
2 1R242
4.7K
124.7K
R249 2 1R247
4.7K
2 1R252
4.7K2 1R251
4.7K
124.7K
R25012
4.7K
R255
124.7K
R2542 1
R253
4.7KVGA_B2VGA_B1VGA_B0VGA_G2VGA_G1VGA_G0VGA_R2VGA_R1VGA_R0
GPIO_DIP_SW8GPIO_DIP_SW7GPIO_DIP_SW6GPIO_DIP_SW5
GPIO_DIP_SW3GPIO_DIP_SW4
2 1R244
4.7K
2 1R245
4.7K 124.7K
R243SYSACE_MPBRDY
FLASH_A0SRAM_FLASH_A22
FLASH_A23
SYSACE_MPA00SRAM_DQP0
SRAM_DQP3
VCC1V2
VCC2V5
VCC2V5
VCC3V3
VCC2V5
VCC2V5
VCC3V3
VCC3V3
VCC3V3
GND_G3GND_U3GND_K4GND_Y4GND_C5GND_N5
GND_AC5GND_F6GND_T6GND_J7GND_W7GND_B8GND_M8
GND_AB8GND_E9GND_R9
GND_H10GND_V10GND_A11GND_L11GND_AA11GND_D12GND_P12GND_T12GND_AD12GND_G13GND_N13GND_U13GND_K14GND_Y14GND_C15GND_N15GND_AC15GND_F16GND_T16GND_J17GND_W17GND_B18GND_M18GND_AB18GND_E19GND_R19GND_H20GND_V20GND_L21GND_AA21GND_D22GND_P22GND_AD22GND_G23GND_U23GND_K24GND_Y24
VREFN_SM_AE18VREFP_SM_AE17AVDD_SM_AE16AVSS_SM_AF16
VCCO_0_T11VCCO_0_M13VCCO_0_R14VCCO_0_L16VCCO_1_J12VCCO_1_H15VCCO_2_V15VCCO_2_W12VCCO_3_B13VCCO_3_E14VCCO_4_AB13VCCO_4_AE14VCCO_5_A16VCCO_5_D17VCCO_5_G18VCCO_5_K19VCCO_5_C20VCCO_5_F21VCCO_5_J22VCCO_5_M23VCCO_5_E24VCCO_6_E4VCCO_6_H5VCCO_6_A6VCCO_6_L6VCCO_6_D7VCCO_6_G8VCCO_6_K9
VCCO_6_C10VCCO_6_F11VCCO_7_AA16VCCO_7_AD17VCCO_7_U18VCCO_7_Y19VCCO_7_AC20VCCO_7_T21VCCO_7_W22VCCO_7_AB23VCCO_7_R24VCCO_8_M3
VCCO_8_AB3VCCO_8_R4VCCO_8_V5
VCCO_8_AA6VCCO_8_AD7VCCO_8_U8VCCO_8_Y9
VCCO_8_AC10VCCO_9_P17VCCO_9_N20VCCO_10_P7VCCO_10_N10
VCCAUX_T5VCCAUX_J6VCCAUX_W6VCCAUX_M7
VCCAUX_N12VCCAUX_P15VCCAUX_H21VCCAUX_L22VCCAUX_P23VCCAUX_F25VCCAUX_G25
VCCINT_K5VCCINT_G6VCCINT_T7VCCINT_V7VCCINT_J8VCCINT_L8VCCINT_F9VCCINT_V9
VCCINT_J10VCCINT_R10VCCINT_L12VCCINT_R12VCCINT_P13VCCINT_T13VCCINT_L14VCCINT_N14VCCINT_M15VCCINT_T15VCCINT_M17VCCINT_V17VCCINT_J18VCCINT_T19VCCINT_V19VCCINT_J20VCCINT_L20VCCINT_Y21VCCINT_R22VCCINT_U22
VCCAUX_F5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
2-3 = 2.5V1-2 = 3.3V
Connector VoltageBank 7 Expansion
SYS_MON_VREFN_AVSS
SYS_MON_VREFN_AVSS
FPGA_GND
FPGA_PWR
FPGA Ground and PowerSCHEM, ML405 EVAL PLATFORM
0381199
7-8-2005_10:35
326
1.0
B
BF
AE18AE17AE16AF16
T11M13R14L16J12H15V15W12B13E14AB13AE14A16D17G18K19C20F21J22M23E24E4H5A6L6D7G8K9C10F11AA16AD17U18Y19AC20T21W22AB23R24M3AB3R4V5AA6AD7U8Y9AC10P17N20P7N10
T5J6W6M7N12P15H21L22P23F25G25
K5G6T7V7J8L8F9V9J10R10L12R12P13T13L14N14M15T15M17V17J18T19V19J20L20Y21R22U22
F5
U1
G3U3K4Y4C5N5AC5F6T6J7W7B8M8AB8E9R9H10V10A11L11AA11D12P12T12AD12G13N13U13K14Y14C15N15AC15F16T16J17W17B18M18AB18E19R19H20V20L21AA21D22P22AD22G23U23K24Y24
U1
GND_SYSMON
GND_SYSMON
23 1
J16
SYS_MON_AVDDSYS_MON_VREFP
VCCO_7
VCC2V5
VCC3V3 VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC3V3
GND
EOH
OUT
VCC
OSC_SMT
VCC3V3
P2
P1
P3
P4
Pushbutton
VCC3V3
VCC3V3
VCC2V5
3_D0427_D112_D03
49_D1048_D0923_D0247_D0822_D01
20_A0044_REG19_A0118_A0242_WAIT17_A0316_A0415_A0514_A0637_RDY/BSY12_A0736_WE11_A0810_A099_OEI8_A1032_CE27_CE1I31_D156_D0730_D145_D0629_D134_D0528_D12
50_GND
38_VCC13_VCC
46_BVD1
21_D00
45_BVD240_VS2
26_CD1
25_CD2
41_RESET39_CSEL
35_IOWR34_IORD
33_VS124_WP
43_INPACK
1_GND
SHIELD
PARTS=1LEVEL=STD
CFD08CFD02CFD09
VCCL_15
MPIRQMPCEMPA06MPA05MPA04MPD15MPD14MPD13MPD12MPD11MPD10MPD09MPD08MPD07MPD06MPD05MPD04MPD03MPD02MPD01MPD00MPA03MPA02MPA01MPA00MPWEMPOE
CFGINIT
CFGPROG
CFGADDR0
CFGADDR1
CFGADDR2
CLK
STATLED
ERRLED
TSTTMS
CFA07
CFA05
CFWAITCFA02
73_VCCH
92_VCCH
91_GND
100_GND
75_GND
83_GND
64_GND
54_GND
46_GND
GND_120
GND_136
GND_129
GND_144
GND_9
GND_18
GND_26
VCCL_25
MPBRDY
VCCH_109
VCCH_1
VCCL_10
57_VCCL
99_VCCL
94_VCCL
84_VCCL
VCCH_17
55_VCCH
37_VCCH
VCCH_128
CFCD2CFD10
CFCD1CFD03CFD11CFD04CFD12CFD05CFD13CFD06CFD14CFD07CFD15CFCE1CFCE2CFA10
CFD01
CFA00
CFOECFA09CFA08CFWE
CFA06
CFA03
CFREGCFA01
CFD00
CFA04
CFGRSVD
GND_111
CFGMODEPIN
POR_RESET
POR_TEST
GND_35
VCCL_126
RESET_N
POR_BYPASS
GND_110
GND_112
TSTTDO
TSTTCK
TSTTDI
CFGTCK
CFGTMS
CFGTDO
CFGTDI
(DIE DOWN)TQFP144SYSTEMACE
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Silkscreen"System ACE""Status LED"
Silkscreen"System ACE""Error LED"
"SYSACE RESET"
Combined
to FPGA
FPGA & CPUPC4 Connector
From CPLD
=OR Failsafe Mode Enabled
SysACE Failsafe Mode Jumpers
System ACE
1-9-2006_14:59
327
1.0
B
BF
2
1 C1
10UF
PROM_TDI
7811
15
414243444547484950515253565859606162636566676869707677
7879
868788
93959698
132
135
140141
73
92
91
100
7583645446
120
136
129
14491826
25
39
1091
10
57
99
94
84
17
55
37
128
1312
103104105106107113114115116117118119138121
6
4
123125130131
134
139
3142
5
137
133
111
89
72
74
35
126
33
108
110
112
97
101
102
808582
81
U2
PKG_TYPE=TQ144DEVICE=XCCACE-TQ144I
FPGA_PROM_CPLD_TCK 1 2
0R
R421FPGA_PROG_B
FPGA_TDO2 1
R183
DNP
FPGA_PROM_CPLD_TMS 1 2
0R
R420
SYSACE_TDI
1 2
0R
R42
21R33
120R
NC
NC
3272
4948234722
204419184217161514371236111098
327
316
305
294
28
150
3813
46
21
4540
26
25
4139
3534
332443
52
51P113
ACEFLASH
21
R41
4.7K
SYSACE_RESET_N
SYSACE_ERR_LED
SYSACE_RESET_N
SYSACE_ERR_LED
2
1 C53
0.1UF 2
1
3
4
SW2
21
R37
1K
21DS2
GREEN
21DS1
RED
NC
NC
2
1
3
4
X2
1
10
1112
1314
2
34
56
78
9
J20
21R35
4.7K
21
R39
1K
12
1K
R38
12
4.7K
R36
1
2
0.1UF
C52
2
1 C49
0.1UF
1
2
0.1UF
C48
2
1 C47
0.1UF
1
2
0.1UF
C50
2
1 C51
0.1UF
2
1 C59
0.1UF
1
2
0.1UF
C60
2
1 C61
0.1UF
1 2
160R
R34
12
1K
R40
NCNCNCNCNC
NC
1 2
0.1UF
C385
NC
SYSACE_CFGMODEPIN
SYSACE_MPBRDY
SYSACE_CFGADDR2
SYSACE_CFGADDR1
SYSACE_CFGADDR0
FPGA_INIT
SYSACE_MPOE_USB_RD_NSYSACE_MPWE_USB_WR_NSYSACE_MPA00SYSACE_A1_USB_A0SYSACE_A2_USB_A1SYSACE_MPA03SYSACE_USB_D0SYSACE_USB_D1SYSACE_USB_D2SYSACE_USB_D3SYSACE_USB_D4SYSACE_USB_D5SYSACE_USB_D6SYSACE_USB_D7SYSACE_USB_D8SYSACE_USB_D9SYSACE_USB_D10SYSACE_USB_D11SYSACE_USB_D12SYSACE_USB_D13SYSACE_USB_D14SYSACE_USB_D15SYSACE_MPA04SYSACE_MPA05SYSACE_MPA06SYSACE_MPCESYSACE_MPIRQ
SYSACE_CFCD2SYSACE_CFD10SYSACE_CFD09SYSACE_CFD02SYSACE_CFD08SYSACE_CFD01SYSACE_CFD00SYSACE_CFA00SYSACE_CFREGSYSACE_CFA01SYSACE_CFA02SYSACE_CFWAITSYSACE_CFA03SYSACE_CFA04SYSACE_CFA05SYSACE_CFA06SYSACE_CFRDBSYSYSACE_CFA07SYSACE_CFWESYSACE_CFA08SYSACE_CFA09SYSACE_CFDESYSACE_CFA10SYSACE_CFCE2SYSACE_CFCE1SYSACE_CFD15SYSACE_CFD07SYSACE_CFD14SYSACE_CFD06SYSACE_CFD13SYSACE_CFD05SYSACE_CFD12SYSACE_CFD04SYSACE_CFD11SYSACE_CFD03SYSACE_CFCD1
SYSACE_CLK
1 2
J29
21
J30FPGA_PROG_B
12
4.7K
R267
SYSACE_ERR_LED
NC
DIP_SW6
DIP6_1
DIP12_2DIP11_2DIP10_2
DIP8_2DIP9_2
DIP1_1DIP2_1DIP3_1DIP4_1DIP5_1
DIP7_2
VCC1V8
VCC3V3
VCC3V3
VCC3V3
D7_48D6_47
GND_46VCCO_45D5_44D4_43
DNC_42DNC_41DNC_40DNC_39VCCO_38DNC_37
VO48
GND_36DNC_35
VCCINT_34D3_33D2_32
GND_31VCCO_30D1_29D0_28
REV_SEL1_27REV_SEL0_26
EN_EXT_SEL_B_25VCCJ_24GND_23TDO_22
DNC_1GND_2DNC_3VCCINT_4BUSY_5CF_B_6GND_7VCCO_8CLKOUT_9CEO_B_10OE/RESET_B_11CLK_12CE_B_13DNC_14VCCINT_15DNC_16GND_17DNC_18TDI_19TCK_20TMS_21
DP3T_SWITCH
SHIELD
SOT23-5
GND
B
A
Y
VCC
SN74LVC1G86
VCC3V3
VCC3V3
VCC1V8
VCC3V3 VCC3V3
VCC1V8
SOT23-5SN74LVC1G126
GND
A
OE
Y
VCC
VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Plat FLASHPlat FLASH
SysACE/CPLDSysACE/CPLDSysACE/CPLD
OPEN
OPEN
OPENOPENOPEN
Short
OPEN
SHORTSHORT
D0/DIN
111
10 00
0
00
0
m2m0
Platform Flash
System ACE / Platform Flash / CPLD FlashConfiguration Switch
Toggles connection from Plat Flash D0 to SRAM D0
Config and Mode DIP switches
01
11 1
SysACE/CPLD
Plat FLASH
Plat FLASH
Cfg Switch
Stuff with 0 ohm if no Plat Flash
Silkscreen:SysACE Config, Mode pins
Platform Flash
7-8-2005_10:35
328
1.0
B
BF
12
0R
R415
2 1R231
DNP
NCSYSACE_CFGMODEPIN
12
3.3K
R167
SYSACE_CFGADDR1
3
2
1
4
5
U38
FPGA_DOUT_BUSYFPGA_PROG_B
NC
NC
FPGA_PROM_CPLD_TCK
NC
NC
NC
FPGA_INIT
PLAT_FLASH_CE_N
FPGA_PROM_CPLD_TMS
PROM_TDI
FPGA_TDI
NCNCNCNC
NC
NC
SRAM_FLASH_D7SRAM_FLASH_D6
SRAM_FLASH_D5SRAM_FLASH_D4
SRAM_FLASH_D2
SRAM_FLASH_D1FPGA_DIN
1 2
0.1UF
C381
SYSACE_CFGADDR0SYSACE_CFGADDR1
1
2
0.1UF
C277
1
2
0.1UF
C275
1
2
0.1UF
C272
12
3.3K
R195
CPLD_PROG
21
R192
4.7K
FPGA_M0
FPGA_M2
SRAM_FLASH_D0_EN
SRAM_FLASH_D0_EN
SRAM_FLASH_D0_EN
SRAM_FLASH_D0
FPGA_DIN
3
2
1
4
5
U40
12
4.7K
R194
21
R168
4.7K
9 10
11
4321 5
678
12SW12
48474645444342414039383736353433323130292827262524
2322
123456789
101112131415161718192021
U3
XCF32P-V048
PLAT_FLASH_CE_N
21
R185
4.7K
12
R191
4.7K
21
4.7K
R190
12
R189
4.7K
21
4.7K
R188
12
R187
4.7K
21
4.7K
R186
SYSACE_CFGADDR2
FPGA_M0FPGA_M1FPGA_M2
12
DNP
R193
2
1 C276
0.1UF
1
2
0.1UF
C274
2
1 C273
0.1UF
2
1 C279
0.1UF
SRAM_FLASH_D3
SYSACE_CFGADDR0
6
121110
89
12345
7
SW13
NCPLATFLASH_CPLD_CCLK
VCC5
PJ-002AH
GND
OE
OUT
VCC
OSC
VCC3V3
VCC3V3
GND
OE
OUT
VCC
OSC
P2
P1
P3
P4
Pushbutton
NC
1
3
NC
1
3
SHLD1SHLD2
SHLD3SHLD4
GPI-152-3013
VCC2V5
CON_SMA_ST
CON_SMA_ST
CON_SMA_ST
CON_SMA_ST
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381199
Battery Holder
Differential Clock Out from FPGA
CPU RESEt
Differential Clock In to FPGA
Power JackPower Switch
Mounting Holes
SMA Connectors, Power Switch,SCHEM, ML405 EVAL PLATFORM
Battery, Oscillators, Reset
BF
B
1.0
9 32
7-8-2005_10:35
SMA CONNECTORS, POWER SWITCH,
1
2
3
4
5
J9
5
4
3
2
1
J8
1
2
3
4
5
J7
5
4
3
2
1
J10
1
M7
1
M3
1
M6
1
M5
1
M4
1
M2
1
M1
SMA_DIFF_CLK_OUT_P
SMA_DIFF_CLK_OUT_N
SMA_DIFF_CLK_IN_P
SMA_DIFF_CLK_IN_N
B1
NCNC
NC
1 623 4
5
78
109
SW9
USERCLK
FPGA_CPU_RESET
FPGA_VBATT
2
1
3D1
3
1
2
D2
SYSCLK_100MHZ
2
1
3
4
SW10
4
1
5
8
X1
21R198
25.5R
12
4.7K
R196
1 2
25.5RR197
8
5
1
4
X6
1
32
J24NC
1 2
0.1UF
C386
1 2
0.1UF
C387
1
M8
VCC2V5
VCC2V5
1_G 2_S
3_D
0
VCC2V5
VCC2V5
VCC2V5
VCC2V5
P2
P1
P3
P4
Pushbutton
VCC3V3
P2
P1
P3
P4
Pushbutton
P2
P1
P3
P4
Pushbutton
P2
P1
P3
P4
Pushbutton
VCC3V3
P2
P1
P3
P4
Pushbutton
1_G 2_S
3_D
0
P2
P1
P3
P4
Pushbutton
VCC2V5
VCC3V3
VCC2V5
DIP4_2
DIP8_1
DIP7_1
DIP6_1
DIP5_1
DIP4_1
DIP3_1
DIP2_1
DIP1_1
DIP_SW8
DIP1_2
DIP2_2
DIP3_2
DIP8_2
DIP7_2
DIP6_2
DIP5_2
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
FPGA PROG
North
South
Center EastWest
LED 0 LED 1 LED 2 LED 3
GPIO LEDs and Buttons
Buttons, LEDs, SwitchesSCHEM, ML405 EVAL PLATFORM
0381199
BF
B
1.0
10 32
7-8-2005_10:35
12
330R
R171
21
R200
160R
BUS_ERROR_1
21
R422
1K
12
160R
R199
13
8
7
6
5
4
3
2
116
15
14
9
10
11
12
SW1DNP
GPIO_LED_3
21
GREEN
DS211
LED0603
21
GREEN
DS204
LED0603
21
DS12
GREEN
GPIO_LED_C
21
R58
25.5R
GPIO_LED_EGPIO_LED_W
12
25.5R
R61
GPIO_LED_NGPIO_LED_S
GPIO_SW_W
GPIO_SW_E
GPIO_SW_S
GPIO_SW_N
GPIO_SW_C
4
3
1
2
SW421
DS11
GREEN
12
4.7K
R45
21
DS3
GREEN
12
25.5R
R57
21
DS13
GREEN
21
25.5R
R60
12
25.5R
R59
21
DS14
GREEN
1 2
3 Q8
DEVICE=BSS138N
4
3
1
2
SW6
FPGA_PROG_B
FPGA_DONE
12 L
ED0603
DS205
RED
FPGA_INIT
12
25.5R
R56
GPIO_LED_0GPIO_LED_1GPIO_LED_2
GPIO_DIP_SW8
GPIO_DIP_SW7
GPIO_DIP_SW6
GPIO_DIP_SW5
GPIO_DIP_SW4
GPIO_DIP_SW3
GPIO_DIP_SW2
GPIO_DIP_SW1
124.7K
R175
2 1R172
4.7K
21
DS15
GREEN
21
R48
4.7K
2
1
3
4
SW7
12
4.7K
R47
2
1
3
4
SW5
21
R46
4.7K
2
1
3
4
SW3
21
R44
4.7K
12
GREEN
DS4
21
DS5
GREEN
12
GREEN
DS6
124.7K
R1732 1
R174
4.7K
2 1R176
4.7K
124.7K
R1772 1
R178
4.7K
124.7K
R179
21
R169
120R
12
4.7K
R170
2
1
3
4
SW8
21
RED
DS206
LED0603
12
25.5R
R233
12
25.5R
R234
12
25.5R
R235
12
330R
R239
21
R238
120R
1 2
3 Q5
DEVICE=BSS138N
12
1K R423
BUS_ERROR_2
VCC2V5
1_G
2_S
3_D
0
VCC5VCC3V3
HDR_2x32
HDR1x32
HDR_2x32
1_G
2_S
3_D
0
HDR1x32
VCC2V5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
Matched Length Traces
Differential Pairs
Matched Length Traces
Independent signals
Expansion HeadersSCHEM, ML405 EVAL PLATFORM
0381199
7-8-2005_10:35
3211
1.0
B
BF
HDR2_16HDR2_14
IIC_SDA_MAIN
IIC_SCL_MAIN
GPIO_LED_2GPIO_LED_1
GPIO_LED_3
GPIO_LED_0
HDR1_64HDR1_62HDR1_8HDR1_58HDR1_44HDR1_48HDR1_14HDR1_20HDR1_46HDR1_56HDR1_54HDR1_16HDR1_18HDR1_34HDR1_6HDR1_30HDR1_4HDR1_24HDR1_60HDR1_10HDR1_22HDR1_40HDR1_38HDR1_50HDR1_12HDR1_26HDR1_32HDR1_52HDR1_2
HDR1_42HDR1_28
HDR2_40_SYS_MON_VP6HDR2_38_SYS_MON_VN6
HDR2_30HDR2_44_SYS_MON_VP5HDR2_42_SYS_MON_VN5
HDR2_22HDR2_24
HDR2_48_SYS_MON_VP4HDR2_46_SYS_MON_VN4HDR2_64_SYS_MON_VP1HDR2_62_SYS_MON_VN1
HDR2_36_SYS_MON_VP7HDR2_34_SYS_MON_VN7HDR2_52HDR2_50HDR2_56_SYS_MON_VP3HDR2_54_SYS_MON_VN3HDR2_60_SYS_MON_VP2HDR2_58_SYS_MON_VN2
HDR2_12HDR2_10
HDR2_18
HDR2_4HDR2_26
NC
NC
NC456
32313029282726
987
3
252423222120
2
19181716151413121110
1
J3
1
2
3Q6
DEVICE=BSS138N
525355 56
1
1011 1213 1415 1617 1819
2
2021 2223 2425 2627 2829
3
3031 3233 3435 3637 3839
4
4041 4243 4445 4647 4849
5
50
67 89
51
63
585759 6061 62
54
64
J6
1
10111213141516171819
2
202122232425
3
789
26272829303132
654
J4
64
54
62616059
57 58
63
51
9876
50
5
49484746454443424140
4
39383736353433323130
3
29282726252423222120
2
19181716151413121110
1
565553
52
J5
HDR2_2
HDR2_28
HDR2_20
HDR2_8
3
2
1
Q7
DEVICE=BSS138N
FPGA_PROM_CPLD_TCKEXPANSION_TDOCPLD_TDOGPIO_LED_NGPIO_SW_NGPIO_LED_CGPIO_SW_CGPIO_LED_WGPIO_SW_WGPIO_LED_SGPIO_SW_SGPIO_LED_EGPIO_SW_E
FPGA_PROM_CPLD_TMS
NC HDR2_32
HDR1_36
HDR2_6
VCC5
VCC3V3
VCC3V3
VCC5
SN74CBTD3384
1B5
2OE_N
1B11A1
1OE_N
1B21A21B31A31B41A4
1A52A1 2B1
2B22B3
GNDVCC
2B42B5
2A22A32A42A5
VCC2V5
VCC2V5VCC5
VCC5
CONN_MD6_SH
VCC
GND
CLK
NC2
NC6
DATA
SHLDA
SHLDB MNT
CONN_MD6_SH
VCC
GND
CLK
NC2
NC6
DATA
SHLDA
SHLDB MNT
1_G
2_S
3_D
0
VCC5
VCC5
ROUT2
RIN1
VCC
C2-
C1+
DOUT1C1-
V- DIN1ROUT1
V+
C2+
GND
DIN2DOUT2RIN2
1_G
2_S
3_D
0
1_G
2_S
3_D
0
1_G
2_S
3_D
0
VCC5
VCC3V3
TSSOP8
A0 VCCWP
A2GND
A1
SDASCL
AT24C08A
VCC2V5
VCC2V5
DCD
RXD
TXD
GND
DSR
RTS
CTS
RI
DTR
SHLD
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
DTE (Serial Host)
LCD Header and Level Shifter
IIC EEPROM
LCD, PS2, UART, IIC EEPROM
BF
7-8-2005_10:35
3212
1.0
B
1
2
3
5
6
7
8
9
4
11
10
P3
21
R389
0R
12
10K
R70
IIC_SDA_MAINIIC_SCL_MAIN
1 87
34
2
56
U57
2 31
J27
LCD_DB7LCD_DB6LCD_DB5LCD_DB4
NCNC
NCNCNCNC
NCNCNC
21
FB0805
FB2
UART_SOUT
12
4.7K
R72
2
10.1UF
C280
USB_SERIAL_RX
UART_SIN
2
1
0.1UF
C66
1
2
C2810.1UF
1
10111213
23456789
16
1415
U15
LCM-S01602DTR
1
2
3
R1
LCD_ELCD_RWLCD_RS
LCD_VEE
3
2
1
Q4
DEVICE=BSS138N
1
2
3Q3
DEVICE=BSS138N
1
2
3Q2
DEVICE=BSS138N
MOUSE_DATA
MOUSE_CLK
KEYBOARD_DATA
KEYBOARD_CLK
1
345
1110
14
7
15
13
8
12
9
2
6
16
U12
MAX3232CPWR
NC
12
4.7K
R64
21
R62
3.3K
2
1470PF
C63
1
2
C62
470PF
1 2FB1
FB0805
3
2
1
Q1
DEVICE=BSS138N
4 3 526 198 7
J18
21
R71
10K
1
2
0.1UF
C69 2
1 C68
0.1UF
1
2
C67
0.1UF
2
1 C70
0.1UF
21
R63
3.3K
21
R65
4.7K
12
4.7K
R69
12
3.3K
R68
1 2FB4
FB080578 9 16 2 534
J17
21
FB0805
FB3
2
1
470PF
C65
1
2
C64470PF
12
3.3K
R672
1R66
4.7K
NC
NC
NC
NC
NC
10
13
23
1
546798
1114 15
1619
1224
2023
17182122
U39
12
4.7K
R263
USB_SERIAL_TX
12FB11
FB0805
NCNCNC
12
DNP
R390
21
R392
DNP
12
0R
R391
12
DNP
R394
21
R393
0R
VCC2V5
VCC2V5
VCC2V5
VCC2V5
VCC2V5
VTTDDR VTTDDR
VCC2V5
VSSQ3
VSSQ2
VSSQ1
VSSQ0
VSS2
VSS1
VSS0
VSSQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
VDD2
VDD1
DM1
DQS1
A13DQ12
DQ14DQ13
DQ15DQ9
DQ10DQ8
DQ11DQ4
DQ6DQ5
DQ7
DQ2
A6
DQ0
DQ3 A0
A11A2
A10/AP
A3
A9
A4
A8
A5
A7A1
A12
DM0
DQS0
BA0
WECAS
RAS
CSCKEDQ1
CKCK
VREF
VDD0
VDDQ4
BA1
DDR SDRAM64Mx16x4
VSSQ3
VSSQ2
VSSQ1
VSSQ0
VSS2
VSS1
VSS0
VSSQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
VDD2
VDD1
DM1
DQS1
A13DQ12
DQ14DQ13
DQ15DQ9
DQ10DQ8
DQ11DQ4
DQ6DQ5
DQ7
DQ2
A6
DQ0
DQ3 A0
A11A2
A10/AP
A3
A9
A4
A8
A5
A7A1
A12
DM0
DQS0
BA0
WECAS
RAS
CSCKEDQ1
CKCK
VREF
VDD0
VDDQ4
BA1
DDR SDRAM64Mx16x4
VTTDDR
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Matched Length Nets
DDR Memory
B
7-8-2005_10:35
3213
1.0
BF
4321
5678
RP1647R
4321
5678
RP1547R
4321
5678
RP1447R
4321
5678
RP1347R
4321
5678
RP1247R
4321
5678
RP1147R
4321
5678
RP1047R
4321
5678
RP947R
8765
1234RP7
47R
8765
1234RP6
47R
NC
DDR_D16
1 2R73
47R
DDR_D15
DDR_D11
DDR_A10
DDR_DM1
DDR_A4
DDR_A9DDR_A8
DDR_A5
DDR_A13
58
52
12
6 66
48
34
64
55
15
9 3 33
18
4751
1760
6362
6556
5754
59
8
1110
135
37
2 7 29
4131
28
32
40
35
39
36
3830
42
2016
26
2122232444
4
4546
49
161
27
TSOP66HYB25D256160BT-7F
U5
1
2
C82
0.1UF
1
2
C80
0.1UF
1
2
C790.1UF
2
10.1UF
C781
2
C770.1UF
2
10.1UF
C761
2
C740.1UF
58
52
12
6 66
48
34
64
55
15
9 3 33
18
4751
1760
6362
6556
5754
59
8
1110
135
37
2 7 29
4131
28
32
40
35
39
36
3830
42
2016
26
2122232444
4
4546
49
161
27
TSOP66HYB25D256160BT-7F
U4
2
10.1UF
C75
2
10.1UF
C731
2
C720.1UF
2
1
100UF
C302
B
1
2 B
C301
100UF
2
1
100UF
C300
B
2
10.1UF
C4081
2
C4070.1UF
2
1
0.1UF
C71 1
2 B
C38
100UF
2
1
100UF
C39
B
1
2 B
C40
100UF
2
1
100UF
C41
B
4321
5678
RP4
47R
4321
5678
RP5
47R
4321
5678
RP8
47R
8765
1234RP3
47R
8765
1234RP2
47R4321
5678
RP1
47R
2
1
0.1UF
C81
1
2
C421
0.1UF
2
1
0.1UF
C422
1
2
C423
0.1UF
2
1
0.1UF
C424
DDR_CS_N
DDR_RAS_NDDR_CAS_NDDR_WE_N
DDR_BA1DDR_BA0
DDR_A3DDR_A2DDR_A1DDR_A0
DDR_DQS3
DDR_DM3
DDR_D30DDR_D29DDR_D28DDR_D27DDR_D26DDR_D25DDR_D24
DDR_DQS2
DDR_DM2
DDR_D23
DDR_D20DDR_D19DDR_D18DDR_D17
DDR_D22
DDR_D0DDR_D1DDR_D2
DDR_D3DDR_D4DDR_D5DDR_D6
DDR_DM0
DDR_D8DDR_D9DDR_D10
DDR_D12DDR_D13DDR_D14
DDR_DQS1
DDR_CKE
DDR_CK1_NDDR_CK1_P
DDR_A6DDR_A7
DDR_D21
DDR_D31
DDR_A11DDR_A12
DDR_D7DDR_DQS0
NC
VCC1V2
VCC1V2
VCC1V2
VCC2V5
VCC2V5
VCC2V5
VCC2V5
VCC2V5
VCC2V5
VCC2V5
04020402
0402
0402
0402
0402
0402
0402
FB0805
VCC2V5
XTAL_SMD
0402
0402
0402
0402
LEVEL=STDPARTS=1
DEVICE=M88E1111
PKG_TYPE=BCC_96
AVDD_32
AVDD_35
AVDD_36
AVDD_40
AVDD_45
AVDD_78
CLK125
COL
COMA
CONFIG0
CONFIG1
CONFIG2
CONFIG3
CONFIG4
CONFIG5
CONFIG6
CRS
DVDD_1
DVDD_10
DVDD_15
DVDD_57
DVDD_6
DVDD_62
DVDD_67
DVDD_71
DVDD_85
GTXCLK
HSDACN
HSDACP
INT
LED_DPLX
LED_LINK10
LED_LINK100
LED_LINK1000
LED_RX
LED_TX
MDC
MDIN_0
MDIN_1
MDIN_2
MDIN_3
MDIO
MDIP_0
MDIP_1
MDIP_2
MDIP_3
N/C
RESET
RSET
RXCLK RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
RXDVRXER
RXN
RXP
SEL_OSC
TCN
TCP
TDI
TDO
TMS
TRST
TXCLK
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
TXEN
TXER
TXN
TXP
VDDOH_52
VDDOH_66
VDDOH_72
VDDOX_26
VDDOX_48
N/C_13
VDDO_21
VDDO_5
VDDO_88
VDDO_96
VSSC
XTAL1
XTAL2
TCK
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
038119910/100/1000 PHY
B
1.05-9-2006_16:36
3214 BF
32
35
36
40
45
78
22
83
27
65
64
63
61
60
59
58
84
1
10
15
57
6
62
67
71
85
8
38
37
23
70
76
74
73
69
68
25
31
34
41
43
24
29
33
39
42
51
28
30
2 95
92
93
91
90
89
87
86
943
81
82
56
80
79
44
50
46
47
4
11
12
14
16
17
18
19
20
9
7
75
77
52
66
72
26
48
13
21
5
88
96
53
55
54
49
U70
2
1 C378
10UF
2
1 C379
10UF
2
1 C377
10UF
2
1 C5
10UF
PHY_LED_DUPLEX
21C460
0.01UF
1 2
0.01UF
C461
1 2
0.01UF
C459
21C458
0.01UF
SGMII_TXP
X3
25.000MHZ
PHY_CONFIG4
PHY_CONFIG5
PHY_LED_LINK10
PHY_LED_RX
SGMII_TXN
SGMII_RXN
SGMII_RXP
NC
NC
PHY_COL
1
2
1000PF
C102
1
2
22PFC104
2
1C10322PF
NC
PHY_LED_TX
PHY_RXD2
PHY_RXD0
PHY_RXD1PHY_RXD[0:3]
PHY_RXD3
PHY_TXD2
PHY_TXD0
PHY_TXD3
PHY_TXD[0:3]
PHY_TXD1
PHY_TXCLK
PHY_TXER
PHY_TXC_GTXCLK
PHY_TXCTL_TXEN
1 2
49.9R
R269
21R270
49.9R
21R80
4.7K
21FB10
PHY_AVDD0
PHY_CRS
PHY_MDIO
PHY_INT
NC
NC
2
1 C99
0.01UF
1
2
0.01UFC98
1
20.1UF
C100
2
1 C101
0.1UF
2
1 C96
0.01UF
1
2
0.01UF
C94
2
1 C890.01UF
1
2
0.01UFC87
1
2
0.01UFC90
2
1 C840.01UF
2
1 C85
0.1UF
1
21000PF
C91
NC
PHY_MDIP2
PHY_AVDD0
2
1 C97
0.1UF
NC
12GREEN
DS1721
R93
249R
1 2
249R
R92
PHY_MDC
PHY_LED_LINK1000
PHY_LED_LINK100
2 1
DS16
GREEN12
GREEN
DS21021
R204
249R
12GREEN
DS207
1 2
249R
R203
21R201
249R 21R202
249R
12GREEN
DS208
NC
1 2
4.7K
R83
21R94
1M
PHY_RXD5
PHY_RXD[4:7]
PHY_RXD4
PHY_RXD6
PHY_RXD7
PHY_MDIN2
21
R85
4.7K
12
4.7K
R88
21R82
4.7K
1 2
4.7K
R81
2
1 C95
1000PF
1
2
0.1UF
C93
2
1 C92
1000PF
2
1 C88
1000PF
1
20.1UF
C83
1
20.1UF
C86
PHY_RXER
PHY_RXCTL_RXDV
PHY_MDIP3
PHY_MDIP1
PHY_MDIP0
PHY_MDIN3
PHY_MDIN1
PHY_MDIN0
21R78
4.7K
12
4.7K
R86
21
R87
4.7K
2 1
DS209
GREEN
PHY_LED_RX
NC
NC
PHY_AVDD0
PHY_RESET
PHY_TXD6
PHY_TXD5
PHY_TXD[4:7]PHY_TXD7
PHY_TXD4
PHY_RXC_RXCLK
VCC2V5VCC2V5
FB0805
PKG_TYPE=RJ45_HFJ11-1G01ELEVEL=STDPARTS=1
DEVICE=RJ45_HFJ11-1G01E
TD1_P
TD0_N
TD1_N
TD2_P
TD2_N
TD3_N
TD3_P
VCC
TD0_P
GND SHIELD1
SHIELD2
10/100/1000RJ45 ANDMAGNETICS
0402
0402
0402
0402
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
111
111
111
000
Pin
VCC2V5
PHY_LED_LINK10
PHY_LED_LINK100
111
Bit[2:0]
Pin to Constant Mapping
PHY_LED_LINK1000
PHY_LED_DUPLEX
PHY_LED_RX
PHY_LED_TX
GND
110
101
100
011
010
001
000
CONFIG1
CONFIG2
CONFIG3
CONFIG4
CONFIG5
CONFIG6
CONFIG0 PHYADR[1]
PHYADR[4]
PHYADR[2]
ENA_PAUSE
ANEG[0]
ANEG[3]
ENA_XC
HWCFG_MODE[2] HWCFG_MODE[1]
PHYADR[3]
ANEG[2] ANEG[1]
DIS_125
HWCFG_MODE[0]
HWCFG_MODE[3]DIS_FC DIS_SLEEP
SEL_BDT INT_POL 75/50 OHM
000
111
010
PHYAddress "00000". Do notadvertise the PAUSE bit
Interrupt. 50Ohm SERDES option.
PHYADR[0]
Bit[0]Pin Bit[2] Bit[1]
Auto-Neg enabled, advertise allcapabilities; prefer slave. Autocrossover enabled. 125 CLK optiondisabled.
detect diasabled. Sleep mode disabled.GMII to Cu mode. Fiber/copper auto-
MDC/MDIO selected. Active LOW
J48, J49 pins 1-2: GMII/MII to CuJ48, J49 pins 2-3: SGMII to Cu, no clkJ48 pins 1-2, J57 ON: RGMII, modified MII in Cu
RJ45 Connector andPHY Decoupling
SCHEM, ML405 EVAL PLATFORM
0381199
B
1.0
15 32
7-8-2005_10:35
BF
3
2
1
J49
PHY_LED_DUPLEX
PHY_LED_LINK1000
1
2
3
J48
PHY_CONFIG4
1
2J57
PHY_CONFIG5PHY_LED_LINK10
PHY_AVDD0
1 2
0.01UF
C157
1 2
0.01UF
C156
21C155
0.01UF
1 2
0.01UF
C154
PHY_MDIN3
PHY_MDIP3
PHY_MDIN2
PHY_MDIP2
PHY_MDIN1
PHY_MDIP1
PHY_MDIN0
PHY_MDIP0
21R159
49.9R
1 249.9R
R164
21R158
49.9R
1 249.9R
R157
21R161
49.9R
1 249.9R
R160
1 249.9R
R163
21R162
49.9R
3
2
6
4
5
8
7
9
1
10 11
12
P114
21FB12
VCC2V5
VCC5
0402 0402
GND_VIDEO
VCC2V5
VCC2V5
SOT23-5
EN
GND
IN
NR_FB
OUT
TPS73633DBVT
0402
GND_VIDEO
GND_VIDEO
GND_VIDEO
VCC5
1_G
2_S
3_D
0
VCC5
1_G
2_S
3_D
0
BGND
BLUE
GGND
GND1
GND2
GREEN
HSYNC
ID0
ID1
NC1
NC2
RED
RGND
VSYNC
NC3
SHLD1
SHLD2
VGA HD15
VCC5
GND2GND3B0B1B2B3B4B5B6B7
BLANK_N
CLOCK
COMP
GND0
GND1
G0
G1
G2
G3
G4
G5
G6
G7
GND4
GND5
IOB_N
IOG
IOG_N
IOR
IOR_N
PSAVE_NGND6GND7R0R1R2R3R4R5R6R7
RSET
SYNC_N
VAA0
VAA1
VAA2
VREF
IOB
LQFP48
FB0805
FB0805
FB0805
FB0805
FB0805
0402
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
VCCA VCCB
B1A1
A2 B2
DIRGND
SN74LVC2T45
SSOP8
0381199
Near VAA1 Pin
VGA_SYNC_N
Near VAA2 Pin
Near U13
with small copper traceConnect Digital GND to GND_VID island
GND
GND_VIDIsland
Near VAA0 Pin
SCHEM, ML405 EVAL PLATFORMVGA Codec
2 1R306
25.5R
16 32
1-11-2006_13:56 1.0
B
BF
2
1DNP
C589
2 1R307
25.5R
2
1DNP
C569
2
1DNP
C570
1 8
72
3 6
54
U68
1
2 DNP
C582
1
2
0.01UFC574
2
1 C383
10UF
2
1 C577
1UF0805
21FB18
1 2FB17
21FB16
21FB25
1 2FB26
14151617181920212223
11
24
35
12345678910
25
26
27
32
31
34
33
3839404142434445464748
37
12
13
29
30
36
28U13
ADV7125
8
3
7
5
10
2
13
11
12
4
9
1
6
14
15
16
17
P2
12
75R
R95
21
R96
75R
12
75R
R97
NC
12
4.7K
R379
1
2
C4010.1UF
32
1
Q11 BSS138N
1
2 3Q12
BSS138N
1
2
0.01UFC110
2
1
0.1UF
C106
3
2
1
4
5
U69
1
2
C1050.1UF
VGA_HSYNC
VGA_VSYNC
21
R101
523R
1
2
C1090.1UF
2
10.1UF
C108
IIC_SCL_VGA
IIC_SDA_VGA
NC
21
R380
4.7K
VGA_R0VGA_R1VGA_R2VGA_R3VGA_R4VGA_R5VGA_R6VGA_R7
21
0.1UF
C402
2
1
0.1UF
C111
1
2
0.01UFC112
2
1 C1070.01UF
VGA_B7
VGA_G7VGA_G6VGA_G5VGA_G4VGA_G3VGA_G2VGA_G1VGA_G0
VGA_B6VGA_B5VGA_B4VGA_B3VGA_B2VGA_B1VGA_B0
12
0R
R416
21
R417
DNP
VGA_CLK
1
2
C588DNP
VCC5
FB0805
FB0805
VCC5_AUDIO
VCC3V3
VCC5_AUDIO
D
D
PARTS=1LEVEL=STD
DVDD1_1
XTL_IN_2
XTL_OUT_3
DVSS1_4
SDATA_OUT_5
BIT_CLK_6
DVSS2_7
SDATA_IN_8
DVDD2_9
SYNC_10
RESET_N_11
PC_BEEP_12
13_PHONE_IN14_AUX_L15_AUX_R16_VIDEO_L17_VIDEO_R18_CD_L19_CD_GND_REF20_CD_R21_MIC122_MIC223_LINE_IN_L24_LINE_IN_R
25_AVDD1
26_AVSS1
27_VREF
28_VREFOUT
29_NC_AFILT1
30_NC_AFLIT2
31_NC_FILT_R
32_NC_FILT_L
33_3DN_RX3D
34_3DP_CX3D
35_LINE_OUT_L
36_LINE_OUT_R
MONO_OUT_37NC_AVDD2_38HP_OUT_L_39
HP_OUT_C_AVSS2_40HP_OUT_R_41
NC_42NC_AVDD3_43NC_AVSS3_44
ID0_45ID1_46
EAPD_JS0_47CIN_JS1_48
LM4550LQFP48
XTAL_SMD
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199Audio Codec
BF
B
1.0
17 32
7-8-2005_10:35
21C118
0.022UF
0603
1
233PF
C125
X4
24.576MHZ
2
1 C23
1UF0805
12345678910
11
12
131415161718192021222324
252627282930313233343536
373839404142434445464748
U14
DEVICE=LM4550VHPKG_TYPE=LQFP48
2
1 C10
220PF
GND_AUDIO
21220UF
C18
1 2
C17
220UF
2
1 C11
2.2UF
1
22.2UF
C403
2
1 C380
1UF
0805
2
1 C21
1UF
0805
2
1 C123
0.1UF
12
3.3K
R119
21
R120
3.3K
12
47R
R110
1
20.1UF
C1151
2
08051UF
C13
21C15
1UF
0805
1
2
5
3
4
J13
LINE_OUTPUT_JACK
1
2
5
3
4
J11
MICROPHONE_JACK
1
20.1UF
C116
21
R108
49.9K
4
3
5
2
1
J12
LINE_INPUT_JACK
2 1R109
2.2K
12
6.81KR112
21C9
1UF
0805
12
1K
R107
2
1 C117
0.1UF
1
20.1UF
C113
21R121
1M1 2
FB7
21FB8
1
2
0805
1UF
C22
2
1 C124
33PF
1
20.1UF
C114
2 1R111
6.81K
1 2
08051UF
C12
21C14
1UF
0805
12
6.81K
R114 21
R113
6.81K
12
10KR115
2
1 C119
220PF
1
2220PF
C120
21
R116
10K
1 2
08051UF
C16
12
10KR118
2
1 C122
220PF
21
R117
10K
4
3
5
2
1
HEADPHONE_JACK
J14
1
2
08051UF
C19
2 1R240
10K
2
1 C121
220PF
NCNCNCNCNCNCNC
NCNC
NCNCNCNC
FLASH_AUDIO_RESET_N
AUDIO_SDATA_IN
AUDIO_BIT_CLKAUDIO_SDATA_OUT
AUDIO_SYNC
FB0805
VCC3V3
FB0805
0402
A
IND_1210
REF3025OUT
GND
IN
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199System Monitor DVM Circuit
BF
B
1.0
18 32
7-8-2005_10:35
2
1 C2970.22UF
1
2
0.22UFC420
2 1R272
4.02K
21
R216
2.7R
SYS_MON_VREFP
SYS_MON_AVDD
GND_SYSMON
2
3
1
U37
1 2
L4220UH
1
2
0.1UFC295
2
1 C2711UF
2
1 C296
0.1UF
1 2
J2221
C294
1000PF
SYS_MON_VN0
SYS_MON_VP0
21C298
0.01UF
21
R212
1K
21
1K
R215
12
4.02K
R213
1 2
J21
2 1R271
4.02K
2 1
1K
R214
2 1FB14
GND_SYSMON
1 2FB15
RST_N
VDD
VSS
D
VCC3V3VCC3V3
USB_A
VCC
GND
D-
D+
USB_B
VCC
D-
D+
GND
USB_B
VCC
D-
D+
GND
FB0805
SOP8
ENOUT2IN
GNDNC1
FLG
NC2OUT1
MIC2525-2B
VCC5
FB0805
VCC3V3
VCC3V3
0402
XTAL_SMD
VCC3V3
VCC3V3
VCC3V3
VCC3V3
GND1_51GPIO19_A0_CS0_52
GPIO18_A2_RTS__53GPIO17_A1_RXD__54
GPIO16_A0_TXD_PWM0_55GPIO15_D15_nSSI_56
GPIO14_D14_57GPIO13_D13_58
GPIO10_D10_SCK_61nRD_62
VCC0_63nWR_64
GPIO9_D9_nSSI_65GPIO8_D8_MISO_66
D15_CTS_67D14_RTS_68D13_RXD_69
GND2_75D8_MISO_74D9_nSSI_73
D7_76
D6_77
D5_78
D4_79
D3_80
D2_81
D1_82
D0_83
nRESET_85
GPIO6_D6_87
GPIO7_D7_86
VCC2_88
GPIO5_D5_89
GPIO4_D4_90
GPIO3_D3_91
GPIO2_D2_92
GPIO0_D0_94
GPIO1_D1_93
A17_95
A18_96
nBEH_98
A16_97
nBEL_A0_99
GND3_100
1_A12_A23_A34_DM2B5_DP2B6_AGND7_A48_A59_DM2A10_DP2A11_OTGVBUS12_CSWITCHB13_CSWITCHA14_VSWITCH15_BOOSTGND16_BOOSTVCC17_A618_DM1B19_DP1B20_A721_AVCC
23_DP1A24_A825_A9
26_GND0
27_A10
28_XTALOUT
29_XTALIN
30_A11
31_A12
32_A13
33_A14
34_nMEMSEL
35_nROMSEL
36_nRAMSEL
37_VCC1
38_A15
39_GPIO31_SCK
40_GPIO30_SDA
41_GPIO29_OTGID
42_GPIO28_TX
43_GPIO27_RX
44_GPIO26_CTS_PWM3
45_GPIO25_IRQ1
46_GPIO24_INT_IORDY_IRQ0
47_GPIO23_nRD_IOR
48_GPIO22_nWR_IOW
49_GPIO21_nCS
50_GPIO20_A1_CS1
GPIO12_D12_59GPIO11_D11_MOSI_60
D11_MOSI_71D12_TXD_70
D10_SCK_72
Reserved_84
22_DM1A
CY7C67300-100AI
TQFP100
(DIE UP)
A0 VCCWP
A2VSS
A1
SDASCL
TSSOP8 ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Reset Supervisor
Bypass cap for USB chip
USB Host 1USB Power
1Kb to 16Kb EEPROM
Above 16Kb EEPROM
SCL -> GPIO30SDA -> GPIO31
SCL -> GPIO31SDA -> GPIO30
POR for USB
USB Peripheral 1
USB Peripheral 2
USB
BF
B
1.07-8-2005_10:35
19 32
1 87
34
2
56
U17
24LC128IST
IIC_SDA_USBIIC_SCL_USB
USB_GPIO30
USB_GPIO31
5152535455565758
616263646566676869
757473
76
77
78
79
80
81
82
83
85
87
86
88
89
90
91
92
94
93
95
96
98
97
99
100
123456789
101112131415161718192021
232425
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
5960
7170
72
84
22
U11
NC
1 2
J31
1 2
J32
1
2 J28
NC
USB_RESET_N
2
1 C425
0.1UF12
49.9K
R276
X512MHZ
21C127
22PF
2 1R280
DNP
USB_GPIO29
2 1R281
0R
2 1R278
DNP
12
0R
R279
21C133
0.1UF
1 222PF
C126
NC
NCNCNCNC
NC
12
10KR265
USB_GPIO26
USB_SERIAL_RX
2 1R277
0RUSB_GPIO26
USB_GPIO29
12
4.7K
R268
2 1R275
20.0K
2
1 C4180.01UF
21
R264
10K
21
R273
2.80K
21
R122
1M
2
1 C419
0.1UF
1
20.1UF
C132
2 1FB13
187
34
2
56
U44
12FB9
1
2
3
4
J1
4
3
2
1
J2
1
4
2
3
J19
1
2
C42150UF
1
20.1UF
C128
2
1 C129
0.1UF
1
20.1UF
C130
2
1 C131
0.1UF
NC NC
12
49.9K
R274
USB_GPIO25
NC
NCNC
SYSACE_USB_D11SYSACE_USB_D12
SYSACE_A2_USB_A1
USB_CS_N
SYSACE_MPWE_USB_WR_N
SYSACE_MPOE_USB_RD_N
USB_INT
USB_GPIO25
USB_SERIAL_TX
NCNC
NC
NC
NCNCNC
NC
NCNCNC
NC
NC
NC
NC
NC
SYSACE_USB_D1
SYSACE_USB_D0
SYSACE_USB_D2
SYSACE_USB_D3
SYSACE_USB_D4
SYSACE_USB_D5
SYSACE_USB_D7
SYSACE_USB_D6
NC
NC
NC
NC
NC
NC
NC
NC
NCNC
NCNCNC
SYSACE_USB_D8SYSACE_USB_D9
NC
NCSYSACE_USB_D10
SYSACE_USB_D13SYSACE_USB_D14SYSACE_USB_D15
NCNCNC
SYSACE_A1_USB_A0
21
R282
4.7K
12
49.9K
R284
2 1R283
20.0K
2
1 C426
0.1UF
2
1 C427
0.1UF
12
3U46
MCP130
NCNC
NC
VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC3V3
A1
A10A11
A12A13
A14A15A16A17
A2
A20A21A22
A24
A3A4A5A6A7A8
A9
BYTE_N
CE0CE1CE2
DQ0
DQ10DQ11DQ12DQ13DQ14DQ15
DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9
GND2
OE_N
RP_N
STS
VCC0VCC1
VCCQ
WE_N
A0
A18A19
A23
DQ1
VPEN
GND0GND1
A1
A10A11
A12A13
A14A15A16A17
A2
A20A21A22
A24
A3A4A5A6A7A8
A9
BYTE_N
CE0CE1CE2
DQ0
DQ10DQ11DQ12DQ13DQ14DQ15
DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9
GND2
OE_N
RP_N
STS
VCC0VCC1
VCCQ
WE_N
A0
A18A19
A23
DQ1
VPEN
GND0GND1
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
(256)(128)(64)
FLASHFLASH
Bypass and Bulk capacitors
(64)(128)(256)
Flash Memory
BF
B
1.0
20 32
7-8-2005_10:35
2
1 C384
10UF
FLASH_CE2_SRAM_CE1_N
FLASH_AUDIO_RESET_NFLASH_AUDIO_RESET_N
4221
15
35
30
56
32
55
43
379
53
16
54
48
3634514946444038
525047454139
33
292
14
31
19202223242526
56
134
27
78
101112131718
28
MT28F320J3RG-11ET
U7
TSOP56
28
181713121110
87
27
431
56
26252423222019
31
142
29
33
394145475052
3840444649513436
48
54
16
53
937
43
55
32
65
30
35
15
2142
U6
MT28F320J3RG-11ET
TSOP56
21
R148
4.7K
12
4.7K
R241
21
R154
4.7K
21
R149
4.7K
2
1 C319
0.1UF 2
1 C321
0.1UF
1
2 0.1UF
C3201
2 0.1UF
C318
2
1 C317
0.1UF
1
2 0.1UF
C316
FLASH_BYTE_N
SRAM_FLASH_A22SRAM_FLASH_A21
FLASH_A0
FLASH_CE2_SRAM_CE1_N
SRAM_FLASH_D23SRAM_FLASH_D24
SRAM_FLASH_D16SRAM_FLASH_D17
SRAM_FLASH_D29
SRAM_FLASH_D19
SRAM_FLASH_D22
SRAM_FLASH_D26
SRAM_FLASH_D28
SRAM_FLASH_D30
SRAM_FLASH_D27
SRAM_FLASH_D25
SRAM_FLASH_D21SRAM_FLASH_D20
SRAM_FLASH_D18
SRAM_FLASH_D31
SRAM_FLASH_OE_NSRAM_FLASH_WE_N
SRAM_FLASH_A17SRAM_FLASH_A16
SRAM_FLASH_A20SRAM_FLASH_A19SRAM_FLASH_A18
SRAM_FLASH_A15SRAM_FLASH_A14
SRAM_FLASH_A9SRAM_FLASH_A8
SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10
SRAM_FLASH_A2SRAM_FLASH_A3SRAM_FLASH_A4SRAM_FLASH_A5
SRAM_FLASH_A1
SRAM_FLASH_A6SRAM_FLASH_A7
SRAM_FLASH_A0
21
R151
4.7K
12
4.7K
R262
SRAM_FLASH_D1
SRAM_FLASH_A22
SRAM_FLASH_A18SRAM_FLASH_A17
FLASH_A0
SRAM_FLASH_WE_N
SRAM_FLASH_D9SRAM_FLASH_D8SRAM_FLASH_D7SRAM_FLASH_D6SRAM_FLASH_D5SRAM_FLASH_D4SRAM_FLASH_D3SRAM_FLASH_D2
SRAM_FLASH_D15SRAM_FLASH_D14SRAM_FLASH_D13SRAM_FLASH_D12SRAM_FLASH_D11SRAM_FLASH_D10
SRAM_FLASH_D0
SRAM_FLASH_A8SRAM_FLASH_A7SRAM_FLASH_A6SRAM_FLASH_A5SRAM_FLASH_A4SRAM_FLASH_A3SRAM_FLASH_A2
FLASH_A23
SRAM_FLASH_A21SRAM_FLASH_A20SRAM_FLASH_A19
SRAM_FLASH_A1
SRAM_FLASH_A16SRAM_FLASH_A15SRAM_FLASH_A14SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10SRAM_FLASH_A9
SRAM_FLASH_A0
FLASH_BYTE_N
SRAM_FLASH_OE_N
FLASH_A23
VCC3V3
VCC3V3VCC3V3
VCC3V3
VCC3V3
VCC3V3
37_A036_A135_A34_A33_A32_A44_A45_A46_A47_A48_A49_A50_A81_A82_A83_A99_A100_A84_E1843_E3642_E7239_E14438_E288
93_BWA_N94_BWB_N95_BWC_N96_BWD_N
1_DQPC2_DQC3_DQC6_DQC7_DQC8_DQC9_DQC12_DQC13_DQC18_DQD19_DQD22_DQD23_DQD24_DQD25_DQD
VDDQ_4VDDQ_11VDDQ_15VDDQ_20VDDQ_27VDD_41
VDDQ_54VDDQ_61VDD_65
VDDQ_70VDDQ_77VDD_91VSS_5VSS_10VSS_17VSS_21VSS_26VSS_40VSS_55VSS_60VSS_67VSS_71VSS_76VSS_90NC_14NC_16NC_66
28_DQD
DQPD_30DQD_29
DQPA_51DQA_52DQA_53DQA_56DQA_57DQA_58DQA_59DQA_62DQA_63DQB_68DQB_69DQB_72DQB_73DQB_74DQB_75DQB_78DQB_79DQPB_80
TQFP100CY7C1354B
85_ADV/LD_N
88_WE_N86_OE_N
89_CLK
MODE_31ZZ_64
87_CEN_N
98_CE1_N97_CE292_CE3_N
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
The burst order mode of the SRAM is set to "Linear" by default
ZBT SRAM
7-8-2005_10:35
3221
1.0
B
BF
1
20.1UF
C283
2
1 C269
10UF
SRAM_ADV_LD_N
12
4.7K
R208
8765
1234
RP2047R
4321
5678
RP2147R
4321
5678
RP1947R
8765
1234
RP1847R
4321
5678
RP1747R
SRAM_BW3SRAM_BW2
SRAM_BW1SRAM_BW0
SRAM_FLASH_D0
SRAM_FLASH_D8
SRAM_FLASH_D1
SRAM_FLASH_D9
SRAM_FLASH_D2
SRAM_FLASH_D10
SRAM_FLASH_D3
SRAM_FLASH_D11
SRAM_FLASH_D4
SRAM_FLASH_D12
SRAM_FLASH_D5
SRAM_FLASH_D13
SRAM_FLASH_D6
SRAM_FLASH_D14
SRAM_FLASH_D7
SRAM_FLASH_D15
SRAM_FLASH_D31
SRAM_FLASH_D23
SRAM_FLASH_D30
SRAM_FLASH_D22
SRAM_FLASH_D29
SRAM_FLASH_D21
SRAM_FLASH_D28
SRAM_FLASH_D20
SRAM_FLASH_D27
SRAM_FLASH_D19
SRAM_FLASH_D26
SRAM_FLASH_D18
SRAM_FLASH_D25
SRAM_FLASH_D17
SRAM_FLASH_D24
SRAM_FLASH_D16 SRAM_FLASH_D16_RESSRAM_FLASH_D17_RESSRAM_FLASH_D18_RESSRAM_FLASH_D19_RESSRAM_FLASH_D20_RESSRAM_FLASH_D21_RESSRAM_FLASH_D22_RESSRAM_FLASH_D23_RES
SRAM_FLASH_D24_RESSRAM_FLASH_D25_RESSRAM_FLASH_D26_RESSRAM_FLASH_D27_RESSRAM_FLASH_D28_RESSRAM_FLASH_D29_RESSRAM_FLASH_D30_RESSRAM_FLASH_D31_RES
SRAM_FLASH_D15_RESSRAM_FLASH_D14_RESSRAM_FLASH_D13_RESSRAM_FLASH_D12_RESSRAM_FLASH_D11_RESSRAM_FLASH_D10_RESSRAM_FLASH_D9_RESSRAM_FLASH_D8_RES
SRAM_DQP2
SRAM_DQP1
SRAM_DQP3SRAM_DQP0
37363534333244454647484950818283991008443423938
93949596
12367891213181922232425
4111520274154616570779151017212640556067717690141666
28
3029
515253565758596263686972737475787980
85
8886
89
3164
87
989792
U41
1 2R286
47R
21
47R
R288
1 2R285
47R
21
47R
R287
21R211
4.7K
SRAM_FLASH_OE_NSRAM_FLASH_WE_N
SRAM_MODE
21
R209
4.7K
FLASH_CE2_SRAM_CE1_N
SRAM_ZZ
SRAM_FLASH_A22SRAM_FLASH_A21
SRAM_FLASH_A17SRAM_FLASH_A16
SRAM_FLASH_A20SRAM_FLASH_A19SRAM_FLASH_A18
SRAM_FLASH_A15SRAM_FLASH_A14
SRAM_FLASH_A9SRAM_FLASH_A8
SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10
SRAM_FLASH_A2SRAM_FLASH_A3SRAM_FLASH_A4SRAM_FLASH_A5
SRAM_FLASH_A0SRAM_FLASH_A1
SRAM_FLASH_A6SRAM_FLASH_A7
NCNCNC
2
1 C282
0.1UF2
1 C284
0.1UF
1
20.1UF
C285
2
1 C286
0.1UF
1
20.1UF
C289
2
1 C288
0.1UF
1
20.1UF
C287
12
4.7K
R210
8765
123447R
RP22
4321
5678
RP2347R
8765
123447R
RP24
SRAM_FLASH_D0_RESSRAM_FLASH_D1_RESSRAM_FLASH_D2_RES
SRAM_FLASH_D4_RESSRAM_FLASH_D5_RES
SRAM_FLASH_D3_RES
SRAM_FLASH_D6_RES
SRAM_FLASH_D8_RES
SRAM_FLASH_D10_RESSRAM_FLASH_D11_RESSRAM_FLASH_D12_RESSRAM_FLASH_D13_RESSRAM_FLASH_D14_RESSRAM_FLASH_D15_RES
SRAM_FLASH_D9_RES
SRAM_FLASH_D7_RES
SRAM_FLASH_D17_RESSRAM_FLASH_D16_RES
SRAM_FLASH_D19_RESSRAM_FLASH_D20_RESSRAM_FLASH_D21_RES
SRAM_FLASH_D18_RES
SRAM_FLASH_D22_RESSRAM_FLASH_D23_RESSRAM_FLASH_D24_RES
SRAM_FLASH_D26_RES
SRAM_FLASH_D28_RES
SRAM_FLASH_D25_RES
SRAM_FLASH_D27_RES
SRAM_FLASH_D29_RESSRAM_FLASH_D30_RESSRAM_FLASH_D31_RES
SRAM_FLASH_D7_RESSRAM_FLASH_D6_RESSRAM_FLASH_D5_RESSRAM_FLASH_D4_RESSRAM_FLASH_D3_RESSRAM_FLASH_D2_RESSRAM_FLASH_D1_RESSRAM_FLASH_D0_RES
SRAM_CLK
12
2.2K
R424
VCC3V3
VCC3V3
VCC3V3
XC95144XL
IO_1_2_11
IO_1_3_12
IO_1_5_13
IO_1_6_14
IO_1_8_15
IO_1_9_16
IO_1_11_17
IO_1_12_18
IO_1_14_19
IO_1_15_20
IO_GCK1_1_17_22
IO_GSR_2_2_99
IO_GTS3_2_5_1
IO_GTS4_2_6_2
IO_GTS1_2_8_3
IO_GTS2_2_9_4
IO_2_11_6
IO_2_12_7
IO_2_14_8
IO_2_15_9
IO_2_17_10
IO_GCK2_3_2_23
IO_3_5_24
IO_3_6_25
IO_GCK3_3_8_27
28_IO_3_929_IO_3_1130_IO_3_1232_IO_3_1433_IO_3_1534_IO_3_1787_IO_4_289_IO_4_590_IO_4_691_IO_4_892_IO_4_993_IO_4_1194_IO_4_1295_IO_4_1496_IO_4_1597_IO_4_1735_IO_5_236_IO_5_537_IO_5_639_IO_5_840_IO_5_941_IO_5_1142_IO_5_1243_IO_5_1446_IO_5_15
49_IO_5_17
74_IO_6_2
76_IO_6_5
77_IO_6_6
78_IO_6_8
79_IO_6_9
80_IO_6_11
81_IO_6_12
82_IO_6_14
85_IO_6_15
86_IO_6_17
50_IO_7_2
52_IO_7_5
53_IO_7_6
54_IO_7_8
55_IO_7_9
56_IO_7_11
58_IO_7_12
59_IO_7_14
60_IO_7_15
61_IO_7_17
63_IO_8_2
64_IO_8_5
65_IO_8_6
66_IO_8_8
IO_8_9_67IO_8_11_68IO_8_12_70IO_8_14_71IO_8_15_72IO_8_17_73
GND_21GND_31GND_44GND_62GND_69GND_75GND_84
GND_100TCK_48TDI_45TDO_83TMS_47
VCCINT_5VCCINT_57VCCINT_98VCCIO_26VCCIO_38VCCIO_51VCCIO_88
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
2-3 = Expansion Chain1-2 = No ExpansionJumperExpansion JTAG
Tap to solderable pads in layout
CPLD for access to Linear Flash
B
22 32
7-8-2005_10:35 1.0
BF
NC
SRAM_CLK
21
R425
47R
2 1R266
47R
12
4.7K
R218
21
R414
0R
21
R217
330R
BUS_ERROR_1
USB_INT
FLASH_CE2_SRAM_CE1_N
SRAM_FLASH_OE_N
CPLD_IO_2CPLD_IO_1
SRAM_FLASH_D27_RES
SRAM_FLASH_D30_RES
SRAM_FLASH_D6_RES
SRAM_FLASH_D1_RES
SRAM_FLASH_D0_RES
SRAM_FLASH_D13_RESSRAM_FLASH_D14_RESSRAM_FLASH_D15_RES
SRAM_FLASH_D29_RES
FPGA_DOUT_BUSY
SRAM_FLASH_D7_RES
SRAM_FLASH_D12_RES
SRAM_FLASH_D11_RESSRAM_FLASH_D10_RES
SRAM_FLASH_D23_RES
SRAM_FLASH_D9_RESSRAM_FLASH_D8_RES
CPLD_TDO
SRAM_FLASH_D5_RES
SRAM_FLASH_D4_RES
SRAM_FLASH_D3_RES
SRAM_FLASH_D2_RES
SRAM_FLASH_D16_RES
SRAM_FLASH_D31_RES
SRAM_FLASH_D17_RESSRAM_FLASH_D18_RES
SRAM_FLASH_D19_RES
11
12
13
14
15
16
17
18
19
20
22
99
1234678910
23
24
25
27
28293032333487899091929394959697353637394041424346
49747677787980818285865052535455565859606163646566
67687071727321314462697584100484583475579826385188
U36
SQ_TQFP100
1 2 3
J26
FLASH_AUDIO_RESET_N
2
10.1UF
C329 1
2
C3300.1UF
2
10.1UF
C3311
2
C3280.1UF
2
10.1UF
C4041
2
C4050.1UF
EXPANSION_TDO
SYSACE_TDI
FPGA_PROM_CPLD_TMS
FPGA_PROM_CPLD_TCK
SRAM_FLASH_A14SRAM_FLASH_A15SRAM_FLASH_A18
CPLD_PROG
FLASH_A23
FPGA_M1
FPGA_M2
FPGA_CS_B
FPGA_PROG_B
FPGA_INIT
FPGA_DONE
FPGA_DIN
SRAM_FLASH_A16
SRAM_FLASH_A17
SRAM_FLASH_A13
SRAM_FLASH_D28_RES
SRAM_FLASH_D26_RES
SRAM_FLASH_D25_RESSRAM_FLASH_D24_RES
SRAM_FLASH_D22_RES
SRAM_FLASH_D21_RES
SRAM_FLASH_D20_RES
SRAM_FLASH_A5
SRAM_FLASH_A4
SRAM_FLASH_A19
SYSACE_CFGADDR2
SRAM_FLASH_A6
SRAM_FLASH_A7
SRAM_FLASH_A8
SRAM_FLASH_A9
SRAM_FLASH_A10
SRAM_FLASH_A11
SRAM_FLASH_A12
SYSACE_CLK
SRAM_FLASH_A3
SRAM_FLASH_A2
SRAM_FLASH_A1
SRAM_FLASH_A0
SRAM_FLASH_A22
SRAM_FLASH_A21
FPGA_M0
SYSACE_CFGADDR0
SYSACE_CFGADDR1
SRAM_FLASH_A20
FPGA_TDO
BUS_ERROR_2
PLATFLASH_CPLD_CCLK
VCC5
VTTDDR
VCC2V5
D
VCC5
D
VCC5
D
VCC5
D
VCC3V3
0402
0402
0402
0402
0402
D
VCC5
1UH
DO3316P-102
1UH
DO3316P-102
1UH
DO3316P-102
1UH
DO3316P-102
VCC1V2
0402
0402
VCC5
TPS54610PWP28
TI
TPS54610PWP
RT
SYNC
SS/ENA
VBIAS
VIN5
VIN4
VIN3
VIN2
BOOT
PH0
VSENSE
PGND1
PGND4
PGND2
PGND3
PH2
PWRGD
PH1
COMP
AGND
PH4
PH3
PGND5
PWRPAD
PH5
PH6
PH7
PH8
VIN1
TPS54610PWP28
TI
TPS54610PWP
RT
SYNC
SS/ENA
VBIAS
VIN5
VIN4
VIN3
VIN2
BOOT
PH0
VSENSE
PGND1
PGND4
PGND2
PGND3
PH2
PWRGD
PH1
COMP
AGND
PH4
PH3
PGND5
PWRPAD
PH5
PH6
PH7
PH8
VIN1
TPS54610PWP28
TI
TPS54610PWP
RT
SYNC
SS/ENA
VBIAS
VIN5
VIN4
VIN3
VIN2
BOOT
PH0
VSENSE
PGND1
PGND4
PGND2
PGND3
PH2
PWRGD
PH1
COMP
AGND
PH4
PH3
PGND5
PWRPAD
PH5
PH6
PH7
PH8
VIN1
TPS54610PWP28
TI
TPS54610PWP
RT
SYNC
SS/ENA
VBIAS
VIN5
VIN4
VIN3
VIN2
BOOT
PH0
VSENSE
PGND1
PGND4
PGND2
PGND3
PH2
PWRGD
PH1
COMP
AGND
PH4
PH3
PGND5
PWRPAD
PH5
PH6
PH7
PH8
VIN1
TPS51100MSOP10
VIN
S5
GND
VTTREF
S3
VDDQSNS
VLDOIN
VTT
PGND
VTTSNS
PWRPAD
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
VCC1V5
VCC2V5
VCC5
0402
SCHEM, ML405 EVAL PLATFORM
0381199
1) For sequential startup :
2) For ratiometric startup :
4.75V to 5.25V Input
3.3V@6A max
1.25V@3A max
Sequencing Options:
OPEN R130, R146, R315, R139, R140
SHORT R130, R146, R315, R139, R140
SHORT R128, R135, R309
OPEN R128, R135, R309
1.2V @ 6A max
2.5V @ 6A max
Power Supply
1.5V@6A max
21C150
2200PF
1 2
C151
470PF
BF
B
1.0
23 32
1-9-2006_14:59
10
9
8
6
7
1
2
3
4
5
11 U33
20
14
13
12
11
29
19
9
10
1
3
7
4
8
17
16
18
15
2
6
5
21
22
23
24
25
26
27
28
U49
28
27
26
25
24
23
22
21
5
6
2
15
18
16
17
8
4
7
3
1
10
9
19
29
11
12
13
14
20
U63
20
14
13
12
11
29
19
9
10
1
3
7
4
8
17
16
18
15
2
6
5
21
22
23
24
25
26
27
28
U62
28
27
26
25
24
23
22
21
5
6
2
15
18
16
17
8
4
7
3
1
10
9
19
29
11
12
13
14
20
U61
PG1V8
NC
PG1V2
1
2 10UF
C24
12
4.700K
R126
0.1%
21
R124
2.490K
0.1%
21
R125
365R
2
1 C1486800PF
1
2
6800PFC138
21C456
4700PF
2
1 C4653300PF
12
160R
R312
2
1 C1416800PF
21C144
2200PF
1 2
C142
470PF
21R131
1.74K
21
R132
5.11K 1
2
14.3K
R134
21R182
0.003R
12
365R
R133
1
2
C143
0.1UF
1 2
DNP
R140
1 2
L1
1 2
L3
1 2
L5
1 2
L2
2
1 C36
10UF0805
1
2
10UFC429
0805
12
0R
R309
1
2
10UFC37
0805
1
2
C453220UF
2
1 C428
10UF0805
2
1 C29
1UF0805
2
1
0805
C28
10UF
21
R143
5.11K 2
1R310
5.11K 1
2
7.5K
R311
1 2
C464
1000PF
21R313
1K
1
2
0.01UFC457
2 1R30871.5K
21
R314
DNP
12
DNP
R130
PG1V2
1V2_SS
PG2V5
PG1V8
2
1 C25
10UF0805
1 2
49.9R
R138
21
R137
560R
1 2
680PF
C135
1
2
10UFC26
0805
2
1
0.1UF
C140
21150PF
C137
21R145
1.74K
1
2
0.01UFC153
2
1C1340.01UF
1
2
0.01UFC145
1 2
0.003R
R181
21R180
0.003R
12
365R
R144
1
2 10UF
C31
0805
1
20.1UF
C146
2 1R142
71.5K
1
2
C44220UF
21
DS18
GREEN
1 2
5.11K
R129
21R139
DNP
12
1.87K
R136
1
2
C46220UF
21
R146
DNP
1
2
C149
0.1UF
12
0R
R135
2
1
0.1UF
C152
1
2
C139
0.1UF
21
R128
0R 1
2
71.5K
R127
2
1
0.1UF
C136
2
1220UFC43
2
1 C27
10UF
2
1
0805
C30
10UF
2
1220UFC45
2 1R14171.5K
PG2V5
21R305
0.003R
1
2
C463
0.1UF
2
1
0.1UF
C462
1V2_SS
PG3V3
21R315
DNP
2
1 C573
10UF
PG2V5
PG1V2
NC
NC
PG1V8
PG3V3
NC
SMP_MINI
SMP_MINI
VCC3V3
SMP_MINI
SMP_MINI
SMP_MINI
SMP_MINI
VCC2V5
04020402
0402040204020402
D
0402 0402 0402
0402 0402 0402 0402 0402 0402 0402 0402
04020402040204020402 0402
0402
VCC2V5
04020402
0402 04020402040204020402 0402 04020402 040204020402040204020402
040204020402 04020402 0402040204020402
VCC3V3
D
0402
VCC2V5 VCC2V5
D
VCC3V3VCC3V3 VCC3V3
VCC2V5
D
D
0402
VCC2V5
VCC2V5
VCC3V3
VCC1V2
VCC1V2
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
1.2V VCCINT
2.5V VCCO and VCCAUX
3.3V VCCO
Place these near Bank 7 VCCO
3.3V Supply Analysis
2.5V Supply Analysis
1.2V Supply Analysis
FPGA Decoupling
BF
B
1.0
24 32
7-8-2005_10:35
1
2
C3370.22UF
2
10.22UFC237
1
2
0.22UFC332
2
1 C3350.22UF
1
2
0.22UFC333
2
1 C3572.2UF
2
10.22UFC3461
2
C3450.22UF
2
10.22UFC3441
2
C3430.22UF
2
10.22UFC334 1
2
C3480.22UF
2
10.22UFC3391
2
C3380.22UF
2
10.22UFC208
2
1 C2130.047UF
2
1330UFC409
1
2
C370330UF
VCCO_7
1
2
C373330UF
2
1 C3522.2UF
2
12.2UFC356
2
1 C3552.2UF
1
2
C2070.22UF
2
10.22UFC2061
2
C2300.22UF
2
10.22UFC2291
2
C2280.22UF
1
2
0.22UFC221
2
1 C2220.22UF
2
1 C2390.047UF
1
2
0.22UFC223
1
2
C376330UF
2
12.2UFC3511
2
C2580.22UF
1
2
C2680.22UF
2
1 C2490.22UF
2
10.22UFC266
2
10.22UFC2621
2
C2600.22UF
2
1 C2380.047UF
2
1 C2410.047UF
2
1 C2470.047UF
2
1 C2520.047UF
2
1 C2450.047UF
2
1 C2670.047UF
2
1 C2460.047UF
2
10.047UF
C248
2
1 C2610.047UF
2
1 C2200.047UF
2
1 C2240.047UF
2
1 C2250.047UF
2
1 C2260.047UF
2
1 C2270.047UF
2
1 C2100.047UF
2
1 C2630.047UF
2
1 C2160.047UF
2
1 C2170.047UF
2
1 C2180.047UF
2
1 C2110.047UF
2
1 C2120.047UF
2
1 C2140.047UF
2
1 C2150.047UF
2
1 C2190.047UF
2
10.047UF
C259
2
1 C2400.047UF
2
10.047UF
C411
2
10.047UF
C410
2
1 C4172.2UF
2
1 C1780.047UF
2
1 C1820.047UF
2
1 C1830.047UF
2
1 C1840.047UF
2
1 C1850.047UF
2
1 C1930.047UF
2
1 C1920.047UF
2
1 C1910.047UF
2
1 C1900.047UF
2
1 C1890.047UF
2
1 C1880.047UF
2
1 C1870.047UF
2
1 C1860.047UF
2
1 C1810.047UF
2
1 C1800.047UF
2
1 C1790.047UF
2
1 C3612.2UF
2
1330UFC371
2
10.22UFC201
2
1 C2000.22UF
2
10.22UFC194
2
10.22UFC199
2
1 C1950.22UF
2
10.22UFC196
2
1 C1970.22UF
2
10.22UFC198
2
12.2UFC362
1
2
C2360.22UF
2
12.2UFC358
2
1 C2310.047UF
2
1 C2320.047UF
2
1 C2330.047UF
2
1 C2340.047UF
2
10.047UF
C413
2
10.047UFC412
2 1
J59
2 1
J58
2 1
J61
2 1
J60
2 1
J63
2 1
J62
VCC1V5_MGT
GNDA_110_AC2GNDA_110_AE3GNDA_110_AE6GNDA_110_AE9GNDA_110_AF9
GNDA_110_AE11GNDA_110_AF12
VTTXB_110_AE5
VTRXA_110_AE1VTTXA_110_AE2
RTERM_110_AE10MGTVREF_110_AE12
RXPPADA_110_AC1RXNPADA_110_AD1TXPPADA_110_AF2TXNPADA_110_AF3TXPPADB_110_AF4TXNPADB_110_AF5RXPPADB_110_AF7RXNPADB_110_AF8
MGTCLK_P_110_AF10MGTCLK_N_110_AF11
AVCCAUXMGT_110_AE7
VTRXB_110_AF6AVCCAUXRXB_110_AE8
AVCCAUXTX_110_AE4
AVCCAUXRXA_110_AD2
GNDA_113_J1GNDA_113_M1GNDA_113_B2GNDA_113_F2GNDA_113_J2GNDA_113_K2GNDA_113_L2GNDA_113_M2GNDA_113_B3GNDA_113_A5GNDA_113_B5
AVCCAUXRXA_113_B4
AVCCAUXMGT_113_G2
VTRXB_113_F1
RXPPADA_113_A4RXNPADA_113_A3TXPPADA_113_B1TXNPADA_113_C1TXPPADB_113_D1TXNPADB_113_E1RXPPADB_113_G1RXNPADB_113_H1
MGTCLK_P_113_K1MGTCLK_N_113_L1
AVCCAUXRXB_113_H2
VTTXB_113_E2
AVCCAUXTX_113_D2
VTRXA_113_A2VTTXA_113_C2
GNDA_102_A18GNDA_102_B19GNDA_102_B21GNDA_102_B25GNDA_102_E25GNDA_102_H25GNDA_102_E26GNDA_102_H26
AVCCAUXRXB_102_D25
RXPPADA_102_A19RXNPADA_102_A20TXPPADA_102_A22TXNPADA_102_A23TXPPADB_102_A24TXNPADB_102_A25RXPPADB_102_C26RXNPADB_102_D26MGTCLK_P_102_F26MGTCLK_N_102_G26
VTTXB_102_B24
VTTXA_102_B22VTRXA_102_A21
AVCCAUXRXA_102_B20
AVCCAUXTX_102_B23AVCCAUXMGT_102_C25
VTRXB_102_B26
GNDA_105_AF19GNDA_105_AE20GNDA_105_AE22GNDA_105_AF22GNDA_105_W25GNDA_105_AA25GNDA_105_AE25
AVCCAUXRXB_105_AE23VTRXB_105_AF25
RTERM_105_AE21MGTVREF_105_AE19
RXPPADA_105_W26RXNPADA_105_Y26TXPPADA_105_AB26TXNPADA_105_AC26TXPPADB_105_AD26TXNPADB_105_AE26RXPPADB_105_AF24RXNPADB_105_AF23
MGTCLK_P_105_AF21MGTCLK_N_105_AF20
VTTXB_105_AD25
VTTXA_105_AB25
AVCCAUXTX_105_AC25AVCCAUXMGT_105_AE24
AVCCAUXRXA_105_Y25VTRXA_105_AA26
GNDA_103_J25GNDA_103_L25GNDA_103_N25GNDA_103_T25
RXPPADA_103_J26RXNPADA_103_K26TXPPADA_103_M26TXNPADA_103_N26TXPPADB_103_P26TXNPADB_103_R26RXPPADB_103_U26RXNPADB_103_V26
AVCCAUXTX_103_P25
AVCCAUXRXB_103_V25VTRXB_103_T26VTTXB_103_R25
AVCCAUXMGT_103_U25
AVCCAUXRXA_103_K25VTRXA_103_L26VTTXA_103_M25
AVCCAUXRXB_112_AB2
GNDA_112_N2GNDA_112_R2GNDA_112_U2GNDA_112_Y2
VTRXA_112_R1
VTRXB_112_Y1
RXPPADA_112_N1RXNPADA_112_P1TXPPADA_112_T1TXNPADA_112_U1TXPPADB_112_V1TXNPADB_112_W1
RXPPADB_112_AA1RXNPADB_112_AB1
AVCCAUXRXA_112_P2
VTTXA_112_T2
VTTXB_112_W2
AVCCAUXMGT_112_AA2AVCCAUXTX_112_V2
VCC1V5_MGTVCC2V5VCC1V5_MGTVCC2V5
VCC2V5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
VCC1V2VCC1V2
VCC1V2
MGT BanksSCHEM, ML405 EVAL PLATFORM
0381199
7-18-2005_16:12
25 32
1.0
B
BF
SFP_TXPSFP_TXNSFP_RXPSFP_RXN
SMA_RXN
MGT_VREF_105
SMA_RXP
AB2
N2R2U2Y2
R1
Y1
N1P1T1U1V1W1AA1AB1
P2
T2
W2
AA2V2
U1
J25L25N25T25
J26K26M26N26P26R26U26V26
P25
V25T26R25
U25
K25L26M25
U1
AF19AE20AE22AF22W25AA25AE25
AE23AF25
AE21AE19
W26Y26AB26AC26AD26AE26AF24AF23AF21AF20
AD25
AB25
AC25AE24
Y25AA26
U1
A18B19B21B25E25H25E26H26
D25
A19A20A22A23A24A25C26D26F26G26
B24
B22A21B20
B23C25
B26
U1
J1M1B2F2J2K2L2M2B3A5B5
B4
G2
F1
A4A3B1C1D1E1G1H1K1L1
H2
E2
D2
A2C2
U1
AC2AE3AE6AE9AF9AE11AF12
AE5
AE1AE2
AE10AE12
AC1AD1AF2AF3AF4AF5AF7AF8AF10AF11
AE7
AF6AE8
AE4
AD2
U1
SATA_RXN_HOST2SATA_RXP_HOST2
SATA_TXP_HOST2SATA_TXN_HOST2
NCNCNCNC
NCNCNC
AVCCAUX_TX_102AVCCAUX_102
VTT_TXA_102VTT_RXA_102
VTT_TXB_102
AVCCAUX_RXB_102
AVCCAUX_RXA_102
VTT_RXB_102
VTT_RXB_113
AVCCAUX_RXA_113
AVCCAUX_RXB_113
VTT_TXB_113
VTT_RXA_113VTT_TXA_113
AVCCAUX_113AVCCAUX_TX_113
NCSUPRCLK1_NQ0_FPGASUPRCLK1_Q0_FPGA
SATACLK_QOSATACLK_NQO
SATA_RXN_HOST1SATA_RXP_HOST1
SATA_TXP_HOST1SATA_TXN_HOST1
NCNCNCNC
NCNCNCNC
VTT_TXB_105
AVCCAUX_RXB_105
SGMII_RXNSGMII_RXP
MGT_RTERM_105
VTT_TXA_105
AVCCAUX_105
AVCCAUX_RXA_105
AVCCAUX_TX_105
VTT_RXA_105
VTT_RXB_105
SGMIICLK_NQOSGMIICLK_QO
SGMII_TXNSGMII_TXP
MGT_VREF_110
NC
NCNC
MGT_RTERM_110
NCNCNCNCNC
NCNC
SMA_TXNSMA_TXP
VCC3V3
2A
2B4
VCC
1B2
1OE_N
SO1B4
1B1 2B22B3
S1
1B3
2OE_N
2B11AGND
SN74CBTLV3253
1_G
2_S
3_D
0
VCC3V3VCC3V3
1_G
2_S
3_D
0
VCC3V3
VCC2V5
VCC3V3
VCC3V3
VCC3V3
VEET_20TDN_19TDP_18VEET_17VCCT_16VCCR_15VEER_14RDP_13RDN_12VEER_11VEER_10VEER_9LOS_8
RATE_SELECT_7MOD_DEF0_6MOD_DEF1_5MOD_DEF2_4TX_DISABLETX_FAULT_2
VEET_1
GND_21GND_22GND_23GND_24GND_25GND_26GND_27GND_28GND_29GND_30GND_31GND_32GND_33GND_34GND_35GND_36GND_37GND_38GND_39
NH
NH
0402
0402
CON_SMA_ST_ROSN-1
CON_SMA_ST_ROSN-1
CON_SMA_ST_ROSN-1
CON_SMA_ST_ROSN-1
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Silkscreen:Signal OK
MGT_102A
SMA Connectors
MGT_102B
SFP MODULE
IIC MUX
SFP Module, SMA ConnectorsIIC MUX
21
J34
BF
8-8-2005_16:35 1.0
26 32B
1
2
3
4
5
J43
5
4
3
2
1
J42
1
2
3
4
5
J41
5
4
3
2
1
J44
SMA_RXP
1 2 0.01UFC576
1 2 0.01UFC575
SMA_RXN
1 2
L41
21
L40
1
J45
DNP
1 2
J33
1
J46DNP
1
J47
DNP
SFP_RT_SEL
1
2
080510UF
C469
2
1 C466
10UF0805
IIC_SCL_MAIN
21222324252627282930313233343536373839
U54DEVICE=AMP_1367073
2019181716151413121110987654321
U54DEVICE=AMP_1367073
IIC_SEL_0IIC_SEL_1
IIC_SDA_VGAIIC_SCL_VGA
IIC_SCL_USB
IIC_SCL_SFP
IIC_SCL_FPGAIIC_SDA_FPGAIIC_SDA_MAINIIC_SDA_SFP
IIC_SDA_USB
IIC_SCL_SFP
IIC_SDA_SFP
1
2
0.1UFC467
1 2
0.1UFC558
12
3.3K
R383
21
R382
3.3K
12
4.7K
R320
2
1 C4730.1UF
SMA_TXP
SFP_TXNSFP_TXP
SFP_RXPSFP_RXN
12
4.7K
R316
SFP_TX_DISAB
21
R317
4.7K
SFP_TX_FAULT
21
R319
4.7K
SFP_MOD_DETECT
21
R318
4.7K
3
2
1
Q9
DEVICE=BSS138N
2
1 C4680.1UF
1
20.1UF
C470
2
1 C4710.1UF
1
2
0.1UFC472
1
2
3Q10
DEVICE=BSS138N
12
4.7K
R321
21
R322
4.7K
SFP_LOS
21
R381
25.5R
12
GREEN
DS212
9
13
16
5
1
143
6 1112
2
4
15
1078
U60
SMA_TXN
0402
SERIAL_ATA
67490_9221
GND_4
GND_7
HRX-
HTX+
GND_1
HRX+
HTX-
SLOT
SERIAL_ATA
67490_9221
GND_4
GND_7
HRX-
HTX+
GND_1
HRX+
HTX-
SLOT
0402
0402
0402
0402
0402
0402
0402
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
SATA Host 2MGT 113A
MGT 113B
SATA Host 1
SATA Connectors
BF
B
1.0
27 32
7-8-2005_10:35
1 2 0.01UFC548
1 2 0.01UFC547
21C546
0.01UF
SATA_TXN_HOST1
SATA_RXP_HOST1
1 2 0.01UFC545
SATA_TXP_HOST1
21C544
0.01UF
21C551
0.01UF
21C549
0.01UF
SATA_RXN_HOST1
SATA_RXN_HOST2
SATA_RXP_HOST2
SATA_TXN_HOST2
SATA_TXP_HOST2
4
7
5
2
1
6
3J39
4
7
5
2
1
6
3J40
1 2 0.01UFC550
SMP_MINI
SMP_MINI
VCC1V5_MGT
TSSOP8
LM385-12
NC6ANODE
NC4
CATHODENC1
NC3
NC2
NC5
TO263-5
ADJ
GND1 GND2
VB
VIN
VOUT
UC385TD-ADJ
VCC2V5VCC5
D A
VCC1V5_MGTVCC1V5_MGT
SMP_MINI
SMP_MINI
OUT_10
OUT_9
OUT_8
IN_6
IN_4
IN_3
IN_1
IN_2
IN_5
GND
OUT_7
OUT_11
GND_TABFB
EN
POK/POR
NC
TQFN16MAX8556_7
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
AVCCAUX_TXRX
VCC1V5
EN
GND
IN
NC/FB
OUT
TPS73118SOT23-5
AVCCAUX_TXRX
VCC1V8VCC5
SCHEM, ML405 EVAL PLATFORM
0381199
1.5V MGT Supply Analysis
1.5V@5A max
1.0V or 1.2V MGT Supply Analysis
MGT Linear Power Supplies
1.1V@4A max
BF
B
5-1-2006_13:21
3228
1.0
12
R430
DNP
12
R402
2.80K
2
1 C590
2.2UF
NC
2
1C587
1UF0805
2
10805
C43310UF
3
2
1
4
5
U71
10
9
8
6
4
3
1
2
5
14
7
11
1713
16
12
15
Q16
12
J69
12
J68
2
1 C584
10UF0805
2
1 C583
10UF0805
12
1.40KR429
2 1R4281K
2
1 C58510UF0805
2
1 C58610UF0805
12
1K
R427
2 1R3252.80K
1
2
0.22UFC560
1
2 1UF
C557
21
698R
R326 1
2
C454
330UF
2
110UF
C4340805
4
2
1
63
5
U65
54
7
81
3
2
6
U67
2
1 C5720.22UF
2 1
J67
2 1
J66
MGT_VREF_1V2
NCNC
NC
NC
NC
NCNC
AVCCAUX_TXRX
AVCCAUX_TXRX
AVCCAUX_TXRX
AVCCAUX_TXRX
AVCCAUX_TXRX
NH
NH
NH
VCC2V5
NH
NH
NH
NH
NH
VCC1V5_MGT
NH
NH
VCC2V5
NH
NH
NH
NH
VCC1V5_MGT
NH
NH
NH
NH
NH
VCC2V5
NH
NH
NH
NH
NH
VCC1V5_MGT
VCC1V5_MGT
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
AVCCAUX_TXRX
SCHEM, ML405 EVAL PLATFORM
0381199MGT Power Decoupling
BF
5-3-2006_17:24
3229
1.0
B
AVCCAUX_TX_102 AVCCAUX_TX_105
VTT_TXA_105
VTT_RXB_105
AVCCAUX_RXA_105
MGT_VREF_110 MGT_VREF_1V2 MGT_VREF_105
MGT_RTERM_1102 1
R409
6.2KMGT_RTERM_105
VTT_RXB_113
VTT_RXA_113
1
2
0.22UFC502
21
R397
0R
21
R396
DNP
12
0R
R395
1 2
L22
21
L17
1
2
0.22UFC480
VTT_TXB_113
2
1 C4750.22UF
1 2
L13
1
2
0.22UFC474
1 2
L15
21
L14
21
L12
1 2
L11
1 2
L10
21
L9
21
L8
AVCCAUX_102
VTT_TXB_102
VTT_TXA_102
2
1 C4770.22UF
1
2
0.22UFC476
VTT_RXB_102
VTT_RXA_102
1
2
0.22UFC479
2
1 C4780.22UF
AVCCAUX_RXB_102
AVCCAUX_RXA_102
2
1 C4810.22UF
2
1 C4890.22UF
1
2
0.22UFC488
AVCCAUX_RXA_113
AVCCAUX_RXB_1131
2
0.22UFC487
2
1 C4860.22UF
2
1 C4850.22UF
1
2
0.22UFC484
VTT_TXA_113
AVCCAUX_TX_113
AVCCAUX_113
1 2
L23
21
L21
21
L20
1 2
L19
1 2
L18
2
1 C4830.22UF
21
L16
1
2
0.22UFC482
1
2
0.22UFC505
2
1 C5040.22UF
AVCCAUX_RXB_105
2
1 C5030.22UF
VTT_RXA_105
1
2
0.22UFC501
2
1 C5000.22UF
VTT_TXB_105
AVCCAUX_105
21
L39
21
L38
1 2
L37
1 2
L36
21
L35
21
L34
1 2
L33
1
2
0.22UFC499
1 2
L32
2
1 C4980.22UF
12
DNP
R398
2 1R412
1K
2
1 C5620.22UF
12
6.2K
R410
1
2
0.22UFC571
12
1K
R418
MGT_VREF_1V2
FB0805
FB0805VCC3V3
VCC3V3
GND
OE
OUT
VCC
OSC
VCC3V3
REF_CLK
SEL1
VEE_2
REF_OE
M2
M1
M0
MR
SEL0
TEST_CLK
XTAL_IN0
XTAL_OUT0
VCCO_CMOS
N0
N1
N2
VCCO_PECL
Q0
NQ0
VEE_1
VCCA
VCC
XTAL_OUT1
XTAL_IN1
DIP4_2
DIP8_1
DIP7_1
DIP6_1
DIP5_1
DIP4_1
DIP3_1
DIP2_1
DIP1_1DIP1_2
DIP2_2
DIP3_2
DIP8_2
DIP7_2
DIP6_2
DIP5_2
0402 040204020402
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
LVPECL to LVDS Conversion
PLACE NEAR FPGA
PLACE NEAR SUPERCLOCK
Default to 25MHz
SMA / SFP Clock 1MGT102
12
DNP
R347
12
DNP
R384
BF
B
1.0
30 32
1-9-2006_14:59
SUPRCLK1_M2
21
J35
SUPRCLK_AGND
SUPRCLK_AGND
SUPRCLK_AGND
SUPRCLK_AGND
SUPRCLK_AVCC
SUPRCLK_AVCC
SUPRCLK_AGND
SUPRCLK_AVCCSUPRCLK_AGND
SUPRCLK_AGND
SUPRCLK_AVCC
SUPRCLK_AGND
X9
19.44MHZ
XTAL_SMD_3
26.5625MHZ
X10
XTAL_SMD_2
1 2
0RR303
21R340
25.5R
2 1R346
49.9R
1
2
0.01UFC518 1
2
0.01UFC516
2
1 C5150.01UF
2
1 C5170.01UF
13
8
7
6
5
4
3
2
116
15
14
9
10
11
12
SW14
DIP_SW8_SMT
24
17
23
22
21
20
19
18
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
U55ICS843001-21
21
R349
DNP
SUPRCLK1_NQ0_FPGA
SUPRCLK1_XTAL1_I SUPRCLK1_XTAL2_I
21C520
0.1UF
1 2
0.1UF C519
SUPRCLK1_NQ0
SUPRCLK1_Q0
21
R344
180R
2
1C5090.1UF2
1 C450
10UF0805
12
180R
R343
12
49.9R
R345
21R339
DNP
SUPRCLK1_Q0
SUPRCLK1_NQ0
SUPRCLK1_XTAL1_O
2
1 C506
22PF
12
10R
R341
1 2
0.1UF
C508
SUPRCLK1_M0
SUPRCLK1_N2
SUPRCLK1_XTAL2_O
SUPRCLK1_XTAL2_I
2 14.7K
R338
2 1R337
4.7K2 1
4.7K
R336
2 1R335
4.7K
2 1R334
4.7K2 1
4.7K
R333
2 1R332
4.7K
2 14.7K
R331
SUPRCLK1_SEL0
SUPRCLK1_SEL1
SUPRCLK1_M0
SUPRCLK1_N0
SUPRCLK1_N1
SUPRCLK1_M1
SUPRCLK1_SEL1
SUPRCLK1_SEL0
SUPRCLK1_M2
SUPRCLK1_M1
SUPRCLK1_N1
SUPRCLK1_N0
SUPRCLK1_N2
SUPRCLK1_XTAL1_O
SUPRCLK1_XTAL1_I
1
222PF
C507
4
1
5
8
X7
2
1 C511
22PF
1 2
DNP
R342
1
222PF
C510
SUPRCLK1_XTAL2_O
1
2
0.1UFC512
2
1C5130.1UF
1
2
0.1UFC514
21
R348
DNP
12
DNP
R350
SUPRCLK1_Q0_FPGA
NC
1 2FB20
1 2FB19
SUPRCLK_AGND
SUPRCLK_AVCC
SUPRCLK_AGND
FB0805
FB0805VCC3V3
VCC3V3
XTAL_SMD
XTAL_SMD
TSSOP8
VDDA VDD
QOGND
XTAL_OUT NQO
OEXTAL_IN
ICS844021I
FREQ_SELGND
NQO
QOVDD1
XTAL_IN
XTAL_OUT
TSSOP8
ICS844051-1
VDD2
0402
0402
FB0805
FB0805
0402
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
JMP Off = 75 MHzJMP On = 150 MHz
SGMII / SATA ClocksMGT 110 / MGT 113
Use 20 MHz XTAL whenU52 is ICS844031AGI-01
U52 can be populated withICS844031AGI-01for 250 MHz SGMIICLK
125.00 MHz Clock
BF31 32B
1.05-25-2006_11:18
SGMIICLK_QO
1 2
0.1UF
C581
1 2
0.1UF
C580
21C579
0.1UF
SATACLK_NQO
1 2
0.1UF
C578
1
2
0.01UFC542
SGMIICLK_AGND
SGMIICLK_AGND
SGMIICLK_AVCC
SGMIICLK_AVCC
SGMIICLK_AVCC
SGMIICLK_AGND
SATACLK_AGNDSATACLK_AGND
SATACLK_AGND
SATACLK_AGND
SATACLK_AVCC
21FB21
21FB22
1
2
0.01UFC540
2
1 C5370.01UF
SGMIICLK_XTAL_IN
SATACLK_XTAL_OUT
54
7
81
63
2
U53
1 8
72
3 6
54
U52
2 1R376
DNP
2
1C543
12PF
1
212PF
C541
X13
25.000MHZ
21
J37
25.000MHZ
X14
2
1C539
33PF
1
227PF
C538
12
DNP
R374
1 2
J381
2
10RR377
2
1 C452
10UF0805
2
10.1UF
C536
SATACLK_XTAL_IN
SATACLK_AVCC
SATACLK_AGND
1 2FB24
1 2FB23
SGMIICLK_XTAL_OUT
SGMIICLK_AGND
SGMIICLK_AGND
SATACLK_QO
SGMIICLK_NQO
MAX6653
DXN
ADD
SMBCLK
GND
PWM_OUT
INT_NCRT0
VCC SDL_NSDR_N
TACH/AIN
CRT1
SMBDATA
DXPTHERM_NFAN_FAULT_N
VCC3V3
VCC3V3
1_G
2_S
3_D
0
1_G
2_S
3_D
0
VCC3V3
VCC3V3
VCC5
VCC3V3
VCC2V5
1_G
4_D_TAB
3_S
2_D
0
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
SCHEM, ML405 EVAL PLATFORM
0381199
Compatable withMAX6664, MAX6663
Fan Direct Connect
FPGA Fan Controllerand IIC temp sensor
7-8-2005_10:35 1.0
B
3232 BF
14
32
Q15
1
21000PF
C561
FPGA_TDN
FPGA_TDP
2
1C559
1000PF
12
10K
R405
1
J56
DNP
1
J52
DNP
21
R403
10K
12
2.2K
R399
12
10K
R401
21
R400
2.2K
1
2 J50
1
2
3Q14
DEVICE=BSS138N
3
2
1
Q13
DEVICE=BSS138N
IIC_SDA_MAIN
IIC_SCL_MAIN
21
R408
10K
12
10K
R404
1DNP
J54
1DNP
J53
21
R406
10K
1 DNP
J5512
10K
R407
1
2
3
J51
9
13
16
5
1
143
6 1112
2
4
15
1078
U66