Upload
others
View
2
Download
0
Embed Size (px)
Citation preview
PRISM: Zooming inPersistent RAM Storage Behavior
Juyoung Jung and Dr. Sangyeun Choy g g gy
Dept. of Computer ScienceUniversity of Pittsburgh
University of PittsburghJuyoung Jung
ContentsContents
IntroductionIntroduction Background PRISM PRISM Preliminary Results Summary Summary
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Technical ChallengeTechnical Challenge
HDDHDDHDDHDD
- Slow and Power hungry- Power hungry
Fundamental solution?
Alternative storage medium
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Technical ChallengeTechnical ChallengeNAND flash based SSDNAND flash based SSD
+ much faster+ better energy+ ll+ smaller …
- erase-before-writeerase before write- write cycles- unbalanced rw- scalability …
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Emerging Persistent RAMs TechnologiesEmerging Persistent RAMs Technologies
Latency Programenergy
Endurance Density
Read Write Erase
NAND flash 25us 200us 1.5ms 10nJ 104~106 4~5F2NAND flash 25us 200us 1.5ms 10nJ 10 10 4 5F
PCM 20ns 100ns N/A 100pJ 108~109 5F2
STT-RAM 10ns 10ns N/A 0.02pJ 1015 4F2
RRAM 10ns 20ns N/A 2pJ 106 6F2
FeRAM 75ns 50ns N/A 2pJ 1013 6F2
PRAMs Win !
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
/
Write endurance
LatencyRead/write imbalance
Technological Energy consumption maturityconsumption
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Our ContributionOur Contribution
There is little work to evaluate Persistent RAMThere is little work to evaluate Persistent RAM based Storage Device (PSD) Research environment not well preparedp p
Present an efficient tool to study the impact ofPresent an efficient tool to study the impact of PRAM storage device built with totally different physical properties
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
PRISMPRISM
PeRsIstent RAM Storage MonitorPeRsIstent RAM Storage Monitor
Study Persistent RAM (PRAM) storage behavior Study Persistent RAM (PRAM) storage behavior Potentials of new byte addressable storage device
PRAMs’ challenges as storage media PRAMs challenges as storage media
Guide PSD (PRAM Storage Device) design Guide PSD (PRAM Storage Device) design Measure detailed storage activities (SW/HW)
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
PRISMPRISM
HDD or SSD PSD
Block devices Non-Block devices
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Non-Block devices
PRISMPRISMtest.exe
read(file1)
Low‐level storage behavior
address mappingwrite(buf,file1) wear leveling
bit masking
address mapping
resource conflicts
exploit parallelism
etc.
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
PRISM Implementation ApproachPRISM Implementation Approach
User ApplicationsInstrumentation
T h iInstrumentation
T h iVirtual File SystemIndividual FS (EXT3, HFS, TMPFS, etc.)
Buffer/Page CacheSW File system
TechniqueTechniqueTracers
Buffer/Page CacheBlock I/O Layer
HDD/SSD device driverI/O scheduler
y
EmulationEmulationTracers
Interconnect
PSDHW Slots, chips
SimulationSimulation
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
SimulationSimulation
PRISM ComponentsPRISM Components
User AppsUser Apps
Frontend Tracer
Backend PSDSim
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Frontend TracerFrontend Tracer
Application
File I/O requests
write
Linux VFS
File I/O requests
write
In‐memory TMPFS file system
Write data User‐definedMetadata
write
Tracer Module
Tracer Modules
Tracer Module
InvokingWR tracer
Proc‐based Loggeraccess timebyte‐granule
t i f
University of PittsburghJuyoung Jung
Raw data gatheredrequest info
……
PRISM ComponentsPRISM Components
User AppsUser Apps
Frontend Tracer
Backend PSDSim
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Backend Event-driven PSDSimBackend Event-driven PSDSim the used PRAM technologyRaw trace data Storage configuration
the used PRAM technologystorage capacity
# of packages, dies, planesfixed/variable page size
Persistent RAM storage simulator (PSDSim)wear‐leveling scheme …
PRAM Reference
Wear leveling Emulator
PRAMReferenceStatistics Analyzer
Storage Controller
PRAM Energy Model
Various performance results
Energy Model
University of PittsburghJuyoung Jung
Various performance results
Preliminary Results of Case StudyPreliminary Results of Case Study
Objective: enhancing PRAM write endurance Objective: enhancing PRAM write endurance Experimental Environment
Components SpecificationComponents Specification
CPU Intel Core Duo 1.66 GHz (32‐bit)
L2 Cache 2 MBL2 Cache 2 MB
Main Memory 1 GB SDRAM
Operating System Linux 2.6.24p g y
File System Tmpfs 10 GB capacity
Workload TPC‐C 2‐hours measurement
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Possible Questions from DesignersPossible Questions from Designers
How our workloads generate writes to storage?How our workloads generate writes to storage?1. Temporal behavior of write request pattern
2 The most dominant data size written2. The most dominant data size written
3. Virtual address space used by OS
4 File metadata update pattern4. File metadata update pattern
What about hardware resource access pattern?1. Resource utilized efficiently
2. Do we need consider wear‐leveling?
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
TPC-C File update patternTPC C File update patternTemporal behavior of writes
Populating 9 relational tables
writes are very bursty
proper queue size
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
(Wall-clock time)
File Data Written SizeFile Data Written Size4KB written size dominant
Not cause whole block update
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Virtual Page Reuse PatternVirtual Page Reuse Pattern
HIGHMEM
OS VMM allocates pages from low memory
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Example Hardware OrganizationExample Hardware Organization256MB package 0
PKG 0
1GB PSDDie 1Die 0
PKG 1
Page 08 planes in
16MB plane 7
Plane 7Plane1Plane1
PKG 2
Page 1Page 2Page 3
p128MB Die 1
PlanePlane1Plane1
PKG 3Plane 0 Page N‐1
Page N
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Hardware Resource UtilizationHardware Resource Utilization
4000
3000
3500
nt
1500
2000
2500
cces
s C
oun
Die1
500
1000
1500Ac
Die0
0
pkg0 pkg1 pkg2 pkg3
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Storage-wide plane resource usageStorage wide plane resource usage600 1258
400
500plane0 plane1 plane2 plane3 plane4 plane5 plane6 plane7
unt Q. plane-level usage fair ?
300
400
Serious unbalanced Acce
ss C
o
100
200 resource utilization
A
0
100
Die0 Die1 Die0 Die1 Die0 Die1 Die0 Die1
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Package 0 Package 1 Package 2 Package 3
Wear‐leveling EffectWear leveling Effect
Before Wear‐leveling After RR Wear‐levelingg g
Balancedresource usage
University of PittsburghJuyoung Jung
PRISM OverheadPRISM Overhead
PRISM’s I/O performance impactPRISM s I/O performance impact We ran IOzone benchmark with 200MB (HDD‐friendly) sequential file write operations
3
3.5
4
RIS
M 3.5
4
3 5x slowdown1.5
2
2.5
3
norm
aliz
ed to
P
1 5
2
2.5
3
malized
Laten
cy
3.5x slowdown
0
0.5
1
Raw tmpfs PRISM HDD
Spee
d
0
0.5
1
1.5
Norm
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
0
Raw tmpfs PRISM
PRISM OverheadPRISM Overhead
PRISM’s I/O performance impactPRISM s I/O performance impact We ran IOzone benchmark with 200MB (HDD‐friendly) sequential file write operations
11.5x faster3
3.5
4
RIS
M 12
14
HD
D
1.5
2
2.5
3
norm
aliz
ed to
P
4
6
8
10
d no
rmal
ized
to H
0
0.5
1
Raw tmpfs PRISM HDD
Spee
d
0
2
4
PRISM HDD
Spee
d
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
PRISM SummaryPRISM Summary
Versatile tool to study PRAM storage systemVersatile tool to study PRAM storage system Study interactions between storage level interface (programs/OS) and PRAM device accesses(p g / )
Run a realistic workload fast
Extendible with user‐defined tracer easilyExtendible with user defined tracer easily
Explore internal hardware organizations in detail
University of PittsburghJuyoung Jung University of PittsburghJuyoung Jung
Thank you !
University of PittsburghJuyoung Jung