Programmable Logic and

Edge Detection

Joshua SoutherlandUniversity of Oklahoma

FPGA Intro

● Field Programmable Gate Array● Usually slower than ASIC but are

reconfigurable● Often available with a hard processor such

as ARM or PowerPC● Can be configured as

asynchronous

(1)

CPLD Intro

● Complex Programmable Logic Device● Soft Processor (Reconfigurable)● Often used to configure a FPGA upon reset

(2)

FPGA CPLD

● High logic density● Usually volatile● Larger projects

● High register density● Non-volatile● Smaller projects

(3)

VHDL Verilog

● ADA style● Strongly typed● Verbose● Compiled

● Ada/C mix● Loosely typed● More Concise● Interpretive Origins

VHDL Code Example, 2-to-1 Mux

if sel = ‘ 0’ then output <= data1;elsif sel = ‘ 1’ then output <= data2;end if;

AB Ysel

Input 1Input 2Select

Output

(4)

Process

● Synthesize● Map,Place&Route● Generate Bitstream● Download & Test

(3)

Edge Detection

● Convolution can be used to find edges in image

● An example generated in Matlab:

Are FPGA's Applicable in this context?

● Yes, FPGA's can achieve high performance in edge detection because:– The logic gates can be customized to the

algorithm– Pixels may be evaluated in parallel

● An implementation is described in Lecerf, et al.– Custom FPGA board– Operating on grayscale, not in frequency space– Output through ISA interface to PC

Lecerf et al. Convolution Module(5)

● 3 Processing Elements in parallel at 3 clock cycles each combine to achieve 1 pixel per clock cycle performance

(5)

Lecerf et al. Hardware Req.(5)

● XC4025E FPGA by Xilinx (1024 CLBs, 2ns)● VV5404 CMOS Imager (356x292 pixel)● Two 512k x 8bits SRAM

(5)

Lecerf et al. Results

● Target architecture running at 14.318 MHz ● Frame rates were dependent on the number

of edge images computed:

(5)

Future Work

● We would like to implement a similar solution, but in frequency space.– Additional Fourier and Inverse Fourier transforms

necessary– Convolution becomes a simple point wise

multiplication in frequency space

CMOS Camera

fft2Module

ConvolutionModule

ifft2Module

Output

Conclusion

● FPGA's can be used to achieve high frame rates in edge detection applications by evaluating pixels in parallel.

Sources

(1) http://www.digikey.com/(2) http://www.xilinx.com/(3) http://www.xess.com/(4) http://www.interfacebus.com/Design_VHDL.html(5) Antoine Lecerf, Denis Ouellet, Miguel Arias-Estrada (2000) Computer vision

camera with embedded FPGA processing, Proceedings of SPIE -- Volume 3966 pp. 299-308