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Programmable Networks @ Multi-Terabit Scale Prem Jonnalagadda, Barefoot Networks DPDK US Summit - San Jose - 2016

Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

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Page 1: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Programmable Networks @ Multi-Terabit Scale

PremJonnalagadda,BarefootNetworks

DPDKUSSummit-SanJose-2016

Page 2: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Today, how can we ...

u  Simplifyandscalethedataplaneofaswitch

u  CreateandowndataplaneIntellectualProperty(IP)

u  Getfullvisibilityintothedataplane

u  Tailorthenetworktomeetspecificneeds

2

Page 3: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Fixed Data Plane

Control Plane

Applications

Programmable Data Plane

Applications Programming

Language

Control Plane

“Control & Ownership down to the wire”

Evolution of Open Networking

“Control stops where Data Plane starts”

What networks need ...

Op

en

Op

en

X

3

Page 4: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Evolution of Programmable Hardware

C/C++/...

Compute

Compiler

Graphics

OpenGL/OpenCL/...

Compiler

Signal Processing

C++/Matlab/...

Compiler

Networking

? Compiler

?

“Networking is late to the game!”

4

Page 5: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

We need a couple of things ...

u ProgrammableSwitchArchitecture(PISATM)

u  Givingend-usersaprogrammabletargetfortheirdataplane

u  Industry-wideProgrammingLanguage(P4TM)

u  Allowingend-userstodefineandmodifytheirdataplane

5

Page 6: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

PISATM Protocol Independent Switch Architecture

6

Pro

gra

mm

ab

le

Pars

er

Memory

Match Action

ALU

Page 7: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

PISA Protocol Independent Switch Architecture

7

Pro

gra

mm

ab

le

Pars

er

Memory

Match Action

ALU

Page 8: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

P4TM Programming Protocol-Independent Packet Processors

u  High-levelprogramminglanguage

u  Networkingdomainspecific

u  Protocol/TargetIndependent

u  GrowingadopSonandecosystem

8

/*********************************************/ /* Router MAC lookup */ /*********************************************/ action rmac_hit() {

modify_field(l3_metadata.rmac_hit, TRUE); } action rmac_miss() {

modify_field(l3_metadata.rmac_hit, FALSE); } table rmac {

reads { l3_metadata.rmac_group : exact; l2_metadata.lkp_mac_da : exact; } actions { rmac_hit; rmac_miss; } size : ROUTER_MAC_TABLE_SIZE;

}

Page 9: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

P4: Programming Language for Networking

“High-Level Programming Language for Programmable Networking across the Entire Network”

Transport - FPGA

Routers - NPU

Server Connectivity - NIC

Leaf & Spine - Switch ASIC & ASSP

OS - Kernel Networking

Hypervisor - vSwitch

9

Page 10: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

What does a P4 program look like?

10

L2 IPv4

ACL MyEncap MyEncap IPv6

header_type ethernet_t {fields {

dstAddr : 48;srcAddr : 48;etherType : 16;

}}

parser parse_ethernet { extract(ethernet); return select(latest.etherType) { 0x8100 : parse_vlan; 0x800 : parse_ipv4; 0x86DD : parse_ipv6; 0xface : parse_my_encap; }}

TCP

IPv4 IPv6

MyEncap Eth

header_type my_encap_t {fields {

foo : 12;bar : 8;baz : 4;qux : 4; next_protocol : 4;

}}

Page 11: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

What does a P4 program look like?

11

L2 IPv4

ACL MyEncap MyEncap IPv6

table ipv4_lpm {

reads { ipv4.dstAddr : lpm; }

actions { set_next_hop; drop;

}}

action set_next_hop(nhop_ipv4_addr, port) {

modify_field(metadata.nhop_ipv4_addr, nhop_ipv4_addr); modify_field(standard_metadata.egress_port, port); add_to_field(ipv4.ttl, -1);

}

control ingress {

apply(l2);apply(my_encap);if (valid(ipv4) {

apply(ipv4_lpm);} else {

apply(ipv6_lpm);}apply(acl);

}

Page 12: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

P4 and PISA

12

P4 code

Compiler

Pro

gra

mm

ab

le

Pars

er

Compiler Target (PISA Device)

Page 13: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Networking enters the game

C/C++/...

Compute

Compiler

Graphics

OpenCL/...

Compiler

DSP

C/Matlab/...

Compiler

Networking

Compiler

Domain

Domain Specific Language

Compiler

Domain Specific Processor

13

BarefootNetworksTofinoTM

Page 14: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Now we can ...

u Quicklyimplementnewprotocolsu Removeunnecessarycomplexityu  Flexiblyassigntablememorytofeaturesu CreatenewdiagnosScs,telemetry,monitoringfuncSons,etc.u Composeforwardingbehaviorfromlibrariesu  Specifyforwardingbehavioronce;compiletomanydevicesu KeepyourdataplaneIPfromgoingtoyourcompeStors

14

Page 15: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

P4 Language Consortium (P4.org)

u  IndependentCAnon-profit

u  MembershipisFREE

u  Opensource

u  Apache2.0CLA

u  46membersfromindustryandacademia

u  Website:h^p://p4.org/join-us

u  GitHub:h^ps://github.com/p4lang

u  Workshops:June2015,Nov2015,May2016

15

Page 16: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Developer Resources

u  Specàh^p://p4.org/spec/u  Compileràh^ps://github.com/p4lang/p4c-bmu  L2/L3Switchàh^ps://github.com/p4lang/switch

u  PacketTestFramework(PTF)àh^ps://github.com/p4lang/pa

16

...muchmoreath^ps://github.com/p4lang

Page 17: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Get involved!

u JoinP4.org-h^p://p4.org/join-us

u  TryP4developmenttoolsandprograms(switch.p4,INT,...)u  IncludingP4-programmableS/Wswitchesandtestframework

u  ExciSngappsfornetworkmonitoring,analysis,diagnosScs,andcontrol

u  Jointhemailinglists-h^p://lists.p4.org

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Page 18: Programmable Networks @ Multi-Terabit Scale · Protocol Independent Switch Architecture 6 Programmable Parser ... Protocol Independent Switch Architecture 7 Programmable Parser Memory

Questions? [email protected]