Some more point to remember and know

Horizontal versus Vertical Furnaces

• • The vertical furnace has many performance advantages over the horizontal furnace, including smaller footprint, parallel processing for throughput increase and improved gas flow dynamics.

• • The five major control systems for a vertical furnace are: 1) process chamber, 2) wafer transfer system, 3) gas distribution system, 4) exhaust system and 5) temperature control system. High-temperature furnace materials are made of 26 amorphous quartz (referred to as quartzware) or silicon carbide. Furnaces have multiple heat zones with a sophisticated temperature control system based on multiple thermocouples. A typical ramp rate for a vertical furnace is 10°C/minute.

• • A fast ramp vertical furnace is able to quickly raise the temperature of a batch of wafers, with a ramp rate up to 100°C/minute. A fast ramp vertical furnace has improved temperature control and thermal uniformity across the wafers.

• • The rapid thermal processor (RTP) heats a single wafer to a temperature range of 400 to1300°C within a fraction of a second. Advantages are a reduced thermal budget, minimized dopant movement and shorter time to process a wafer. RTPs are cold wall systems that often use multiple tungsten halogen lamps for heating and an optical pyrometer for temperature measurement. Examples of RTP applications are implant anneal, densification of deposited films and silicideformation

Eight Basic Steps of Photolithography

• Photolithography can be divided into eight basic steps: ƒ– Vapor prime: clean and prime the wafer surface. ƒ

– Spin coat: apply photoresist.

– ƒ Soft bake: drive off most photoresist solvent. ƒ

– Alignment and exposure: align reticle with the wafer. ƒ

– Post-exposure bake (PEB): bake step for deep UV photoresists. ƒ

– Develop: create pattern in photoresist. ƒ

– Hard bake: evaporate remaining solvent and improve resist adhesion. ƒ

– Develop inspect: quality inspection.

IC Fabrication

• Chips (or die) are fabricated on a thin slice of silicon, known as a wafer (or substrate).

• Wafers are fabricated in a facility known as a wafer fab, or simply fab. •

• The five stages of IC fabrication are: ƒ – Wafer preparation: silicon is purified and prepared into wafers. ƒ – Wafer fabrication: microchips are fabricated in a wafer fab by

either a merchant chip supplier, captive chip producer, fablesscompany or foundry. ƒ

– Wafer test: Each individual die is probed and electrically tested to sort for good or bad chips.

– ƒ Assembly and packaging: Each individual die is assembled into its electronic package. ƒ

– Final test: Each packaged IC undergoes final electrical test

• Draw the atomic structure of silicon ?

• Which is the first semoconductor used to make chips?- Germanium

• What permit Silicon to function as semiconductor?– It is the junction between the n-type and p-type

doped regions (referred to as a pn junction) that permit silicon to function as a semiconductor.

Why GaAs IC’s are faster than Silicon IC’sGaAs is the most common III-V compound semiconductor material. GaAs ICs have greater electron mobility, and therefore are faster than ICs made with silicon. GaAs ICs also have higher radiation hardness than silicon, which is better for space and military applications. The primary disadvantage of GaAs is the lack of a natural oxide

• What are the commonly used conducting layers used in IC fabrication?– Fabrication involves fabrication of Fabrication involves

fabrication of patterned laye atterned layers of the rsof the three conducting materials: metal, poly-silicon silicon and diffusion by using a series of photolithographic techniques and chemical processes involving oxidation of silicon, diffusion of impurities into the silicon and deposition and etching of aluminum or Ajit Pal, IIT Kharagpur polysiliconpolysilicon on the silicon to provide interconnectio on the silicon to provide interconnection

• What is Lithography Field?– To obtain the best optical resolution, only a small area, about 10 cm2 , of the wafer is

exposed. This area is called the lithography field and may contain a few to tens of IC chips

• What is misalignment in lithography?• Why is wet oxidation faster than dry oxidation?

• What do you mean by liquid encapsulated Czochralskitechnique?

• What type of photoresist is used in deep UV lithography?• Why is a seed crystal used for crystal growth?• Importance of SiO2 in SC Industry• difference between “grown” SiO2 and “deposited” SiO2

5 marks

• Briefly describe the CZ method?

• . The CZ method grows single crystal ingots by melting an ultrapure raw material (e.g. Si and GaAs) and then extracting and freezing the melt onto a single-crystal seed template, which is pulled out and away from the melt.

• Sketch a graph showing the thickness-dependence of the oxide growth time

• A CZ grown crystal is doped with boron. Why is the boron concentration larger at the tail end of the crystal than at the seed end? In a CZ growth, oxygen diffuses into the molten silicon from the silica crucible used to contain it; will the concentration of oxygen in the crystal be larger at the tail end or the seed end? Explain.

• What are the functions of oxide layerin ICFT

• State Ficks First Law and second law

• Differentiate between “chemical vapour deposition” and “lithography” in the fabrication of Ics

• Short notes on Epitaxy, oxidation

• Differentiate bet CVD and Photlithigraphy

• Short note on lithography

• Find the concentration of phosphorous (P)

atoms in the melt to obtain Si doped with

1016 atoms/cm3 (Czochralski growth) kd =

0.35 for P in Si.

• How many grams of P should be added if

the initial load in the crucible is 5 kg of

Si? (density of Si = 2.33g/cm3 )