Qualkitdo Rptgenext Qualificationreport SDD SF Exit Substate

8/9/2019 Qualkitdo Rptgenext Qualificationreport SDD SF Exit Substate

1/25


2/25

SDD_SF_exit_substate.slx

2

SDD_SF_exit_substate.slx: Design DescriptionThe MathWorks, Inc.

Publication date 16-Aug-2013 11:44:29

Copyright © 2013

For Internal Distribution Only


3/25

iii

Table of Contents

1. Model Version ............................................... ........................................................ ......... 1

2. Root System .......................... ....................................................... .................................. 2

Description ................................................. ....................................................... ......... 2

Blocks ....................................................................................................................... 2

Parameters ........................................................................ ................................. 2Block Execution Order ......................................................................................... 2

State Charts ......................... ....................................................... ................................ 3

Chart ................................................................................................................. 3

States ................................................................................................................ 4

Data .................................................................................................................. 6

3. System Model Configuration ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... 7


4/25

iv

List of Figures

2.1. SDD_SF_exit_substate ...... ..... ...... ...... ..... ...... ..... ..... ...... ..... ...... ..... ...... ...... ..... ...... ..... ..... 2


5/25

v

List of Tables

2.1. Data - a ......... ........................................................ ...................................................... 6

2.2. Data - Estop .......................................... ........................................................ ............... 6

2.3. Data - Test ............................................................................................. ..................... 6

3.1. SDD_SF_exit_substate Configuration Set .... ..... ...... ..... ...... ...... ..... ...... ..... ..... ...... ..... ...... .... 7

3.2. SDD_SF_exit_substate Configuration Set.Components(1) ..................................................... 73.3. SDD_SF_exit_substate Configuration Set.Components(2) ..................................................... 8

3.4. SDD_SF_exit_substate Configuration Set.Components(3) ..................................................... 9

3.5. SDD_SF_exit_substate Configuration Set.Components(4) .... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... .. 10





3.10. SDD_SF_exit_substate Configuration Set.Components(8).Components(1) .. .. .. .. .. .. .. .. .. .. .. .. .. .. 17

3.11. SDD_SF_exit_substate Configuration Set.Components(8).Components(2) .. .. .. .. .. .. .. .. .. .. .. .. .. .. 18


6/25


7/25

2

Chapter 2. Root System

Table of ContentsDescription ........................................................ ........................................................ ......... 2

Blocks ..................................................... ........................................................ .................. 2

Parameters ....................................................................... .......................................... 2

Block Execution Order ................................................................................................. 2

State Charts ................................ ....................................................... ................................. 3

Chart ......................................................................................................................... 3

States ........................................................................................................................ 4

Data .......................................................................................................................... 6

Figure 2.1. SDD_SF_exit_substate

Copyright 2009-2011 The MathWorks, Inc.

Simulink Report Generator (SDD Report) Test Model

SDD_SF_exit_substate

Chart

Description

Simulink Report Generator (SDD Report) Test Model

Blocks

Parameters

Block Execution Order

1. Chart


8/25

Root System

3

State Charts

Chart

End

Top

[ E s t o p1]

1

2

Top [4]

End [4]


9/25

Root System

4

States

OR State - Top

C

du:

E s t o1;

A

RunDummyfunction

B

T e s3;

Top

du:

RunDummy();

[ E s t o p1]

[after(2,tick)]

[after(2,tick)]

12

3 4

5

6 7

RunDummy [5]

A [5]

B [5]

C [5]

[after(2,tick)]

[after(2,tick)][ Estop == 1]

OR State - End

End


10/25

Root System

5

Function - RunDummy

RunDummyfunction

{ % do nothing

a++;}

1

{ % do nothing...

OR State - A

A

OR State - B

B

T e s3;

OR State - C

C

du:

E s t o1;


11/25

Root System

6

Data

Table 2.1. Data - a

Scope Local

Table 2.2. Data - Estop

Scope Local

Table 2.3. Data - Test

Scope Local


12/25

7

Chapter 3. System Model ConfigurationTable 3.1. SDD_SF_exit_substate Configuration Set

Property Value

Description

Components [SDD_SF_exit_substate Configuration Set.Comp-

onents(1) [7], SDD_SF_exit_substate Confi-

guration Set.Components(2) [8], SDD_SF_-

exit_substate Configuration Set.Components(3) [-

9], SDD_SF_exit_substate Configuration Se-

t.Components(4) [10], SDD_SF_exit_substate

Configuration Set.Components(5) [12], SDD_-

SF_exit_substate Configuration Set.Components(-

6) [14], SDD_SF_exit_substate Configuration

Set.Components(7) [14], SDD_SF_exit_subst-

ate Configuration Set.Components(8) [15]]

Name Configuration

SimulationMode normal

Table 3.2. SDD_SF_exit_substate Configuration Set.Components [7](1)

Property Value

Name Solver

Description

Components

StartTime 0.0

StopTime .01

AbsTol auto

FixedStep 0.001

InitialStep auto

MaxNumMinSteps -1

MaxOrder 5

ZcThreshold auto

ConsecutiveZCsStepRelTol 10*128*eps

MaxConsecutiveZCs 1000

ExtrapolationOrder 4

NumberNewtonIterations 1

MaxStep auto

MinStep auto

MaxConsecutiveMinStep 1

RelTol 1e-3

SolverMode Auto


13/25

System Model Configuration

8

EnableConcurrentExecution off

ConcurrentTasks off

Solver FixedStepDiscrete

SolverName FixedStepDiscrete

SolverType Fixed-step

SolverJacobianMethodControl auto

ShapePreserveControl DisableAll

ZeroCrossControl UseLocalSettings

ZeroCrossAlgorithm Nonadaptive

SolverResetMethod Fast

PositivePriorityOrder off

AutoInsertRateTranBlk off

SampleTimeConstraint Unconstrained

InsertRTBMode Whenever possible

SampleTimeProperty


Property Value

Name Data Import/Export

Description

Components

Decimation 1

ExternalInput [t, u]

FinalStateName xFinal

InitialState xInitial

LimitDataPoints on

MaxDataPoints 1000

LoadExternalInput off

LoadInitialState off

SaveFinalState off

SaveCompleteFinalSimState off

SaveFormat Array

SignalLoggingSaveFormat ModelDataLogs

SaveOutput on

SaveState off

SignalLogging on

DSMLogging on

InspectSignalLogs off

SaveTime on


14/25


15/25


10

LocalBlockOutputs on

RollThreshold 5

SystemCodeInlineAuto off

StateBitsets off

DataBitsets off

ActiveStateOutputEnumStorageType Native Integer

UseTempVars off

ZeroExternalMemoryAtStartup on

ZeroInternalMemoryAtStartup on

InitFltsAndDblsToZero on

NoFixptDivByZeroProtection off

EfficientFloat2IntCast off

EfficientMapNaN2IntZero on

OptimizeModelRefInitCode off

LifeSpan inf

EvaledLifeSpan Inf

MaxStackSize Inherit from target

BufferReusableBoundary on

SimCompilerOptimization Off

AccelVerboseBuild off

ParallelExecutionInRapidAccelerator on


Property Value

Name Diagnostics

Description

Components

RTPrefix error

ConsistencyChecking none

ArrayBoundsChecking none

SignalInfNanChecking none

SignalRangeChecking none

ReadBeforeWriteMsg UseLocalSettings

WriteAfterWriteMsg UseLocalSettings

WriteAfterReadMsg UseLocalSettings

AlgebraicLoopMsg warning

ArtificialAlgebraicLoopMsg warning

SaveWithDisabledLinksMsg warning

SaveWithParameterizedLinksMsg none


16/25


11

CheckSSInitialOutputMsg on

UnderspecifiedInitializationDetection Classic

MergeDetectMultiDrivingBlocksExec none

CheckExecutionContextPreStartOutputMsg off

CheckExecutionContextRuntimeOutputMsg off

SignalResolutionControl TryResolveAllWithWarning

BlockPriorityViolationMsg warning

MinStepSizeMsg warning

TimeAdjustmentMsg none

MaxConsecutiveZCsMsg error

MaskedZcDiagnostic warning

IgnoredZcDiagnostic warning

SolverPrmCheckMsg warning

InheritedTsInSrcMsg warning

DiscreteInheritContinuousMsg warning

MultiTaskDSMMsg warning

MultiTaskCondExecSysMsg none

MultiTaskRateTransMsg error

SingleTaskRateTransMsg none

TasksWithSamePriorityMsg warning

SigSpecEnsureSampleTimeMsg warning

CheckMatrixSingularityMsg none

IntegerOverflowMsg warning

Int32ToFloatConvMsg warning

ParameterDowncastMsg error

ParameterOverflowMsg error

ParameterUnderflowMsg none

ParameterPrecisionLossMsg warning

ParameterTunabilityLossMsg warning

FixptConstUnderflowMsg none

FixptConstOverflowMsg none

FixptConstPrecisionLossMsg none

UnderSpecifiedDataTypeMsg noneUnnecessaryDatatypeConvMsg none

VectorMatrixConversionMsg none

InvalidFcnCallConnMsg error

FcnCallInpInsideContextMsg UseLocalSettings

SignalLabelMismatchMsg none

UnconnectedInputMsg warning


17/25


12

UnconnectedOutputMsg warning

UnconnectedLineMsg warning

SFcnCompatibilityMsg none

FrameProcessingCompatibilityMsg warning

UniqueDataStoreMsg none

BusObjectLabelMismatch warning

RootOutportRequireBusObject warning

AssertControl UseLocalSettings

Echo

EnableOverflowDetection off

ModelReferenceIOMsg none

ModelReferenceVersionMismatchMessage none

ModelReferenceIOMismatchMessage none

ModelReferenceCSMismatchMessage none

ModelReferenceSimTargetVerbose off

UnknownTsInhSupMsg warning

ModelReferenceDataLoggingMessage warning

ModelReferenceSymbolNameMessage warning

ModelReferenceExtraNoncontSigs error

StateNameClashWarn warning

SimStateInterfaceChecksumMismatchMsg warning

SimStateOlderReleaseMsg error

InitInArrayFormatMsg warning

StrictBusMsg ErrorLevel1

BusNameAdapt WarnAndRepair

NonBusSignalsTreatedAsBus none

LoggingUnavailableSignals error

SFUnusedDataAndEventsDiag warning

SFUnexpectedBacktrackingDiag warning

SFInvalidInputDataAccessInChartInitDiag warning

SFNoUnconditionalDefaultTransitionDiag warning

SFTransitionOutsideNaturalParentDiag warning

SFUnconditionalTransitionShadowingDiag warningSFUndirectedBroadcastEventsDiag warning

SFTransitionActionBeforeConditionDiag warning


Property Value

Name Hardware Implementation


18/25


13

Description

Components

ProdBitPerChar 8

ProdBitPerShort 16

ProdBitPerInt 32

ProdBitPerLong 32

ProdBitPerLongLong 64

ProdBitPerFloat 32

ProdBitPerDouble 64

ProdBitPerPointer 32

ProdLargestAtomicInteger Char

ProdLargestAtomicFloat None

ProdIntDivRoundTo Undefined

ProdEndianess Unspecified

ProdWordSize 32

ProdShiftRightIntArith on

ProdLongLongMode off

ProdHWDeviceType 32-bit Generic

TargetBitPerChar 8

TargetBitPerShort 16

TargetBitPerInt 32

TargetBitPerLong 32

TargetBitPerLongLong 64

TargetBitPerFloat 32

TargetBitPerDouble 64

TargetBitPerPointer 32

TargetLargestAtomicInteger Char

TargetLargestAtomicFloat None

TargetShiftRightIntArith on

TargetLongLongMode off

TargetIntDivRoundTo Undefined

TargetEndianess Unspecified

TargetWordSize 32TargetTypeEmulationWarnSuppressLevel 0

TargetPreprocMaxBitsSint 32

TargetPreprocMaxBitsUint 32

TargetHWDeviceType Specified

TargetUnknown off

ProdEqTarget on


19/25


14


Property Value

Name Model Referencing

Description

Components

UpdateModelReferenceTargets IfOutOfDateOrStructuralChange

CheckModelReferenceTargetMessage error

EnableParallelModelReferenceBuilds off

ParallelModelReferenceErrorOnInvalidPool on

ParallelModelReferenceMATLABWorkerInit None

ModelReferenceNumInstancesAllowed Multi

PropagateVarSize Infer from blocks in model

ModelDependencies

ModelReferencePassRootInputsByReference on

ModelReferenceMinAlgLoopOccurrences off

PropagateSignalLabelsOutOfModel off

SupportModelReferenceSimTargetCustomCode off


Property Value

Name Simulation Target

Description

Components

SimCustomSourceCode

SimCustomHeaderCode

SimCustomInitializer

SimCustomTerminator

SimReservedNameArray

SimUserSources

SimUserIncludeDirs

SimUserLibraries

SFSimEnableDebug on

SFSimOverflowDetection on

SFSimEcho on

SimBlas on

SimCtrlC on

SimExtrinsic on

SimIntegrity on


20/25


15

SimUseLocalCustomCode off

SimParseCustomCode on

SimBuildMode sf_incremental_build

SimDataInitializer

SimGenImportedTypeDefs off


Property Value

Name Code Generation

SystemTargetFile grt.tlc

TLCOptions

CodeGenDirectory

GenCodeOnly off

MakeCommand make_rtw

GenerateMakefile on

PackageGeneratedCodeAndArtifacts off

PackageName

TemplateMakefile grt_default_tmf

PostCodeGenCommand

Description

GenerateReport off

SaveLog off

RTWVerbose on

RetainRTWFile off

ProfileTLC off

TLCDebug off

TLCCoverage off

TLCAssert off

ProcessScriptMode Default

ConfigurationMode Optimized

ProcessScript

ConfigurationScript

ConfigAtBuild off

RTWUseLocalCustomCode off

RTWUseSimCustomCode off

CustomSourceCode

CustomHeaderCode

CustomInclude

CustomSource


21/25


16

CustomLibrary

CustomInitializer

CustomTerminator

Toolchain Automatically locate an installed toolchain

BuildConfiguration Faster Builds

CustomToolchainOptions

IncludeHyperlinkInReport off

LaunchReport off

PortableWordSizes off

GenerateErtSFunction off

CreateSILPILBlock None

CodeExecutionProfiling off

CodeExecutionProfileVariable executionProfile

CodeProfilingSaveOptions SummaryOnly

CodeProfilingInstrumentation off

SILDebugging off

TargetLang C

IncludeRootSignalInRTWFile off

IncludeVirtualBlocksInRTWFileBlockHierarchy-

Map

off

IncludeRegionsInRTWFileBlockHierarchyMap off

IncludeERTFirstTime on

GenerateTraceInfo off

GenerateTraceReport off GenerateTraceReportSl off

GenerateTraceReportSf off

GenerateTraceReportEml off

GenerateCodeInfo off

GenerateWebview off

GenerateCodeMetricsReport off

GenerateCodeReplacementReport off

RTWCompilerOptimization Off

ObjectivePriorities

RTWCustomCompilerOptimizations

CheckMdlBeforeBuild Off

CustomRebuildMode OnUpdate

DataInitializer

Components [SDD_SF_exit_substate Configuration Set.Comp-

onents(8).Components(1) [17], SDD_SF_exit-


22/25


23/25


18

DefineNamingFcn

ParamNamingRule None

ParamNamingFcn

SignalNamingRule None

SignalNamingFcn

InsertBlockDesc off

InsertPolySpaceComments off

SimulinkBlockComments on

MATLABSourceComments off

EnableCustomComments off

InternalIdentifier Shortened

InlinedPrmAccess Literals

ReqsInCode off

UseSimReservedNames off

ReservedNameArray

Table 3.11. SDD_SF_exit_substate Configuration

Set.Components(8).Components [16](2)

Property Value

Name Target

Description

Components

IsERTTarget off

TargetFcnLib ansi_tfl_tmw.mat

TargetLibSuffix

TargetPreCompLibLocation

GenFloatMathFcnCalls ANSI_C

TargetFunctionLibrary ANSI_C

CodeReplacementLibrary ANSI_C

UtilityFuncGeneration Auto

ERTMultiwordTypeDef System defined

ERTMultiwordLength 256

MultiwordLength 2048

GenerateFullHeader on

GenerateSampleERTMain off

GenerateTestInterfaces off

IsPILTarget off

ModelReferenceCompliant on

ParMdlRefBuildCompliant on


24/25


25/25


RTWCAPIRootIO off

GenerateASAP2 off

Documents

Qualkitdo Rptgenext Qualificationreport SDD SF Exit Substate