RAdiation Effects on Semiconductor Devices

1264 PROCEEDINGS OF THE IEEE, VOL. 62, NO. 9, SEPTEMBER 1974

1471 -, “The performance of injection locked IMPATT oscillators under transient ionizing radiation,” IEEE Trans. Nucl. Sci.

1481 P. T. Greiling and J . Clark, Transient radiation effects in GaAs (Short Paper), vol. NS-20, pp. 388-391, Dec. 1973.

IMPATT diodes,” R o c . IEEE (Lett.), vol. 60, pp. 753-754, June 1972.

TRAPAZT Radiation Effects

Permanent: 1491 E. P. EerNisse and R. J . Chaffin, “Design of neutron radiation

tolerant high efficiency microwave avalanche diode sources (TRAPATT oscillators),” IEEE Trans. Nucl. Sci., vol. NS17 , pp. 227-229, Dec. 1970.

[SO] R. J . Chaffin, E. P. EerNisse, and J . A. Hood, “The effect of neutron irradiation on the TRAPATT diode,”Proc. IEEE (Lett.), Vol. 57, pp. 2063-2064, NOV. 1969.

Transient: [ 51 1 J . M. Borrego, R. J . Gutmann, H. J . Geipel, and S. K. Ghandhi,

“Operation of TRAPATT oscillators under transient ionizing radiation conditions,” IEEE Trans. Nucl. Sci., vol. NS-20, pp. 144-148, Dec. 1973.

BARITT Radiation Effects

Permanent and Transient: 1521 R. J. Chaffin, “Permanent and transient radiation effects in

BARITT microwave oscillators,” in R o c . IEEE Annu. Conf. Nucl. and Radiation Effects, pp. 239-242, 1972.

Tmnsien t: 1531 J. M. Borrego, R. J. Gutmann, and J . Narain, “The performance

of BARITT diodes with transient ionizing radiation,” to be published.

A h c t -The radiation-induced degradation of semiconductor mate- rht pmmetgs is miewed. These results are related to the degradation of semiconductordwice performmce. D m techniques for minimiz- ing the radiationinduced degradation are evaluated. Emphrsis is placed on the effects of neutron-produced displacement damage on dwices and on the effects of ionizing d u t i o n on MOS structures. Transient ionization effects pad circuit latchup are considered. The present de gree of undeastnnding of radiation effects m silicon devices is summlrized.

INTRODUCTION w ’HEN high-energy radiation is incident on a semiconductor device, energy is deposited in the semiconductor via two mechanisms, atomic collisions and elec-

tronic ionization. The relative importance of these two mechanisms in a semiconductor structure depends both on the type of radiation and the nature of the device. For electron, proton, and y a y environments, most of the deposited energy goes into ionization processes, i.e., excitation and pair production. For fast-neutron environments, on the other hand, a large fraction of the deposited energy (up to approximately 50 percent) results directly in atomic displacement damage from collisions. The radiation-produced changes in a device, for any environment, depend on its relative sensitivity to ionization and to bulkdisplacement damage. Surfacecontrolled

the US. Atomic Energy Commission.

871 15.

Manuscript received March 15, 1974. This work was supported by

The authors are with the Sandia Laboratories, Albuquerque, N. Mex.

devices (MIS) tend to be limited by the ionization produced, since ionization leads to charge buildup in insulator layers and to an increase in surface-state density at insulatorsemiconduc- tor interface. The characteristics of bulkeffect devices are usually degraded by displacement damage, since this damage can significantly decrease carrier concentration, carrier mobility, and carrier lifetime. The carrier concentration is reduced by compensating centers, the mobility is lowered by scattering centers, and the lifetime is decreased by recombination centers.

The nature of the changes in these bulk parameters by the displacement damage depends strongly on the type of incident radiation and also on material parameters and irradiation conditions. The incident radiation is important because it deter- mines the nature of the “primary” defects introduced. For example, the initially produced defect for 6oCo gamma or electron irradiation is quite simple, probably a single displaced lattice atom and its associated vacancy. On the other hand, irradiation with fast neutrons is thought to produce regions of damage or “clusters,” each containing several hundred displaced atoms. Since the defects, as initially produced, are not thermally stable in the temperature range where semiconductor devices are normally operated, it is also necessary to understand the defect-reordering processes. Material factors and irradiation conditions such as resistivity, impurity content, irradiation temperature, and minoritycarrier injection level are quite important, in influencing not only the reordering processes but also the basic nature of the final damage.

This paper has been divided into three sections. First,, we examine presently used semiconductor devices and identify

GREGORY AND GWYN: RADIATION EFFECTS ON SEMICONDUCTOR DEVICES 1265

primary and secondary radiation failure modes for each type. Secondly, we explore in detail typical effects of displacement damage in devices. We have chosen to discuss only fast-neutron displacement effects, for two reasons: 1) the effects discussed represent real problems, since displacement damage severely degrades device performance in fast neutron environments; 2) the effects of fast neutron displacement damage on device characteristics are representative of displacement damage in general. The effects of carrier removal (compensation), carrier trapping, and lifetime degradation on device performance are considered in detail. A particularly important example of defect reordering, namely transient annealing of neutron damage, is discussed.

The third topic considers ionization effects. We discuss the permanent effects of ionization on MOS devices and IC’s and also transient effects. The effects of radiation-produced photocurrent and compensation techniques are presented. The effect of “latchup” due to parasitic p-n-p-n action in an integrated circuit during a radiation transient is examined in detail for CMOS circuits. Finally, the current status of understanding of damage mechanisms and device hardness is summarized.

FAILURE MECHANISMS IN DEVICES In Table I , we have listed the most important modem semi-

conductor devices, and have attempted to identify the degradation mechanisms for device failure [ 11. The table uses the symbols P and S to denote the primary and secondary failure mechanisms. One will note that devices which depend on resistivity or majority carrier concentration for their operation fail predominantly due to carrier removal or trapping. This includes semiconductor resistors, diodes, (certain characteristics), solid-state microwave sources, and fieldeffect devices. Devices or device characteristics based on minority-camer injection degrade due to lifetime effects. This category includes the forward and reverse currents and photocurrents of diodes, most characteristics of bipolar transistors, and most switching and optoelectronic-device properties. Surfacecontrolled devices, such as, MIS fieldeffect transistors and capacitors fail primarily because of oxidecharge buildup and surface effects. Radiation-produced changes in lifetime, carrier concentration, and mobility are the result of lattice atom displacements (atomic disorder), whereas the oxide and surface effects are caused by the ionization dose received.

In addition to the permanent degradation mechanisms listed in Table I, ionizing radiation produces electron-hole pairs in materials during the exposure. For mixed nuclear environments, the ionization produced by neutrons is much less than that produced by X- and y ray photons. Carriers produced in device depletion regions, or within a diffusion length of these regions, can produce photocurrents at the device terminals. These photocurrents can cause large transients in linear circuits and can cause errors in the information stored by logic circuits.

FAST-NEUTRON EFFECTS The most important effects of fast neutrons on semiconduc-

tor materials is to alter the bulk electrical properties. The neutron sensitivity of mobility, carrier concentration, and minoritycarrier lifetime is plotted in Fig. 1 for 1 52 * cm silicon. The mobility data [2] show that degradation does not become severe until the neutron fluence (&) exceeds 10’’ neutron/ cm’. At this fluence the bulkcarrier concentration has dropped essentially to zero in both floating-zone (FZ) and

TABLE I PRIMARY AND SECONDARY RADIATION FAILURE

MECHANISMS FOR SEMICONDUCTOR DEVICES

I t I I I mide Failure Mechanisms

Carkr charqe anb DEVICE TYPE

a f f e c t s DegrMi Trsping C q a d a t i i s u r f a c e mobility Remlmd Lletime

Scmiconductar Resistors 5 P

I Diodcs IL-. forward current, photocurrent1 l p l s I I s 1

I MiQ- Bulk Oxi l l rbrs IGunn. L S N I I p I s I I

Fig. 1. Calculated parameter degradation for 1 51 crn n-type silicon near room temperature. p/po from Stein data at 280 K, n/no from

6 is in units of neutronslcm’ (SPR, E > 10 keV) [2]-[4]. Stein and Gereth data at 270 K, r/ro from Gregory data at 300 K.

crucible-grown (CG) silicon. The observed lifetime degradation is quite complex. The fluence at which degradation becomes severe depends both on the initial lifetime 70 and the measurement injection level. The range of curves for 7/70

against r#~,, corresponds approximately to the range of lifetime values and injection conditions found in typical devices. The low-injection (LI) curve for 70 = 1 U 6 s would typify the behavior in solar cells at low injection. Here the lifetime has decreased by 50 percent at &, = 5 X 10” neutron/cm’. At the other extreme, the high-injection (HI) curve for r0 = 10*s @ght typify the behavior observed in a modem, golddoped transistor. In this case, a fluence of approximately 5 X 10’’ neutron/cm’ is required for a SO-percent lifetime reduction. As will be shown later, however, the effects of radiation on a modem, narrow-base bipolar transistor are quite complex and can only generally be related to a specific lifetime value.

PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

Fig. 2. Degradation of cutoff frequency /s with neutron fluence for HP-3582 1E (phosphorous emitter).

Carrier Removal in Bulk Regions As Fig. 1 indicates, carrier removal and lifetime degradation

are the two limiting effects in most neutron-irradiated silicon devices. Examples of the effects of carrier removal in devices are the increase in saturation voltage in power bipolar transistors [ 51 and the falloff in fs' in microwave transistors [ 61. Both effects occur because of an increase in the unrnodulated series collector resistance due to carrier removal in the lightly doped collector region. Fig. 2 illustrates the experimentally observed degradation in fs for a commercial silicon microwave device (HP-3582 1E). Upon neutron irradiation, a reduction occurs in & which is most severe at low values of collector- emitter bias. The increased series collector resistance, due to carrier removal, reduces the collector-base reverse bias at low values of V,,, and base widening into the collector (Kirk effect) occurs. This increases the base charge storage after radiation, hence reduces f , . At the higher values of VCE (25 V), thete is sufficient collector-base reverse bias at this current level to prevent base widening until much higher irradiation levels. Simhar effects have been observed in microwave-power de-

vices operated in class C circuits [ 71. Base widening due to neutron irradiation produces a nonlinear relationship between the emitter and collector current. This distorts the collector current waveform and leads to a decrease in output power after irradiation. The change is directly attributable to the increased collector resistance produced by carrier removal. As a result, the operating point for device operation shifts with irradiation. The effect is observed as a detuning of the circuit from the designed operating frequency.

Carrier-Trapping Effects in Device Space-Charge Regions To understand the effects of radiation-produced defects in

device space-charge regions, it is first necessary to consider the steady-state or dc effects. Consider the p*-n junction shown in Fig. 3, where a single deep acceptor is present with a level at Et. Although one or more isolated levels may not adequately de- scribe the damage produced by neutron irradiation, a model based on discrete levels is nevertheless useful in understanding the effects which occur in the more complex situation. As Fig. .3. jllugtrates, bulkcarrier removal data are appropriate in the neutral n-type region of this structure but can be incorrect in the space-charge region [ 81. Within the space-charge region

unity (0 dB). Ifs is the frequency at which the forward-transfer ratio IS, I I becomes

' BULK DAfA INAPPROPRIATE BULK DATA OK

Fig. 3. Trap occupancy versus position in the spacexharge region of a p+-n junction.

" 1 10 I& 12 104 12 lo6 107 FREQUENCY (Hz)

Fig. 4. Small-signal capacitance against frequency for a neutron-irradiated p+-n junction at zero bias.

the defect occupancy is a function of both x and t (or frequency f for small-signal operation). Since the width of the space-charge regon after irradiation depends on the carrier removal in this region and not in the bulk, device parameters which depend on the space-charge region width will exhibit degradation characteristics different from bulk material. For example, the breakdown voltage and low-frequency capacitance of the p*-n junction in Fig. 3 will both change less with irradiation than indicated by bulk data if the added compensating levels are void of electrons in the space-charge region.

When a small-signal alternating bias is applied to the reverse- biased junction in Fig. 3, the defects (traps) at the space- charge-region edge will alternately charge and discharge. At high frequencies, the capture and emission of carriers from the trapping centers will be unable to follow the applied signal and the device response will become frequency dependent. Previ- ous papers [9] -[ 141 have discussed such effects in reverse- biased junctions, primarily for various types of chemically induced traps. The primary effect of such traps is to produce a frequency dependency in the small-signal capacitance and conductance of the junction. Typical results [ 151 for the capacitance of a neutron-irradiated junction are shown in Fig. 4. Be- fore irradiation the capacitance is essentially independent of frequency, up to lo' Hz. However, after irradiation the capacitance at high frequencies is much lower than the low-frequency value, since the added traps cannot respond at the higher frequencies. in other words, the effective space-chare


.-

"

t i.. "

Frequency - Hz

Fig. 5 . Calculated and experimental capacitance at zero dc voltage bias after a neutron fluence of 4.4 X lo1' neuhon/cm2 E > 10 keV.

density at the edge of the space-charge region is smaller at hgh frequencies; hence, the junction width modulation is greater (or capacitance smaller) for a given applied AV. As Fig. 4 shows, the capacitance-frequency characteristics of neutron- irradiated p*-n junctions are characteristic of two energy levels, i.e., the low-temperature data indicates two distinct steps in the capacitance-frequency characteristic.

Exact small-signal calculations [ 161 have been performed using values for the two levels obtained by Gregory and by Naik and Oldham [ 81. Fig. 5 shows the calculated and experimental data for a lightly doped n-type diode. The low- and high-frequency capacitance calculated using a trap density of 1.5 X 10'' cm-' agree almost identically with the experimental data. Although the shapes of the curves are similar, the transition in the calculated curve is more abrupt than the experimental data. This lack of agreement at low frequencies suggests that another deep level may be present which accounts for a change of about 10 percent in the capacitance characteristic. Such a level would probably have escaped detection in the experiments cited because of the uncertainties involved in determining the energy-level values.

The calculated conductance shown in Fig. 5 is basically a function of recombination in the spacecharge region of the device. For low frequencies, the conductance is low, corre- sponding to high impedance and small recombination in the relatively narrow space-charge region. At moderate frequencies, the conductance increases because of the increase in average spacecharge-region width. For very-high frequencies, the effective conductance of the device increases rapidly with frequency, since the total conductance of a diode is propor- tional to the sum of the junction conductance and a term containing the product of frequency squared and the series resistance of the device [ 171.

These calculations also yield information concerning the changes in free and trapped charge distributions in the vicinity of the junction. Typical results are shown in Fig. 6 . For low frequencies, the incremental change in trapped charge in the space-charge region is quite large, indicating that the trap occupancy follows the applied signal. At high frequencies, the incremental change in trapped charge is much less, since the trap occupancy cannot follow the applied signal, and the capacitance is determined entirely by the changes in the free-carrier distributions at the edge of the now wider space-charge region.

The results of the calculations indicate that the trapping centers produced by neutron irradiation respond in the fre-

1.0 I I ,

E 0.8- L Frequency n

a :I[ 0.2

0.0 0.5

~ i s t a n c e microns Fig. 6. Incremental trapped and free charge in a p+-n junction at low

and high frequencies. Two-level trapping model from Gregory et el. [ S ] for neutron-irradiated n-type silicon.

quency range between lo3 and lo6 Hz. Based on this result, the small-signal response of irradiated bipolar transistors can be predicted. For low frequencies, carrier capture and emission occur in a time much less than the period of the applied signal and the small-signal response is determined primarily by the degradation in the dc characteristics of the device. At microwave frequencies, the trapped charge cannot follow the applied signal and the frequency response is determined by changes in device parameters produced by carrier removal and the increased recombination. At intermediate frequencies, the change in lifetime, carrier removal, and the response of the trapping centers with applied signal can influence the frequency response of the device.

Lifetime Effects in Devices Most lifetime studies in irradiated bulk samples are per-

formed by either photodecay [ 181 or steady-state photoconductivity techniques [ 191. The results of these studies are valuable, but can only infrequently be applied directly in device structures to predict radiation effects. The photodecay studies are frequently hampered by trapping effects and steady- state photoconductivity is difficult to employ in materials doped to typical device levels. The lifetime curves in Fig. 1 are not true bulk results but are obtained from diffusion-length measurements in solar cells. These measurements are steady- state minority carrier measurements; hence, transient injection- level changes and trapping effects are avoided 141. This and other lifetime data from bulk and device studies provide a basis for device hardness calculations; however, incorporating such data into the physics of a modem transistor is a major problem. To appreciate this problem one needs to understand certain features of a bipolar transistor. In basic terms this device is a three-terminal structure where a small base current (zb) is utilized to modulate a larger collector current (I,). The dc gain (common emitter) is defined simply as ~ F E = IC/&.

The displacement damage produced by neutron irradiation results in recombination centers throughout a bipolar transistor which cause the base current to increase and the device gain to decrease. For an n-p-n structure, the total base current in a device can be written as

1268

In this equation, the total base current is seen to consist of the recombination occurring in all the device regions. These terms are: i) recombination in the neutral emitter (the emitter contribution to base current includes all of the back-injection current from the base into the emitter); ii) recombination in the emitter-base spacecharge region; iii) recombination in the neutral base region; iv) recombination in the collector region; and v) surface recombination. In this equation, T is the lifetime (as a function of injection level) in each region. Past efforts at improving device hardness have concentrated on reducing the base recombination term iii) by narrowing the base region. Concomitantly, the change in device properties with irradiation has been minimized by using gold doping to reduce the preirradiation lifetime. However, recent studies [ 201 -[ 231 have shown that the first two terms in this expression are normally dominant in modem, narrow-base devices. It was recog- nized that future improvements in device hardness must be based on reducing these terms.

In order to effect these improvements in device hardness, a more detailed understanding is required of the neutron degradation in the different regions. Two prerequisites exist to en- able such studies. First, a lifetime model is needed for the neutron damage, to predict the proper recombination values in the neutral p- and n-type regions and in spacecharge regions. The "hybrid" recombination model' [201 although almost totally empirical, has proven to be adequate, and accurate, in most devices. Second, the boundaries between the different regions in modern devices are so imprecise, owing to the small dimensions and large doping gradients, that accurate closed- form analytic solutions are not achievable. This means that numerical solutions of the equations governing carrier flow in- side the device are an absolute necessity. The numerical techniques to obtain such solutions 1241, have been extended to treat neutron damage in modern devices [ 21 ] . Calculations were performed [ 2 11 to determine quantitatively the importance of the various regions of a typical submicrometer base width diffused phosphorus emitter transistor. The sum of the neutral emitter region and spacecharge region recombination was seen to account for more than 85 percent of the total base current. The neutral base region thus contributed less than 15 percent of the base current.

The calculated results of employing a more-nearly-abrupt profile for an emitter junction are shown in Fig. 7, where the recombination rate has been plotted versus position for the two device profiles shown in the inset of Fig. 7. As noted, the collector current density, base-region doping, and collector bias conditions are identical for the two profiles. The calculations indicate the base current and hence recombination for the diffused profile can be reduced by approximately one-half by employing an abrupt emitter profile. Since a shallow arsenic diffusion approximates an abrupt profile in silicon, due to the nonlinear arsenic diffusion constant, such devices were explored both theoretically and experimentally. The doping profiles for two units in this study, designated AS500 and P700 (in this designation the prefix is the emitter dopant and the attached number is the approximate base width in angstroms), are shown in Fig. 8. The significant difference between the

between effective minority carrier lifetime and the carrier injection 'The hybtid recombination model assumes a p o w e r law relationship

ratio. This model uses experimental lifetime data in the neutral regions of the device and combines experimental data with known physical information about neutron-produced damage to model recombination in device sprcecharge regions.

PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

I 1.0 2.0 3.0 4.0 I

Distance (Microns)

I

Fig. 7. Recombination versus position in the emitter and base regions.

Distance (Microns) Distance (Microns1

(a) (b) Fig. 8. Doping profiies for two experimental shallow emitter devices.

(a) Arsenic emitter (ASSOO). (b) Phosphorous emitter (P700).

two devices is the shape of the emitter profile. The impurity gradient in the vicinity of the emitter base junction is much steeper for the arsenic unit than for the phosphorus device.

The effects of the profile variation on the device characteristics can be seen by examining the calculated recombination as a function of position in Fig. 9. The peak recombination rate occurs in the spacecharge region and is essentially identical for the two devices. The important difference in recombination rate occurs in the emitter region of the devices. By com- paring relative areas in Fig. 9, it can be seen that the emitter region recombination is larger in the phosphorus device than in the arsenicemitter device.

These devices were irradiated in steps at the Sandia Pulse Reactor (SPRII) facility to a total fluence level in excess of 1OI6 neu!xon/cm2 ( E > 10 keV). The device gain does not degrade substantially in either device below a neutron fluence level of 10'' neutron/cm2. After a neutron fluence of 10l6 neutron/cm', the arsenic device has a gain of 11, while


I P I , / I , I ! I 1026 Arsenic emitter

Distance (Microns) Distance IMicronrl

(a) (6 ) Fig. 9. Recombination rate versus position for the two experimental devices. (a) Arsenic emitter (AS500). (b) Phosphorous emitter (P700).

, c $ 7 Y

E

5

Fig. 10. Neutron fluence required to reduce hFE to unity versus base width.

the phosphorus device has a gain of 7. For comparison, a’high- frequency commercial device, the 2N918, typically has a gain of 10 after a neutron fluence of 1 X 10” neutronlcm’, an order of magnitude lower. These devices (AS500 and P700) are substantially more tolerant than existing commercial devices.

The theoretical and experimental results [2 1 I are summarized in Fig. 10 in a plot of the neutron fluence for unity current gain against device base width. For conventional deep phosphorusemitter devices, with a fixed number of base impurities (NB) the calculations indicate that an optimum base width occurs, below which emitter region recombination increases significantly. For the narrow-base devices with more- nearly-abrupt shallow emitters, no optimum base width occurs, since the emitter region recombination does not show the same rapid increase with decreasing base width. The experimental data (closed symbols) are in excellent agreement with the calculated results (open symbols) for the AS500, P700, and AS 1200 narrow-base devices and are consistent with the calculations for the wide-base devices. The larger integrated base doping (NB) in the AS400 device than the AS500 device in-

t

i I

‘0

Fi. 11. Typical transient annealing curve for bipolar transistor following exposure to neutron pulse. Annealing factor (AF) is defined 88 the ratio o f the damage, at MY time after exposure, to the final stable damage.

creases its sensitivity to neutron irradiation, as discussed in [ 21 1. The wider base regions and lower emitter-base junction impurity gradients in the p700 and the AS1200 devices increases both the neutral region and space-charge region recombination components. Both the experimental and theoretical results illustrate the advantages achieved using the shallow As emitter profile.

Transient Annealing In a nuclear radiation environment, one frequently must

operate a semiconductor device soon after exposure to a pulse of neutrons. Previous studies [ 251 -[ 3 11 have shown that when this occurs the damage to device parameters can be much more severe than would be predicted based on passive long- term exposure data. This is illustrated in Fig. 1 1 [ 3 11 where both the current gain (hfe) and inverse current gain ( l/hfe) for a bipolar transistor are plotted as a function of time following an exposure to a pulse of neutrons at time t o . As the inset shows, a large decrease occurs in the device gain during the neutron pulse. However, the gain subsequently increases to a stable value a few seconds after the exposure.

The quantity in Fig. 11 termed the annealing factor, in real- ity a damage magnification factor, allows long-term data to be derated such that it can be applied at any given time after exposure to a neutron pulse. Detailed measurements have been reported [ 3 1 ] which explore the dependence of neutron damage annealing on dopant type and concentration, operating temperature, and injection level. These studies show rather conclusively that, near room temperature, the primary factor in determining annealing rate is the electron density in the active region of a device. For situations where the electron density is quite small, such as in a transistor base-emitter space- charge region, or in the neutral-base region of a passive n-p-n transistor, the recovery after neutron irradiation can be quite slow. In this case, large values of annealing factor can persist for several seconds after exposure.

The transient annealing observed in a wide variety of semiconductor devices is quite consistent when electron density is assumed to be the major driving force for annealing. This

1270 PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

' 7

ao

Fig. 12. Nomograph for prediction of annealing factors, at room tcm-

section of the annealing factor curve and a straight line drawn from perature. The appropriate annealing factor is indicated at the inter-

VBE and the time after the neutron burst.

VDD(lQ)

Substrate (W

N-Source

N - W O L 14

CAMOM "SS'A

(a) (b) Fig. 13. Equivalent circuits for SCR structures present on CD4007.

(a) For worst-case bias. (b) For normal inverter bias.

unique dependence on electron density has beenutilized to generate the nomograph [32] in Fig. 12, which can be employed to predict the annealing factor in a device at a given time after exposure, simply by knowing the electron density in the device active region. In high-frequency transistors, such as those we discussed, the post-irradiation gain is determined by recombination in the base-emitter space-charge region [21 I . Hence the injected electron density at the center of the space- charge region is the limiting parameter. Since this density is a unique function of V,,, the annealing factor for a high-frequency transistor can be predicted merely by using the mea- sured VBE at the desired operating point. Although this esti- mate is not exact, it is within k10 percent over the range of Fig. 12, hence, quite adequate for design purposes. As noted from the figure, the annealing factor is very large for devices which are turned off during or immediately after the exposure or for devices required to function at early times after exposure.

IONIZATION EFFECTS (7) The radiation-induced ionization produced in a semiconduc-

tor device can produce failure modes distinct from those discussed in the previous section for neutron damage. Previous

studies [33]-[36] have shown that ionizing radiation causes failure of silicon devices due to two mechanisms: 1) trapped charge buildup in the silicon dioxide passivation layer and 2) an increase in the density of surface states at the Si-SiOz interface. Both of these mechanisms can be important in determining ionization effects in typical surface-controlled devices such as MOSFET's and in bulk devices such as planar bipolar transistors.

Permanent Effects In a MOS transistor the dominant effect of the trapped-oxide

charge is to produce semi-permanent shifts in the VGS-IDS characteristics for the device, by altering the device threshold voltage. . Past studies in the Si-SiOz system have shown that the polarity of the trapped-oxide charge is positive (trapped holes) and that its location in the SiOz varies with the applied gate bias during irradiation. Negative gate-substrate bias results in a positive charge distribution near the gate electrode, while positive gate-substrate bias produces the distribution near the substrate. The latter bias condition results in greater shift in threshold voltage, since a larger applied voltage is required in this case to return the MOS structure to flatband conditions (zero field at the silicon surface). Based on the geo- metrical location of the trapped-charge, pchannel devices uti- lizing negative values of gate voltage tend to be less sensitive to ionizing radiation than nchannel devices.

Several models have been proposed to explain the charge buildup observed in the oxide after exposure to ionizing radiation. Basically, the models fal l into two categories [35] ; intrinsic models based on bonding defects in pure SiOz and extrinsic models based on motion and trapping by impurities. Experimental results indicate the absolute magnitude of the trapped-charge density depends greatly on the details of the processing employed. The dependence of charge trapping on processing can be related to specific characteristics of either model.

Recent work by Aubuchon [331 and Hughes [341 have shown that both optimized oxidation growth cycles and oxide cleanliness are important in increasing MOS radiation tolerance. In particular Aubuchon [ 331 has shown that dry oxides grown near 1000°C can produce very tolerant devices while the work of Hughes [34] has shown that the immobile sodium present in contaminated oxides may lead to a much lower radiation tolerance than is characteristic of a similar, but clean, oxide. Recent studies [37] have shown that the sodium contamina- tion in the oxide can be reduced by using chlorine to preclean furnace tubes prior to oxide growth. Although the chlorine has a beneficial cleaning effect, chlorine incorporated into the oxide during the growth phase can cause a reduction in the radiation hardness of the oxide layer.

Recent studies by Burghard and Gwyn [36] of commercial and hardened laboratory processes for CMOS, a technology which employs both p and nchannel transistors have shown that certain commercial processes yield devices which are tolerant to near lo6 rad Si, while others fail substantially below 10' rad Si. The hardened laboratory processes are generally more tolerant, with a few exceptions. The results of their extensive evaluation have been reproduced in Table 11. The processes have been grouped as radiation-tolerant commercial, intolerant commercial and hardened laboratory. The radiation levels at failure are shown for both bias conditions for a CMOS inverter (input high (+lo V) and input low (0 V)), for the four possible modes of failure shown in the table. The


TABLE I1 APPROXIMATE CIRCUIT FAILURE LEVELS (RAD SI)

1 2 3 4 Failure Mode

hknufacturer/Ftocess Hi& Low High Low High Low High Low hput Voltage

Tolerant Commercial A/Commercial BICommercial (Lot 1)

(Lot 2) Intolerant Commercial

C/Commercial D/Commercial E/Advanced development F/CoMnercial G/ColMlercial H/commercial

I/SiO2 Ja/Si02Cr K/SiO*-Al

Hardened Lab. Processes

> lo7 > lo6 -106

<los <lo5 <lo5 > lo5 <losb < lo5

>lo7 > lo7 >lo7

- lo6 > lo6 <lo7

-lo5 -lo5 >lo5 <lo5

>lo7

-lo7 > lo7 -lo7

-

> lo7 - lo6 >lo5

< lo5 <lo5 <lo5 <losb < 10:b -10

-lo5 > lo7 >lo7

<lo5 -lo5 <lo5 -lo5 <lo5 - <lo5 <los

<los >lo7

1) Fded to switch states (90 percent). 2) Delay times increased a factor of 4 (qea.sured at SO-percent level). 3) Leakage current inneased above 10 A. 4) immunity [ ~ h (:::) for Vout = ~00p.I. b m a g e paths other than transistor channels are most important. allhe prerad n-1 threshold voltages were much higher for manufacturer J (-45 V) than other manufacturers.

basic conclusion of their study is that by selecting particular commercial processes, CMOS circuits can be obtained which will operate after exposure to ionizing radiation doses near lo6 rad.

Although the charge trapped in the oxide region produces an essentially permanent shift in the threshold voltage, some transient annealing of the charge occurs immediately after the ionizing radiation exposure. This annealing is analogous to the transient annealing occurring in bipolar transistors after a neutron exposure, in that the MOS transistor characteristics change with time. The threshold-voltage shift is largest immediately after the exposure and recovers to a lower value within several seconds. The results of a study performed by Habing and Shafer [38] on the room-temperature annealing of the trapped charge in a CMOS inverter indicates the threshold-voltage recovery is essentially logarithmic with time and that the time required to reach a steady-state value may be as long as 1000 s. The study also indicated that the gate bias after the irradiation exposure can substantially influence the annealing characteristics. Furthermore, a radiation enhanced annealing can occur if the device remains in a low-intensity ionizing radiation environment after the initial exposure.

Transient Radiation Effects The final component of the nuclear environment to be con-

sidered is the transient environment. Most systems have two transient requirements, one for undisturbed operation and one for survival. The survival dose rate is usually several orders of magnitude higher than the level causing transient upset. Opera- tion through a transient is made difficult by the photocurrents ‘and conductivity modulation produced by the radiation pulse. The photocurrent produced by the collection of electron-hole pairs created in the depletion regions of a device (prompt photocurrent) essentially follows the shape of the ionization pulse. A delayed component of photocurrent is produced by the diffusion of carriers from bulk regions of the device into the space-charge regions. Since the depletion region

volume for the reverse-biased collector-base junction is usually much larger than the volume of the emitter-base spacecharge region, the dominant transient effect is the creation of photocurrent by the collector-base junction [ 391 . Unless the photocurrent is removed by the base terminal, the current injected into the base region causes the baseemitter junction to become forward biased. In this manner, the primary collector-base junction photocurrent can be effectively amplified ‘by the device gain to produce a larger, longer duration secondary photocurrent. In a digital IC such photocurrents will cause logic failure. In linear IC’s, analog errors will result. To minimize the circuit effects of collector-junction photocurrents in bipolar IC’s, several techniques are employed. Secondary photocurrents are avoided by employing compensating diode junctions to shunt the collector-base photocurrent away from the device emitter-base junction [40] . Thin-fiim metallic resistors are employed both to increase the transient levels at which the circuits can be operated and to prevent permanent failure due to excessive supply currents which could flow at higher dose rates.

.Photocurrents can produce semiconductorcontrolled recti- fier (SCR) action in parasitic four layer pn-p-n or n-p-n-p paths in bipolar IC’s. Once a parasitic SCR has been triggered a low resistance path is produced between two regions of the circuit, usually between the power supply and ground. Circuit latchup occurs if this low resistance path remains after the radiation pulse. The Occurrence of circuit latchup in IC’s can cause long lasting, perhaps catastrophic, failure in certain bipolar and MOS IC’s (41 1 . Although there are several techniques which can be employed to eliminate latchup, the most common one at present in bipolar circuits is to use dielectric isolation to isolate electrically the different circuit elements, thus preventing the formation of undesired latchup paths during transient radiation exposure.

Recent studies by Gregory and Shafer [42] on junction-isolated CMOS IC’s have identified the p-n-p-n paths on these circuits which can lead to latchup. In Fig. 13, the equivalent

1272 PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

Transient ionization effects and the mechanisms of point defect production and annealing belong in category l). It is fairly straightforward to calculate the hole-electron pair production due to a pulse of ionization and most of the effects of such ionization have been explored and characterized. Photo- currents in transistors and IC’s can be predicted and, to some extent, compensation techniques can be used to minimize the photocurrent effects in circuits. Circuit latchup effects due to ionization-activated parasitic devices has been explored and the mystery is now removed. The intrinsic point defects produced by high energy electron or y-ray irradiation have been identified and the interactions of these primary defects with impurities such as P, B, As, Sb, 0, C, and Li to form defect- impurity complexes are understood [ 3 1 ] .

Into category 2), we can place the area of fast-neutron damage. Empirical models exist for the permanent and transient effects of neutron irradiation of lifetime, mobility, and carrier concentration. These models allow prediction of neutron effects in a given device structure; however, the supporting models and theory are presently incomplete and inadequate. As mentioned earlier, it is generally accepted that neutron damage occurs in clusters. This fact greatly complicates the modeling of neutron damage on the above parameters. The clustered nature of the damage produces strong dependences of postirradiation lifetime and carrier concentration on injection level. Several models have been developed to characterize these dependences but none have yet been completely satisfac- tory. Similarly, models have been created to explain the unique character of the transient annealing observed after neutron irradiation, but none have been proven to be uniquely valid. The area of neutron damage can be summarized as follows. The effects on semiconductor parameters are well- characterized and data exists to allow the device or circuit designer to predict the effects in his structures. Most of the differences between neutron damage and point-defect behavior have been assigned to the cluster nature of the neutron damage and cluster models have been developed which are qualitatively successful in explaining most of the observed effects. How- ever, unique quantitative models do not yet exist.

The topic of charge trapping in insulators and fast surface- state creation at insulator-semiconductor interfaces definitely belongs in category 3). These effects depend strongly on processing and the quality of the materials. Some of the important parameters such as oxide-growth temperature, silicon orientation, and importance of cleanliness during device fabri- cation have been determined, however, all aspects of these dependences are not yet known. The theoretical models which have been advanced to explain the various observed effects are somewhat speculative. This area is presently receiving considerable attention and our understanding should advance rapidly in the near future.

The understanding of the effects of radiation on semiconductor device properties has increased tremendously during the past few years. This knowledge along with improved fab- rication techniques have essentially removed the limitations in producing radiation hard bipolar devices. Several unsolved problems exist in improving the ionizing radiation hardnkss of MOS devices. This is one of the remaining areas where a concentrated research effort is required.

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(b)

Fii. 14. SCR characteristics for the RCA CD4007A CMOS IC. (a) For worst-case bias conditions. (b) For normal inverter bias conditions.

circuits of SCR structures present on a CMOS circuit (CD4007A) for 1) worst-case bias and 2) normal inverter bias conditions are shown. Worst-case bias is that where the poten- tial SCR’s are deliberately biased to encourage latchup. The same essential p-n-p-n structures are active in both bias situations; however, for the normal bias case, the forward bias on the two emitter junctions (gates) must be provided by lateral voltage drops due to photocurrent (or SCR current after turnon) flowing laterally through the substrate and pwell re- sistances, R, and R,. For this reason, the active SCR in case 2) is less sensitive and has a higher holding current. Latchup of the 4007 circuit can be induced electrically for either of the bias conditions and also occurs if the circuit is exposed to an appropriate radiation transient ( lo9 rad/$. Fig. 14 shows the observed SCR characteristics for the 4007 for these two bias conditions. Although these studies demonstrate that SCR action is prevalent in CMOS circuits, there are several techniques which can be employed to eliminate latchup. The prb- posed technique to be employed in future design and fabrica- tion can be grouped in three categories: 1) variations in material parameters, 2) variations in circuit layout, and 3) variations in CMOS processing. Detailed suggestions are given in [421.

SUMMARY AND CONCLUSIONS The pre’vious sections of this paper have presented an over-

view of radiation effects in semiconductor devices and have discussed several important effects in considerable detail. In this summary the goal is to attach labels to the effects discussed, to indicate the degree to which they presently are characterized and understood. Three categories have been chosen to represent these different levels of understanding. These categories are: 1) effects which are both characterized and understood, 2) effects which are characterized but not understood, and 3) effects which are neither characterized or understood.


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RAdiation Effects on Semiconductor Devices