RC Presentation

8/18/2019 RC Presentation

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RECONFIGURABLE

COMPUTING HARDWAREDEVICE ARCHITECTURE

Kalyani S. Bhosale

Roll No – ME13EM05

Under the guidance of

rof. R. R. !t"ar"ar


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#ield rogra$$a%le &ate 'rray (#&')

consists of three $ain *arts+

a set of programmable logic cells also called logicblocks or confgurable logic blocks (CLBs)

a programmable interconnection network

a set of input and output cells around the de,ice E,ery function to %e i$*le$ented in #&' is *artitioned

in $odules- each of hich can %e i$*le$ented in a logic%loc".

/he logic %loc"s are then connected together using the*rogra$$a%le interconnection.

'll three %asic co$*onents of an #&' can %e*rogra$$ed %y the user in the eld.

#&'s can %e *rogra$$ed once or se,eral ti$esde*ending on the technology used


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/echnology

/he technology denes ho the dierent%loc"s (logic %loc"s-interconnect-in*ut2out*ut) are *hysically

realied. Basically- to $a4ortechnologies eist+

'ntifuse 6 li$ited to the realiation

of interconnections Me$ory6%ased 6 used for the

co$*utation as ell as theinterconnections

(eg+ the SR'M- the EER7M and


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'ntifuse /echnology

'n antifuse%ased #&' uses s*ecial antifuses included at eachconnection custo$iation *oint.

/he to6ter$inal ele$ents are connected to the u**er and loerlayer of the antifuse- in the $iddle of hich a dielectric is *laced.

!n its initial state- the high resistance of the dielectric does not

allo any current to 8o %eteen the to layers.

'**lying a high ,oltage causes large *oer dissi*ation in a s$allarea- hich $elts the dielectric.

/his o*eration drastically reduces the resistance and a lin" can %e%uilt- hich *er$anently connects the to layers.

/he to ty*es of antifuses actually co$$ercialied are+ The Programmable Low-Impedance Circuit Element (PLICE)

(ctel)

/he !etal nti"use also called #iaLink ( 9uic":ogic)


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SR'M

SR'M is used to congure the logic%loc"s and the connection as ell.

$ost idely used

!n an SR'M6%ased #&'- the states ofthe logic %loc"s- i.e. their functionality%its as ell as that of the

interconnections- are controlled %y theout*ut of SR'M cells


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ER7M

Erasable programmable read onl$memor$ (EP%&!) de'ices are based ona 8oating gate. /he de,ice can %e

*er$anently *rogra$$ed %y a**lying ahigh ,oltage %eteen the control gateand the drain of the transistor.


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EER7M

!n EER7M6%ased de,ices- to or $oretransistors are ty*ically used in a R7Mcell+ one access and one *rogra$$ed

transistor. /he *rogra$$ed transistor *erfor$s the

sa$e function as the 8oating gate in anER7M- ith %oth charge and discharge%eing done electrically.


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#:'S; 6 EER7M

!n the 8ash6EER7Ms that are used- totransistors share the 8oating gate- hich store the*rogra$$ing infor$ation.

/he sensing transistor is only used for riting and,erication of the 8oating gate ,oltage hereasthe other is used as sitch.

/his can %e used to connect or disconnect routing

nets to or fro$ the congured logic. /he sitch isalso used to erase the 8oating gate.


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References

Christophe Bobda, Introduction to Reconfigurable

Computing, Springer Publication

A. Azarian, M. Ahmadi, Reconfigurable Computing

Architecture Survey and introduction, 978--!"!!-!#"$-"%$9%&"$$9 '(((

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