REED-SOLOMON CODES

数字通信系统模型

信息源

信源编码器

信道编码器

数字调制器

信

道

数字解调器

信道译码器

信源译码器

受信者

噪声源

纠错码的发展概况 通信的数学理论， Shannon(1948) 汉明码， Hamming (1950) 级连码， Forney(1966) 卷积码及有效译码 , (60 年代 ) RS 码及 BCH 码的有效译码 (60 年代 ) TCM ， Ungerboeck(1982),Forney(1984) Turbo 码， Berrou(1993) LDPC 码， Gallager(1963),Macky(1996) 空时编码 ,Tarokh(2000) 协作与网络编码 (2000;2002)

码距与检错和纠错能力的关系

二进制本源 BCH 码 对于任意正整数 m(m≥3) 和 t(t< ) ，存在 GF(2)

具有如下参数的二进制本原 BCH 码 (n, k) ： 分组长度 奇偶校验位的数目 最小距离

该码字 (n, k) 能够纠正 t 个或少于 t 个差错的任意组合。

12m

2 1mn

n k mt

min 2 1d t

非二进制本源 BCH 码 存在 具有如下参数的非二进制本原 BCH 码：

分组长度 奇偶校验位的数目 最小距离

( )mGF q

1mn q

2n k mt

min 2 1d t

REED-SOLOMON 码 m = 1 的 q 进制 BCH 码是 q 进制 BCH 码中

最重要的一个子类

分组长度 奇偶校验位的数目 最小距离

1n q 2n k t

min 2 1d t

( )mGF q

BCH 和 RS

(2)GF

3(4 )

4, 3

GF

q m

(64)

64, 1

GF

q m

( )mGF q

二进制 BCH

非二进制 RS

RS 码

编码的最小码距直接关系到这种码的检错和纠错能力

硬判决译码 接收端解调器将含有噪声的信号用匹配滤波器硬判决，

得到 0 或者 1 ，这就是接收序列 r 处理这种硬判决接收序列的译码算法叫做硬判决译码 硬判决丢失了接受信号中含有的一些信息，影响译码

性能

解调 判决 译码

软判决译码 若解调器对信号没有量化或量化为多于两个电平，得

到软判决接收序列。利用软判决接收序列进行译码叫做软判决译码

一般比硬判决译码多 3dB 增益

解调 译码

主要译码算法 hard-decision decoding (HDD): Berlekamp-Messay algorithm (BMA) iBM, RiBM, Eucild

soft-decision decoding: KV GMD ->BGMD Chase -> Low-complexity chase (LCC)

RIBM

信码 生成多项式

编码 发送码字 过信道加噪声 c(x) + e(x) 接收码字 1 1 1

0 1 2 1( ) ... nnr x r r x r x r x

1 1 10 1 2 1( ) ... n

nc x c c x c x c x

1 1 10 1 2 1( ) ... k

km x m m x m x m x

1

1 1 10 1 2 1

( ) ( )

...

n km i

i

n k n kn k n k

g x x

g g x g x g x g x

( ) ( ) ( )c x m x g x

RIBM

校验子 syndrome

V 是码字错误个数，可见校验的值只与错误位置和值有关，若传输无错，校验子为零

RIBM

定义错误位置 Xk 和错误值 Yk :

校验子和 Xk ， Yk

RIBM

定义错误位置多项式

错误估值多项式

求解关键方程

Forney 算法

1

( ) (1 )v

kk

x xX

( )x

( ) ( ) ( )mod( )n kx S x x x

'

( )1,2...

( )

i

i ie i v

ALGEBRAIC SOFT-DECISION DECODING

multiplicity assignment interpolation factorization

LCC 译码过程

MULTIPLICITY ASSIGNMENT

The error-correcting capacity and complexity of ASD algorithms are mainly determined by the multiplicity assignment step.

KV BGMD LCC

MULTIPLICITY ASSIGNMENT

KV multiplicity assignment

BGMD multiplicity assignment

LCC MULTIPLICITY ASSIGNMENT

In the LCC multiplicity assignment scheme the reliability of each code position is first determined by the log-likelihood ratio (LLR).

Here and are the most likely and second most likely symbols transmitted in the j-th position, respectively.

'jj

LCC MULTIPLICITY ASSIGNMENT

η<n-k most unreliable code positions

While other n-η code positions

MODIFIED-LCC MULTIPLICITY ASSIGNMENT

a modified LCC (MLCC) decoding is proposed by adding erasures to the test vectors. With the same η , the proposed algorithm can achieve much better performance than the original LCC decoding.

Implementation of ASD algorithms for a long RS code over the EPR4 channel with 100% AWGN.

BCJR algorithm is used as the channel detector to output the reliability of each received bit.

MODIFIED-LCC MULTIPLICITY ASSIGNMENT

RE-ENCODING AND COORDINATE TRANSFORMATION

The complexity of the ASD algorithms can be significantly reduced by applying the re-encoding and coordinate transformation

k most reliable code position

η most unreliable code position

rest n-k-η most reliable code position

( , ) ( ,0)i i ir

0, 0,

1, 1,

( , ) ( , )

( , ) ( , )

j j i j

j j i j

r

r

0, 0,( , ) ( , )j j i jr

RE-ENCODING AND COORDINATE TRANSFORMATION

k

Re-encoder or erasure-only

decoder

Coordinate Transformation

RE-ENCODER AND COORDINATE TRANSACTION

RE-ENCODER AND COORDINATE TRANSACTION

INTERPOLATION

INTERPOLATION

BACKWARD INTERPOLATION FOR LCC DECODING

INTERPOLATION

Backward interpolation for LCC decoding Unified Backward-forward LCC Interpolation Reduced-complexity Multi-interpolator

Scheme for the LCC decoding

BACKWARD INTERPOLATION FOR LCC DECODING

UNIFIED BACKWARD-FORWARD LCC INTERPOLATION

REDUCED-COMPLEXITY MULTI-INTERPOLATOR SCHEME FOR THE LCC DECODING

REDUCED-COMPLEXITY MULTI-INTERPOLATOR SCHEME FOR THE LCC DECODING

COMPARISON WITH BACKWARD-FORWARD AND UNIFIED BACKWARD-FORWARD

Backward-forward

Unified whole unified(×4) Proposed unified for-only-back-ward

GF Mult. 14 21 84 59

GF Adder 12 19 76 39

GF Inv. 0 1 4 1

Mux (bit) 6q 15q 60q 77q

Ram (bit) 4(n – k + 1)q 4(n – k + 1)q 16(n – k + 1)q 4(n – k + 1)q

Reg.(bit) 16q 27q 108q 117q

iterations (n - k) + 2*(2^η - 1)

(n - k) + (2^η - 1)

(n - k) + (2^η/4 - 1)

Clks of each iter.

dx + 4 dx + 5 dx + 5

FACTORIZATION

FACTORIZATION-FREE

FACTORIZATION-FREE

HARD-DECISION BASED LCC

HARD-DECISION BASED LCC

几个重要性能指标 coding gain FER or BER 0/bE N

几个重要性能指标 Throughput Systematical clock Latency Critical path Area : the number of XOR gates Power consumption