1

ROAD : An Order-Impervious Optimal Detailed Router

Hasan Arslan, Shantanu Dutt

Electrical & Computer Eng.

University of Illinois at Chicago

ICCD 2003

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OUTLINE

• Introduction• Standard Single-Net Routing Mode• Ripup-Reroute Detailed Routing Alg.

• Bump &Refit (B&R) Concepts• B&R Paradigm• Applying B&R to Complete Detailed Routing

• Optimality-Preserving Speedup Methods• Lookahead TC functions• Learning-Based Search Space Pruning• Clique-Based Search Space Pruning

• Experimental Results• Conclusion

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INTRODUCTION

• Efficient Routing:– Reducing total wiring area– Lengths of critical path nets for performance

opt.

• Detailed Routing:– Net ordering problem (Std. Single-Net Routing )– Ripup-and-Reroute (R&R)

• New approach (Bump & Refit strategy)

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2 22

2

2

2

0 1 0 10 1

11

10

10

Prior work on Detailed Routing (Cont.)

A

B

D

C

E

E

• Standard single-net routing mode– during detail routing

• Does not perturb or move existing nets

Switchboxes

} }Tracks

Tracks #sCells

S T

5

0 1 0 10 1

11

10

10

Prior work on Detailed Routing(Cont.) (RIPUP-and-REROUTE)

A

B

D

C

EE

1) Single Net Routing : Route new nets without removing any existing nets.

2) Rip & Reroute : If some nets cannot be routed, rip-up the existing nets which occupy the resources of new nets. Reroute the ripped up nets

– Changes net topology– Net length can be increased– Because of ripup-reroute solution

time can be increased

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Complete Detailed Router by using Bump-&-Refit strategy

• Basic B&R developed for incremental routing (Dutt etal. ICCAD’99, ICCAD’01, TODAES’02)

• Incremental Routing– Existing routed nets set R– Some new nets set S (timing violation, noise…)– Route the nets in S by doing min. changes on nets in R.

• Bump-&-Refit Approach– Does not rip-up and reroute– Shift them (or their subnets) to other track positions ---

Bump-&-Refit (B&R)– No change in topology, length of existing nets– Optimal: Finds a detailed route if exists

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Experimental Results(Dutt etal., TODAES 2002)

10% new net, 10% unused tracks

0

100

200

300

400

500

600

700

800

sse

rd73 pm

acs

esa

o2m

m4a

term

1s7

13

s838

.1 ex1

s820

mlt3

2cli

p i5

exm

p2 i4Avg

Un

rou

ted

Ne

ts o

ve

r B

&R

STD R&R

Comparisons of STD, R&R, B&R Inc. Routing Alg.

R&R=(85x)

STD=(20x)

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• Each step in complete detailed routing is an incremental routing problem

Complete Detailed Router (B&R)

B&R

B&RB&R

B&R

B&R

Complete_Detailed_Routing() input: unrouted nets N: number of nets output: Routed nets. R0= for (i=1 to N) Ri=Do_Incremental_Routing(ni,Ri-1)

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B&R Concepts Some definitions and representation (cont.)

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0 1 2 3 0 1 2 30 1 2 3

210

210

210

3

3

n4

n2

n5

n3

n6

The overlap graph (OG) Nodes: existing nets Edges: a channel is shared by two nets

Tj Tk, bumps to some nets

T0 T0

T3 T2

T1

T1

T1

T1

T2

T3

T0T0

T0

T2 T3

T3

n2T1

n3T0

n4T2

n5T3

n6T0

SPT2

100 1 0 10 1

11

10

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B&R Concepts

AT0

A

B

BT1

CT0

DT1

C

D

E

EX

New_Net

O_NetO_Net

(i) TC1sum (ni TjTk ) = l(nj) nj adjTk (ni)total-length-of

bumped nets

l(nj) nj adjTk (ni)(ii) TC1

sqrt (ni TjTk ) = ----------------------------- sqrt(| adjTk (ni)|

l(nj) is the total length of nj in terms of the track segments

adjT1(E)={B} adjT0(E)={C}

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TC1=Total-length-of-bumped-nets

n1 n2

n4

012

n5

n3

B&R Concepts

n1

n2 n3

T1 T2

n4 n5

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1st Level TC Functions

120 1 0 10 1

11

10

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Example: B&R for Detailed Routing

AT0

A

BBT1

CT0

DT1

C

D

E

EX

New_Net

ET0

CX

O_Net O_Net

D_SpT0

C23

130 1 0 10 1

11

10

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Example: B&R for Detailed Routing(Cont.)

AT0

A

B BT1

DT1D

E

New_Net

ET0

CX

O_Net

D_Sp T0

CCT1

DXDT0

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Navigating the OG

45 6

8Sp

1012

Sp

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Sp Sp

New-net

1 2 3

T2

T1 T3

T3

T1

T2

T3

9

T2

T3

T1

B&R Concepts

• If there is a solution, this process will find it.• it optimizes the number of tracks

Time Complexity:•L= # of paths in OG •(m=# of nodes, b:branching factor)• In worst case L=O((b-1) m)• If OG is tree L is linear

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Optimality-Preserving Speedup Methods

• Regular incremental routing: B&R applied to 1-10% of the nets---speed is good

• Complete detailed routing: B&R applied to 100% of nets--speed drops significantly

• Developed three optimality-preserving speedup methods to increase the speed of B&R

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n1 n2

n3

012

n6

n4

n5

(i) TC1=Total-length-of-bumped-nets

(i) TC2sum-sum (ni TjTk ) = nj adjTk (ni) min Tt (TC1

sum (ni TkTt ))

T0

n4 n5

T1

n6

T2 T0

Sp

n1

n2 n3

T1 T2

Optimality-Preserving Speedup Methods (Cont.)(1) Lookahead TC Functions

7 3

3 0 3 5

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(2) Clique-Based Search Space Pruning

AT1

CT0

BT2

DT3

YT3

AT1

CT0

BT2

DT3

BY

T0T1T2

AC

DT3

XB

Y

T0T1T2

AC

D T3

X

• Dynamically determines the presence of cliques in the OG among the longer nets

• CLIQUE: is a completely connected subgraph of OG• Min. # of distinct tracks for succ. Routing (m=4)• For each clique, maintain the number of common unused

(CUT) track. (k)• After a net in clique is bumped, If (k+m) > t , there is no

solution to bump that net. • (1+4) > 4

Optimality-Preserving Speedup Methods (Cont.)

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(3) Learning-Based Search Space Pruning

A

C

D

K

B

P

1A

D

K

A D

CK B

T0

T1

T2

T3

Optimality-Preserving Speedup Methods (Cont.)

2A

C

D

X

Z

K

B

Q

A

D

K

DA

CK X

ZB

T0

T1

T2

T3

• Theorem: if no soln. for bumping net B, and obstacle pattern OP1 is obtained

– If in another search path, B is bumped again and OP1 AP2

– Then no solution exists

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• Isomorphic Function:– f: is a one-to-one and onto functions between tracks that maps T i Tk where Tk=Tf(i)

Pattern Isomorphism: Let P1 and P2 be obstacle patterns, If all nets on each track of P1 appears on a unique, possibly different, track of P2, then P1 is isomorphic to P2.

CK B

T0

T1

T2

T3

T0

T1

T2

T3

CK X

ZB

A D

A D

Optimality-Preserving Speedup Methods (Cont.)(3) Learning-Based Search Space Pruning

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A

C

D

K

B

P

1 2A

C

D

X

Z

K

B

Q

A

D

K

A

D

K

A D

CK B

T0

T1

T2

T3

T0

T1

T2

T3

CK X

ZB

A D

Optimality-Preserving Speedup Methods (Cont.)(3) Learning-Based Search Space Pruning

• Theorem: if no soln. for bumping net B, and obstacle pattern OP1 is obtained

– If in another search path, B is bumped again • OP2 AP2 & OP1 isomorphic to OP2

– Then no solution exists

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Experimental Results(Characteristics of VPR Benchmark Circuits)

Circuit Name FPGA Size # net # pins

Opt.track

Circuit Name FPGA Size # net # pins

Opt.track

C499 10x10 147 443 7 vda 18x18 399 1511 10

mm9a 13x13 205 787 6 frg2 36x36 558 2177 6

alu2 15x15 236 1001 7 apex6 30x30 575 2199 6

s1 14x14 248 990 7 ex4p 22x22 586 2337 6

s1423 15x15 272 1133 6 mm30a 23x23 651 2634 6

t481 15x15 280 1087 8 misex3c 24x24 663 2773 9

sand 16x16 285 1236 7 ex5p 33x33 1072 5391 15

mm9b 15x15 292 1107 6 tseng 33x33 1248 5409 7

planet 17x17 307 1357 6 misex3 38x38 1658 7013 12

planet1 17x17 308 1357 7 alu4 40x40 1748 7632 12

x4 21x21 310 1136 6 diffeq 39x39 1786 7588 8

s1196 17x17 325 1354 7 des 63x63 1847 8456 8

i6 26x26 328 1115 4 apex2 44x44 2284 9431 13

duke2 16x16 328 1306 8 elliptic 61x61 4175 15565 11

s1488 18x18 340 1508 6 spla 61x61 4286 18512 14

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Experimental Results(Speedup Method Results)

• ROAD-1: Basic B&R with 1st TC Function

• ROAD0: 1st TC Function 2nd TC Function

• ROAD: LBS + Clique-Based pruning mtd. Added to ROAD0

ROAD (bumped & Refit based OptimAl Detailed router)

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Experimental Results (Internal Comparisons)

ROAD-1 ROAD-0 ROADCircuit Name

Time in secs

mm9a 3299.22 130.03 1.27alu2 4015.23 1.44 1.41s1 3163.87 1.40 1.14s1423 537.34 4.65 2.56sand 131.76 4.90 2.08planet 2010.56 2.29 2.05planet1 1.06 2.24 2.37x4 18.06 3.41 2.72i6 4.60 4.56 3.93s1488 12.21 2.97 2.31total(10 Ckt) 13193.91 157.89 21.84

83.56 604.12Speed up over ROAD-12253.63 36.83

61.19Speed up over ROAD-0total ( 16) ckt

planet1 1.06 2.24 2.37x4 18.06 3.41 2.72i6 4.60 4.56 3.93s1488 12.21 2.97 2.31C499 51.52 0.54t481 37.80 1.80mm9b 10.05 2.45s1196 87.70 3.10duke2 238.20 2.11vda 1670.47 4.99

Extrapolated Speed up of ROAD over ROAD-1

83 x 61 = 5763

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Experimental Results (Extracting VPR Global Routing Topology)

VPR Placement

VPR Router

Flat-routing

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ROAD SEGA

Comparisons ofROAD, VPR and SEGA

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Experimental Results (Comparing with VPR-SEGA combine)

Comparisions of SEGA, ROAD track numbers

0%

20%

40%

60%

80%

100%

120%

mm

9a s1t4

81

mm

9b

planet1

s119

6

duke2

vda

apex

6

mm

30a

ex5p

mise

x

diffeq

apex

2Tot

al

Imp

rove

men

t ov

er S

EG

A

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Experimental Results (Comparing with VPR-SEGA combine)

Comparisions of VPR, ROAD, SEGA runtimes (SEGA runtime taken as baseline)

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5

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25

alu2

t481

planet

s119

6s1

488

apex

6

mise

x3c

mise

x des

Total

Sp

eed

up

fac

tor

over

SE

GA

VPR

ROAD

Approx. VPR detailed-runtime=(VPR flat-runtime) - (VPR global-runtime)

ROAD=(7x)

VPR=(4x)

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Empirical Avg. Case Time Complexity of ROAD

y = 0.1409x - 56.939

y = 3E-05x2 + 0.0347x - 11.105

y = 2E-11x4 - 1E-07x3 + 0.0003x2 - 0.1827x + 32.085

-100.00

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0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000

number of nets

Tim

e

ROAD Linear (ROAD) Poly. (ROAD) Poly. (ROAD)

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CONCLUSION

• ROAD: uses the bump-and-refit (B&R)– Overcomes net-ordering problem– Optimality-preserving search space pruning methods that

give us orders of magnitude speedup

• Large circuits: VPR’s flat routing time consuming• Hence need two-stage routing (global followed by

detailed routing) possibly interleaved across the nets

• ROAD prime candidate for detailed routing phase in this two-stage framework

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THANK YOU