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SDH test SONET test SDH testing SDH installation SDH maintenance SDH guide SDH reference SDH solutions

SDH pocket guide for testing, Sonet pocket guide for testing, SDH information, SDH tutorial SDH tutorialSDH layers, SDH alarms, UMTS installation, UMTS maintenance

SONET testing, SONET installation, SONET maintenance, SDH SONET pocket guide, SONET solutions

& test, UMTS testing, UMTS installation, UMTS maintenance

STM-1

STM-64

STM-16

STM-4

STM-256OC-768

OC-192

OC-48

OC-12

OC-3/STS-3

STM-0OC-1/STS-1

TUG-3

DS1

E1

DS2

DS3 E3

E4

x3

x4

x7

x7

TUG-2

x3

x3

MappingMultiplexingAligning Pointer processing

SDH ContainerGroup

VC-4

VC-3

VC4-4c

VC4-16c

AU-4

AU4-4c

AU4-16c

STS-3c SPE

STS-1 SPE

VT-Group

VC4-64c

VC4-256c

AU4-64c

AU4-256c

ATM

ATM

ATM

ATM

ATM

ATM

AU-3

10GE

AUG-256

STS-12c SPE

STS-48c SPE

STS-192c SPE

STS-768c SPE

STS-3c

STS-1

STS-12c

STS-48c

STS-192c

STS-768c STS-768

AUG-64STS-192

AUG-16STS-48

AUG-4STS-12

AUG-1STS-3

x4

x4

x4

x4

40 Gbps

10 Gbps

2.5 Gbps

622 Mbps

155 Mbps

52 Mbps

Frame transmission

Figure 1 SDH and Sonet Multiplexing map.

VC-3

VC-2

VC-12

VC-11

VT-6 SPE

VT-2 SPE

VT-1.5 SPE

POH addition

x1

x1

x1

x1

x1

x1

x1

x1

x1

x1

x1

x1

C-3

C-2

C-12

C-11

C-4-256c

C-4-64c

C-4-16c

C-4-4c

C-4

TU-3

TU-2

TU-12

TU-11

VT-6

VT-2

VT-1.5

x1

STS-1 SPE

904

SOH

LOH

SPE ptr

1 3STS-1

STS POH

90B1 E1

*A1 *A2 *

F1

D1 D2 D3

B2 K1 K2

D4 D5 D6

D7 D8 D9

S1 E2

D10 D11 D12

J0

M19

1

Section Overhead)

Line Overhead

9

1

H1 H2 H3 pointer

Tran

spor

t Ove

rhea

d

VT POHVirtual Tributary Path Overhead

RSOH

MSOH

AU4 ptr

1

VC4

27010

STM-1

HP POH

TU pointers

VT pointers

VT SPE VT SPE

VCn VCn

LP POHLower Order Path Overhead

500 µs375 µs

250 µs125 µs

500 µs375 µs

250 µs125 µs

x3

MUX

STM-1

3:1

STS-1STS-1STS-1

Figure 2 STS-1 and STM-1 frames.

4

G1F2H4

J1B3C2

Z3Z4N1

G1F2H4

J1B3C2

F3K3N1

ptr

V5

V5

ptr

ptr

V5

V5

ptr

K4N2

J2V5

Z7Z6

J2V5

9

1

(payload)

270101 9

SDHSonetQuick Reference guide for testing

Tren

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SLA

SDH test SONET test SDH testing SDH installation SDH maintenance SDH guide SDH reference SDH solutionsSONET testing, SONET installation, SONET maintenance, SDH SONET pocket guide, SONET solutions

Section

VC-4 (VC-3)MSOH MSOH

RSOH

VC-11, VC-12, VC-2, VC-3

RSOH RSOH

Path

sSe

ctio

nsLaye

rsRSOH

SectionLine

STS Path

SectionLine/Mux

STS SPELOH LOH

SOH

VT Path

SectionLine

STS PathVT Path

VTn SPE

SOH SOH

Path

sSe

ctio

nsLaye

rs

SOH Section

SDH

Sonet

Terminal Multiplexer Multiplexer Terminal MultiplexerRegenerator Regenerator

Figure 3 SDH and Sonet layered client/server model.

SectionMux

HO PathLO Path

Section SectionMux

HO PathLO Path

SectionMux

Section

NNNN S S I D I D I D I D I D

N N N N S S I D I D I D I D I DPointer Value

H1 or V1 H2 or V2

SS: Unspecified I: Invert if increment

Concatenation

NDF

NNNN S S I D I D I D I D I D0 1 1 0 S S 0 1 0 1 1 0 1 1 0 1

0 1 1 0 S S 1 1 1 1 0 0 0 1 1 10 1 1 0 S S 0 1 0 1 1 0 1 1 1 0

0 1 1 0 S S 0 0 0 0 1 1 1 0 0 00 1 1 0 S S 0 1 0 1 1 0 1 1 0 0

0 1 1 0 S S 0 1 0 1 1 0 1 1 0 1

0 1 1 0 S S 0 1 0 1 1 0 1 1 0 1

ii+1i+2

jj+1j+2

Frame

Incr

emen

tD

ecre

men

t

Pointer MovementNNNNS S I D I D I D I D I D1 0 0 1 S S x x x x x x x x x x

New Pointer

NDF enabled: NNNN=1001

N: New Data Flag

NDF disabled: NNNN=0110(0001, 1101, 1011, 1000 also accepted)

(1110, 1010, 0100, 0111 also accepted)

New pointer value

H3 or V3

Negativejustification

payload

Positivejustification

D: Invert if decrement

1 0 0 1 S S 1 1 1 1 1 1 1 1 1 1

C-3

H1H2H3

AU-4 ptr / STS ptr

G1F2H4

J1B3C2

F3K3N1

YH1 Y 1H2 1 H3H3 H3

AU-4 / STS3c

TU-3

Y: 1001SS111: all 1s byte

V1

V2

V3

V4

TU-n / VT-m SPE

x00

x01

x10

x11

payload

H1H1 H1 H2H2 H2 H3H3 H3

AU-3 / STS-1AU-3 ptr / STS ptr

C-3

H1H2H3

payload

TU3 ptr

V1

V2

V3

TU-n ptr

VC-n

VT ptr

payload

Figure 4 Pointer formats, codification and procedures.

G1F2H4

J1B3C2

F3K3N1

G1F2H4

J1B3C2

F3K3N1

STS ptr

SLA


Figure 5 STM-N/OC-M frames.

* Non-scrambled bytesX bytes reserved for national use^ Media-dependent bytes

B1 ^ ^ E1 ^

*A1 *A1 *A1 *A2 *A2 *A2 * *

F1

D1 ^ ^ D2 ^ D3

Pointer (s)

B2 B2 B2 K1 K2

D4 D5 D6

D7 D8 D9

S1 E2

D10 D11 D12

M1

STM-1/STS-3/OC-3

XX

XX

X

J0 *

X

B1 E1

*A1 *A2 *F1

D1 D2 D3

B2 K1 K2

D4 D5 D6

D7 D8 D9

S1 E2

D10 D11 D12

STS-1/STM-0J0

M1

B1

*A1 *A1 *

D1

B2 B2 B2

D4

D7

S1

D10

A1 *A1

B2

^

*A1

^

B2

^

*A1

^

B2

E1

*A2

D2

K1

D5

D8

D11

*A2 *A2

M1

*A2^

*A2

^

^

*A2

^

*A2 *A2F1

*J0

D3

K2

D6

D9

E2

D12

X

*Z0

X

X

*Z0

X

X

*Z0

X

X

*X

X

X

*X

X

^

*A1

^

B2

^

*A2

^

*A2X

*X

X

Pointer (s)

1 13 25 36 STM-4/OC-4

B1 +*A1 *A1 *

+

D1 + +

B2 B2 B2

D4

D7

S1 +D10

A1

+

^

*A1

^

B2

^

*A1

^

B2

+

E1

*A2

D2

K1

D5

D8

D11

+*A2

++*A2

+

M1

+*A2

+^

*A2

^

^

*A2

^

+

*A2+*A2

+

+

F1

*J0

D3

K2

D6

D9

E2

D12

X

*Z0

+

+++

X

+

X

*Z0

+

+++

X

+

X

*X

X

X

*X

+

+++

X

+

X

*X

+

+++

X

+

^

*A1

^

B2

+

^

*A2

^

+

+*A2

+

+

X

*X

$

+++

X

+

Pointer (s)

1 49 97 144 STM-16/OC-48

D1-D3: 192 kbps OA&M dataD4-D12: 576 kbps OA&M dataE1, E2: 64 kbps orderwire channels

M0, M1: Re-sending of B2 errors

F1: 64 kbps user channelH1, H2, H3: pointer bytes

Z0: reserved

K1, K2: Request /answer APS channelsF1: 64 kbps user channel

A1= 11110110 Frame Alignment

B1: Section Parity Code BIP8B2: Multiplex Parity Code BIPn x 24

J0: Section Trace

17

^

*A1

^

B2

^

*A1

^

B2

+

^

*A1

^

B2

+

33 65 81 113

X

*X

X

129

X

*X

$

+++

X

+

B1 +*A1 *A1 *

+

D1 + +

B2 B2 B2

D4

D7

S1 +D10

A1

+

^

*A1

^

B2

^

*A1

^

B2

+

E1

*A2

D2

K1

D5

D8

D11

+*A2

+

M0

+*A2

+

M1

+*A2

+^

*A2

^

^

*A2

^

+

*A2+*A2

+

+

F1

*J0

D3

K2

D6

D9

E2

D12

X

*Z0

+

+++

X

+

X

*Z0

+

+++

X

+

X

*X

X

X

*X

+

+++

X

+

X

*X

+

+++

X

+

^

*A1

^

B2

+

^

*A2

^

+

+*A2

+

+

X

*X

$

+++

X

+

Pointer (s)

1 193 385 576 STM-64/OC-192

^

*A1

^

B2

^

*A1

^

B2

+

^

*A1

^

B2

+

X

*X

X

X

*X

$

+++

X

+

+ + P1FEC sequence:

$ $ Q1 P1 P1 P1151

FEC sequence:

P1 P1 P1 P1 P1 P1P1 P1

Q1 P1 P1 P1161

P1 P1 P16320

STM-16/OC-48 STM-64/OC-192

1 9

99

11

9

1

9

1

9

1

+, $: FEC sequencesQ1, P1: Optional Forward

Error Correction

H1 H2 H3

A2= 00101000: Frame Alignment

SLA


V3 V3

V5

34 bytes

J2

34 bytes

N2

34 bytes

K4

34 bytes

Data32 bytes

Figure 6 Synchronous and asynchronous transport of a 2-Mbps circuit (I).

Synchronous

125 µs

500 µs

R: Fixed stuff bitO: Overhead bitsCi: Justification control bitsSi: Justification

D: Data bit

STM-1 VC-4AU-4 VC-12TUG-2 TU-12AUG

+LO-POH+AU pointer +HO-POH

E2

+ Stuffing+ Justification+ Overhead

+RSOH+MSOH

x3

12346789

TUG-3

5

x7x3

S2 DDDDDDDC1C2RRRRRS1

TS0Channels

1 to 15TS16

Channels16 to 30

CAS RRRRRRRR

RRRRRRRR

32 bytes

RRRRRRRR

RRRRRRRR

Data32 bytes

C1C2OOOORR

RRRRRRRR

Data32 bytes

C1C2OOOORR

RRRRRRRR

Data32 bytes

RRRRRRRR

Data31 bytes

Asynchronous

TS0

Time Slot1 to 31

CCS 1

byte 34

VC-12

22

11 C-12C-12

V1

35 bytes

V2

35 bytes

V3

35 bytes

V4

35 bytes

500 µs

3

TU-12

H4=00

H4=01

H4=10

H4=11

V311 4

9

125 µs

9

12

4

TUG-2

1

140

V3 V3V31

LO-POH = V5 J2 N2 K4TU-12 pointer = V1 V2 V3 V4

125 µs

if CiCiCi=111, then Si is a justification bitif CiCiCi=000, then Si is a data bit

C-12

125 µs

#1 #2 #3

SLA


RSOH

MSOH

AU4 ptr

R

NPI

Figure 7 Synchronous and asynchronous transport of a 2-Mbps circuit (II).

9

1 TUG-2 12

9

86TUG-3

1

9

1 TUG-2 12

9

1 TUG-2 12

#1 #2 #7

9

1 TUG-2 12

#3

R1 2 3 4 5 6 7 1 2.......

5TUG-3

x 7

TUG-3

R

NPI

R

10

9

11 9

VC-4 270+HO-POH

10

G1F2H4

J1B3C2

F3K3N1

R

13

6

Byte-interleaving3 TUG-3

7

8

STM-1 9

#1 #2

11 12

R

NPI

R

#3

VC-4

H4=xx11

STM-1RSOH

MSOHVC-4

H4=xx10

STM-1RSOH

MSOHVC-4

H4=xx01

STM-1RSOH

MSOHVC-4

H4=xx00

STM-1RSOH

MSOH

125 µs

500 µs

V1

V2

V3

V4

H4=xx00

H4=xx01

H4=xx10

H4=xx11

VC-12

125 µsTUG-2 TUG-2 TUG-2

#1 #2 #7

500 µs

TUG-3#1

TUG-3#1

TUG-3#1

x7

x3

x3 x7 x3

Figure 8 VC-12 is a multiframe and needs four STM-1 frames (500 µs) for full mapping.

x3 x7 x3 x3 x 7 x 3

x3

SLA


REI (Remote Error Indication) BIP-8 violation count

RDIG1:

RDI (Remote Defect Indication) is sent back

00: unequipped01: reserved02: TUG03: locked TU04: E3, T3

14: DQDB15: FDDI

xx11xx00: pointer to V1xx11xx01: pointer to V2xx11xx10: pointer to V3xx11xx11: pointer to V4

Nine bytes Path Overhead (POH)

Path trace, message with CRC

BIP8 parity control

Signal label (mapping)

Path status

Path user channel (voice or data)

Position and sequence indicator

Path user channel (voice or data)

Automatic Protection Switch

Tandem Connection Monitoring

G1F2H4

J1B3C2

F3Z3Z4

16: HDLC/PPP

18: HDLS/LAPS1A: 10GEthernetFE: Test Signal

SpareE-RDI

IEC Incoming Error Count, BIP-8 errors in Tandem Conn.

IEC TCN1: REI OEI TC-API, TC-RDIODI, reserved

E-RDI (Enhanced RDI information)

TC-REI: Remote Error Indication in a TC subnetworkOEI: Outgoing Error IndicationMultiframe: TC-API (Access Point Identifier)

multiframe

17: SDL

(RDI=0) 10: Payload defect (PLM)(RDI=1) 01: Server defect (AIS, LOP), (RDI=1) 10: Connectivity defect (TIM, UNEQ)

LO Multiframe Sequence

BIP-2V5:

ESL (Extended Signal Label) 32 bits multiframe

REI RFI RDI

BIP-2 bit 1: odd bit parity of the previous VCbit 2: even bit parity

Signal Label

RDI (Remote Defect Indication)

VC signal label (mapping)000 - Unequipped001 - Reserved010 - Asynchronous floating011 - Bit synchronous 100 - Byte synchronous

Path Overhead

Reserved or TCM

APS: Automatic Protection Switching channel

Path Trace

V5

J2N2

K4

V5

J2

N2

K4

500µ

s

101 - Extended signal label110 - Test Signal O.181

Additional Path Overhead

REI (Receive Error IndicationRFI (Remote Failure Indication

bits 1-11 Multiframe Alignmentbits12-19:

0A: HDLC/PPP0B: HDLC/LAPS0C: Concatenated test signal

DL: Lower Order Data Link

BIP2 for Tandem Connection calculated over the VC

BIP-2 I-AISN2: OEI TC-API, TC-RDIODI, reserved

TC-REI: Remote Indication Error in a TC subnetworkOEI (Outgoing Error Indication)

multiframe

1 TCREI

I-AIS: Incoming AIS

111 - VC- AIS

K4: APS DLE-RDIESL VC

Four bytes Path Overhead (POH)

bits 20-32: 0 (reserved for future)VC (Lower Order Virtual Concatenation)

ODI (Outgoing Defect Indication)

VC-3/4-Xv sequencebit 5-8: MFI1 multiframe indicator (0 to 15)frame 0 bit 1-4 MFI2 MSB Multiframe Indicator 2frame 1 bit 1-4 MFI2 LSBframe 14 bit 1-4 SQ MSB sequence indicatorframe 15 bit 1-4 SQ LSB sequence indicator

12: E413: ATM

H4:C2:

APS: Automatic Protection

K3:

HODL: Higher Order Data Link

x x 1 1

H4: Multiframe Indicator 1MFI2 (frames 0 and 1)SQ (frames 14 and 15)

09: ATM

E-RDI (Enhanced RDI information)(RDI=0) 010: Payload defect (PLM)(RDI=1) 101: Server defect (AIS, LOP), (RDI=1) 110: Connectivity defect (TIM, UNEQ)

TC-RDI (RDI in Tandem Connection)

Multiframe: TC-API (Access Point Identifier)

ODI (Outgoing Defect Indication)TC-RDI (RDI in Tandem Connection)

G1F2H4

J1B3C2

F3K3N1

SDH Sonet

V5

J2Z6

Z7

SDH Sonet

APS SpareHODL

Figure 9 Nine bytes Path Overhead is attached to VC3, VC4 and VC4-Xc. Four bytes Path Overhead is attached to VC11, VC12 and VC2.

REI

LO Seqx x

SLA


Reg. Sect. Multiplexer Section Higher Order Path Lower Order Path

LOF

LOSA1/A2RS-TIM / TIM-SJ0RS-BIP / CV- SB1

MS-BIP / CV- LB2

M12-8MS-REI / REI- L

MS-AIS / AIS-PK26-8

MS-REI / REI- LM1

AU-AIS / AIS- PAU ptr

MS-RDI / RDI-LK26-8

AU-LOP / LOP-PAU ptr

HP-UNEQ / UNEQ- PC2HP-PLM / PLM-PC2

HP-BIP / CV- PB3

G11-4HP-REI / REI-P

HP-RDI / RDI-PG15-7

HP-REI / REI-PG11-4

TU-LOM / LOMH47-8TU-AIS / AIS-VTU ptr

TU ptr TU-LOP / LOP-V

J2 LP-TIM / TIM-V

V55-7LP-PLM / PLM-V

LP-BIP/ CV-VV51-2

V53LP-REI / REI-V

LP-REI / REI-VV53

V58LP-RDI / RDI-V

Transmission Line

HP-TIM / TIM-PJ1

V55-7LP-UNEQ / UNEQ-V

Event detection

Signal flow

Error indication received

Error indication sent

Alarm indication sent

OR (logical function)

Event registration

Sonet

Section Line STS Path VT PathTransmission

AIS

AIS

AIS

AIS

AIS

AIS

Signal

LP-RFI / RFI-VV54

Figure 10 Events management. In Regular characters SDH, in Italic Sonet.

SDH

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More information in:Installation and Maintenance of SDH/SONET,

2003 (c) Artech House, ISBN:1580535259 ATM, XDSL, and Synchronization Networks.

AcronymsAIS Alarm Indication Signal NDF New Data FlagAPI Access Path Identifier OA&M Operation Administration and MaintenanceAPS Automatic Protection Switching OC-n Optical Carrier level nATM Asynchronous Transfer Mode ODI Outgoing Defect IndicationAU Administrative Unit OEI Outgoing Error IndicationAUG Administrative Unit Group PLM Payload MismatchBIP Bit Interleaved Parity POH Path OverheadCV Code Violation PPP Point to Point ProtocolDQDB Distributed Queue Dual Bus RDI Remote defect IndicationESL Extended Signal Label REI Remote Error IndicationFDDI Fibre Digital Data Interface RFI Remote Failure IndicationFEC Forward Error Correction RS Regenerator SectionHDLC High-level Data Link Control RSOH Regenerator Section OverheadHODL Higher Order Data Link SDH Synchronous Digital HierarchyHP Higher Order Path SOH Section OverheadLAPS Link Access Procedure – SDH SONET Synchronous Optical Network LO Path Lower Order Path SPE Synchronous Payload EnvelopeLOF Loss of Framing STM-n Synchronous Transport Module level nLOH Lower Order Overhead STS-n Synchronous Transport Signal level nLOM Loss Of Muliframing TC Tandem ConnectionLOP Loss Of Pointer TIM Trace Identifier MismatchLOS Loss Off Signal TS Time SlotLP Lower Order Path TU Tributary UnitMS Multiplexor Section TUG Tributary Unit GroupMSOH Multiplexor Section Overhead VC Virtual ContainerMUX Multiplexor VT Virtual Tributary

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