SMPS App Note Microchip

AN1114Switch Mode Power Supply (SMPS) Topologies (Part I)

INTRODUCTION The industry drive toward smaller, lighter and moreefficient electronics has led to the development of theSwitch Mode Power Supply (SMPS). There are severaltopologies commonly used to implement SMPS.

This application note, which is the first of a two-partseries, explains the basics of different SMPStopologies. Applications of different topologies andtheir pros and cons are also discussed in detail. Thisapplication note will guide the user to select anappropriate topology for a given application, whileproviding useful information regarding selection ofelectrical and electronic components for a given SMPSdesign.

WHY SMPS?The main idea behind a switch mode power supply caneasily be understood from the conceptual explanationof a DC-to-DC converter, as shown in Figure 1. Theload, RL, needs to be supplied with a constant voltage,VOUT, which is derived from a primary voltage source,VIN. As shown in Figure 1, the output voltage VOUT canbe regulated by varying the series resistor (RS) or theshunt current (IS).

When VOUT is controlled by varying IS and keeping RSconstant, power loss inside the converter occurs. Thistype of converter is known as shunt-controlledregulator. The power loss inside the converter is givenby Equation 1. Please note that the power loss cannotbe eliminated even if IS becomes zero.

FIGURE 1: DC-DC CONVERTER

EQUATION 1: SHUNT-CONTROLLED REGULATOR POWER LOSS

However, if we control the output voltage VOUT byvarying RS and keeping IS zero, the ideal power lossinside the converter can be calculated as shown inEquation 2.

EQUATION 2: SERIES-CONTROLLED REGULATOR POWER LOSS

This type of converter is known as a series-controlledregulator. The ideal power loss in this converterdepends on the value of the series resistance, RS,which is required to control the output voltage, VOUT,and the load current, IOUT. If the value of RS is eitherzero or infinite, the ideal power loss inside theconverter should be zero. This feature of aseries-controlled regulator becomes the seed idea ofSMPS, where the conversion loss can be minimized,which results in maximized efficiency.

In SMPS, the series element, RS, is replaced by asemiconductor switch, which offers very low resistanceat the ON state (minimizing conduction loss), and veryhigh resistance at the OFF state (blocking theconduction). A low-pass filter using non-dissipativepassive components such as inductors and capacitorsis placed after the semiconductor switch, to provideconstant DC output voltage.

The semiconductor switches used to implement switchmode power supplies are continuously switched on andoff at high frequencies (50 kHz to several MHz), totransfer electrical energy from the input to the outputthrough the passive components. The output voltage iscontrolled by varying the duty cycle, frequency orphase of the semiconductor devices’ transition periods.As the size of the passive components is inverselyproportional to the switching frequency, a highswitching frequency results in smaller sizes formagnetics and capacitors.

While the high frequency switching offers the designera huge advantage for increasing the power density, itadds power losses inside the converter and introducesadditional electrical noise.

Author: Mohammad KamilMicrochip Technology Inc.

RS IOUT

RLIS VOUTVIN

PLOSS VOUT IS IOUT IS+( )2 RS⋅+⋅=

PLOSS VIN2 RS

RS RL+( )2--------------------------⋅=

© 2007 Microchip Technology Inc. DS01114A -page 1

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SELECTION OF SMPS TOPOLOGIESThere are several topologies commonly used toimplement SMPS. Any topology can be made to workfor any specification; however, each topology has itsown unique features, which make it best suited for acertain application. To select the best topology for agiven specification, it is essential to know the basicoperation, advantages, drawbacks, complexity and thearea of usage of a particular topology. The followingfactors help while selecting an appropriate topology:

a) Is the output voltage higher or lower than thewhole range of the input voltage?

b) How many outputs are required?c) Is input to output dielectric isolation required?d) Is the input/output voltage very high?e) Is the input/output current very high?f) What is the maximum voltage applied across the

transformer primary and what is the maximumduty cycle?

Factor (a) determines whether the power supplytopology should be buck, boost or buck-boost type.Factors (b) and (c) determine whether or not the powersupply topology should have a transformer. Reliabilityof the power supply depends on the selection of aproper topology on the basis of factors (d), (e) and (f).

Buck ConverterA buck converter, as its name implies, can onlyproduce lower average output voltage than the inputvoltage. The basic schematic with the switchingwaveforms of a buck converter is shown in Figure 2.

In a buck converter, a switch (Q1) is placed in serieswith the input voltage source VIN. The input source VINfeeds the output through the switch and a low-passfilter, implemented with an inductor and a capacitor.

In a steady state of operation, when the switch is ON fora period of TON, the input provides energy to the outputas well as to the inductor (L). During the TON period, theinductor current flows through the switch and thedifference of voltages between VIN and VOUT is appliedto the inductor in the forward direction, as shown inFigure 2 (C). Therefore, the inductor current IL riseslinearly from its present value IL1 to IL2, as shown inFigure 2 (E).

During the TOFF period, when the switch is OFF, theinductor current continues to flow in the samedirection, as the stored energy within the inductorcontinues to supply the load current. The diode D1completes the inductor current path during the Q1 OFFperiod (TOFF); thus, it is called a freewheeling diode.During this TOFF period, the output voltage VOUT isapplied across the inductor in the reverse direction, asshown in Figure 2 (C). Therefore, the inductor currentdecreases from its present value IL2 to IL1, as shown inFigure 2 (E).

DS01114A -page 2 © 2007 Microchip Technology Inc.

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FIGURE 2: BUCK CONVERTER
CONTINUOUS CONDUCTION MODEThe inductor current is continuous and never reacheszero during one switching period (TS); therefore, thismode of operation is known as Continuous Conductionmode. In Continuous Conduction mode, the relationbetween the output and input voltage is given byEquation 3, where D is known as the duty cycle, whichis given by Equation 4.

EQUATION 3: BUCK CONVERTER VOUT/VIN RELATIONSHIP

EQUATION 4: DUTY CYCLE

If the output to input voltage ratio is less than 0.1, it isalways advisable to go for a two-stage buck converter,which means to step down the voltage in two buckoperations. Although the buck converter can be eithercontinuous or discontinuous, its input current is alwaysdiscontinuous, as shown in Figure 2 (D). This results ina larger electromagnetic interference (EMI) filter thanthe other topologies.

Q1GATE

VL VIN - VOUT

-VOUT

-VOUT/L

IIN

IL

(VIN - VOUT)/L

t

t

t

t

(B)

(C)

(D)

(E)

(A) = Buck converter(B) = Gate pulse of MOSFET Q1 (C) = Voltage across the Inductor L (D) = Input current IIN (E) = Inductor current IL

IL1

IL2

VOUT

Q1

D1

IIN

(A)L

+ -IL

IOUTVIN

VOUT D VIN⋅=

where:

TON = ON Period

TS = Switching Period

DTONTS

----------=


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CURRENT MODE CONTROLWhile designing a buck converter, there is always atrade-off between the inductor and the capacitor sizeselection.
A larger inductor value means numerous turns to themagnetic core, but less ripple current (<10% of full loadcurrent) is seen by the output capacitor; therefore, theloss in the inductor increases. Also, less ripple currentmakes current mode control almost impossible toimplement (refer to “Method of Control” for details oncurrent mode control techniques). Therefore, poor loadtransient response can be observed in the converter.

A smaller inductor value increases ripple current. Thismakes implementation of current mode control easier,and as a result, the load transient response of theconverter improves. However, high ripple currentneeds a low Equivalent Series Resistor (ESR) outputcapacitor to meet the peak-to-peak output voltageripple requirement. Generally, to implement the currentmode control, the ripple current at the inductor shouldbe at least 30% of the full load current.

FEED-FORWARD CONTROLIn a buck converter, the effect of input voltage variationon the output voltage can be minimized byimplementing input voltage feed-forward control. It iseasy to implement feed-forward control when using adigital controller with input voltage sense, compared tousing an analog control method. In the feed-forwardcontrol method, the digital controller starts taking theappropriate adaptive action as soon as any change isdetected in the input voltage, before the change in inputcan actually affect the output parameters.

SYNCHRONOUS BUCK CONVERTERWhen the output current requirement is high, theexcessive power loss inside the freewheeling diode D1,limits the minimum output voltage that can beachieved. To reduce the loss at high current and toachieve lower output voltage, the freewheeling diode isreplaced by a MOSFET with a very low ON stateresistance RDSON. This MOSFET is turned on and offsynchronously with the buck MOSFET. Therefore, thistopology is known as a synchronous buck converter. Agate drive signal, which is the complement of the buckswitch gate drive signal, is required for thissynchronous MOSFET.

A MOSFET can conduct in either direction; whichmeans the synchronous MOSFET should be turned offimmediately if the current in the inductor reaches zerobecause of a light load. Otherwise, the direction of theinductor current will reverse (after reaching zero)because of the output LC resonance. In such ascenario, the synchronous MOSFET acts as a load tothe output capacitor, and dissipates energy in theRDSON (ON state resistance) of the MOSFET, resultingin an increase in power loss during discontinuous mode

of operation (inductor current reaches zero in oneswitching cycle). This may happen if the buck converterinductor is designed for a medium load, but needs tooperate at no load and/or a light load. In this case, theoutput voltage may fall below the regulation limit, if thesynchronous MOSFET is not switched off immediatelyafter the inductor reaches zero.

MULTIPHASE SYNCHRONOUS BUCK CONVERTERIt is almost impractical to design a single synchronousbuck converter to deliver more than 35 amps loadcurrent at a low output voltage. If the load currentrequirement is more than 35-40 amps, more than oneconverter is connected in parallel to deliver the load.

To optimize the input and output capacitors, all theparallel converters operate on the same time base andeach converter starts switching after a fixed time/phasefrom the previous one. This type of converter is calleda multiphase synchronous buck converter. Figure 3shows the multiphase synchronous buck converterwith a gate pulse timing relation of each leg and theinput current drawn by the converter. The fixedtime/phase is given by Time period/n or 300/n, where “n”is the number of the converter connected in parallel.

The design of input and output capacitors is based onthe switching frequency of each converter multiplied bythe number of parallel converters. The ripple currentseen by the output capacitor reduces by “n” times. Asshown in Figure 3 (E), the input current drawn by amultiphase synchronous buck converter is continuouswith less ripple current as compared to a singleconverter shown in Figure 2 (D). Therefore, a smallerinput capacitor meets the design requirement in case ofa multiphase synchronous buck converter.


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FIGURE 3: MULTIPHASE SYNCHRONOUS BUCK CONVERTER
CIN

+

-

Q1

IQ1

Q2

Q3

IQ3

Q4

Q5

Q6

IL3L3

L2

L1

Q1PWM

IIN

IQ5 + IQ1

IQ1 IQ3 IQ5

Q3PWM

Q5PWM

IQ1 + IQ3 IQ3 + IQ5 IQ5 + IQ1

t

t

t

t

(A) = Multiphase Synchronous Buck converter(B) = Gate pulse of Q1, inductor current IL1

(C) = Gate pulse of Q3, Inductor current IL2 (D) = Gate pulse of Q5, Inductor current IL3

(E) = Input current IIN

IQ5

IL2

IL1

IL1

IL2

IL3

(A)

(B)

(C)

(D)

(E)

VIN

VOUT

CO


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Boost ConverterA boost converter, as its name implies, can onlyproduce a higher output average voltage than the inputvoltage. The basic schematic with the switchingwaveform of a boost converter is shown in Figure 4.
In a boost converter, an inductor (L) is placed in serieswith the input voltage source VIN. The input sourcefeeds the output through the inductor and the diode D1.In the steady state of operation, when the switch Q1 isON for a period of TON, the input provides energy to theinductor.

During the TON period, inductor current (IL) flowsthrough the switch and the input voltage VIN is appliedto the inductor in the forward direction, as shown inFigure 4 (C). Therefore, the inductor current riseslinearly from its present value IL1 to IL2, as shown inFigure 4 (D). During this TON period, the output loadcurrent IOUT is supplied from the output capacitor CO.The output capacitor value should be large enough tosupply the load current for the time period TON with theminimum specified droop in the output voltage.

During the TOFF period when the switch is OFF, theinductor current continues to flow in the same directionas the stored energy with the inductor, and the inputsource VIN supplies energy to the load. The diode D1completes the inductor current path through the outputcapacitor during the Q1 OFF period (TOFF). During thisTOFF period, the inductor current flows through thediode and the difference of voltages between VIN andVOUT is applied to the inductor in the reverse direction,as shown in Figure 4 (C). Therefore, the inductorcurrent decreases from the present value IL2 to IL1, asshown in Figure 4 (D).

CONTINUOUS CONDUCTION MODEAs shown in Figure 4 (D), the inductor current iscontinuous and never reaches zero during one switchingcycle (TS); therefore, this method is known asContinuous Conduction mode, which is the relationbetween output and input voltage, as shown inEquation 5.

FIGURE 4: BOOST CONVERTER

VOUT

+

-

+

-

Q1VIN

+ -

IL

VL

D1

ID1

Q1PWM

VL

IQ1 ID1

VIN

VOUT - VIN

VOUT

IL2

VDS

t

t

t

t

IOUT

(A)

(B)

(C)

(D)

(E)

(A) = Boost converter(B) = Gate pulse of MOSFET Q1

(C) = Voltage across the inductor L(D) = Current through the MOSFET Q1 and diode D1

(E) = Voltage across the MOSFET Q1

IL1

CO


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EQUATION 5: VOUT/VIN RELATIONSHIP
The root mean square (RMS) ripple current in theoutput capacitor is given by Equation 6. It is calculatedby considering the waveform shown in Figure 4 (D).During the TOFF period, the pulsating current ID1, flowsinto the output capacitor and the constant load current(IOUT) flows out of the output capacitor.

EQUATION 6: CAPACITOR RIPPLE RMS CURRENT

Based on Equation 5, the VOUT/VIN ratio can be verylarge when the duty cycle approaches unity, which isideal. However, unlike the ideal characteristic,VOUT/VIN declines as the duty ratio approaches unity,as shown in Figure 5. Because of very poor utilizationof the switch, parasitic elements occur in thecomponents and losses associated with the inductorcapacitor and semiconductors.

FIGURE 5: VOUT/VIN AND DUTY CYCLE IN BOOST CONVERTER

POWER FACTOR CORRECTIONWhen the boost converter operates in ContinuousConduction mode, the current drawn from the inputvoltage source is always continuous and smooth, asshown in Figure 4 (D). This feature makes the boostconverter an ideal choice for the Power FactorCorrection (PFC) application. Power Factor (PF) isgiven by the product of the Total Current HarmonicsDistortion Factor (THD) and the Displacement Factor(DF). Therefore, in PFC, the input current drawn by theconverter should be continuous and smooth enough tomeet the THD of the input current so that it is close to

unity. In addition, input current should follow the inputsinusoidal voltage waveform to meet the displacementfactor so that it is close to unity.

Forward ConverterA forward converter is a transformer-isolated converterbased on the basic buck converter topology. The basicschematic and switching waveforms are shown inFigure 6. In a forward converter, a switch (Q1) is connected inseries with the transformer (T1) primary. The switchcreates a pulsating voltage at the transformer primarywinding. The transformer is used to step down theprimary voltage, and provide isolation between theinput voltage source VIN and the output voltage VOUT.In the steady state of operation, when the switch is ONfor a period of TON, the dot end of the winding becomespositive with respect to the non-dot end. Therefore, thediode D1 becomes forward-biased and the diodes D2and D3 become reverse-biased. As the input voltage VIN is applied across thetransformer primary, the magnetizing current IMincreases linearly from its initial zero value to a finalvalue with a slope of VIN/LM, where LM is themagnetizing inductance of the primary winding, asshown in Figure 6(D). The total current that flowsthrough the primary winding is this magnetizing currentplus the inductor current (IL) reflected on the primaryside. This total current flows through the MOSFETduring the TON period. The voltage across the diode D2is equal to the input voltage multiplied by thetransformer turns ratio (NS/NP). In the case of a forwardconverter, the voltage applied across the inductor L inthe forward direction during the TON period, is given byEquation 7, neglecting the transformer losses and thediode forward voltage drop.

EQUATION 7: FORWARD VOLTAGE ACROSS INDUCTOR

DISSIPATING ENERGYAt the end of the ON period, when the switch is turnedOFF, there is no current path to dissipate the storedenergy in the magnetic core. There are many ways todissipate this energy. One such method is shown inFigure 6. In this method, the flux stored inside themagnetic core induces a negative voltage at the dotend of the NR winding, which forward biases the diodeD3 and resets the magnetizing energy stored in thecore. Therefore, the NR winding is called the resetwinding. Resetting the magnetizing current during theOFF period is important to avoid saturation. During the TOFF period when the switch is OFF, theinductor current (IL) continues to flow in the samedirection, while the stored energy within the inductorcontinues to supply the load current IOUT.

VOUTVIN

1 D–( )------------------=

IRIPPLERMS ID1( )2 IOUT( )2–=where:ID1RMS = RMS value of ID1

IRIPPLERMS = Ripple RMS current of capacitorIOUT = Output DC current

1

23

4567

Ideal

0.25 0.5 0.75 1

Practical

Duty Cycle = D

VOUT/VIN

VL VINNSNP------- VOUT–⋅ L

ILΔ

tΔ--------⋅= =


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FIGURE 6: FORWARD CONVERTER
VIN

NP NS

Q1

D1

D2

+

-

+

-

GS

D

+ -

ISW

NR

I3

T1

D3

+

-

VP

IL

VL

Q1PWM

VP

IMIP

IM

VIN VIN

TON TMTOFF

TS

IL IOUT

IIN

VDS

IL

IM

IPIM

I3I3

VIN

ΔIL

(A)

(B)

(C)

(D)

(E)

(F)

(A) = Forward Converter power circuit diagram.(B) = Gate pulse of MOSFET Q1

(C) = Voltage across the transformer primary winding NP

(D) = Current through NP and NR

(E) = Voltage across the MOSFET Q1

(F) = Output Inductor current IL

t

t

t

t

t

VOUT

(1+NP/NR) • VIN

(1+NP/NR) • VIN (1+NP/NR) • VIN


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The diode D2, called a freewheeling diode, completesthe inductor current path during the Q1 off period(TOFF). During this TOFF period, the output voltage VOUTis applied across the inductor in the reverse direction.In a continuous conduction mode of operation, the rela-tion between the output voltage and input voltage isgiven by Equation 8, where D is the duty cycle.
EQUATION 8: FORWARD CONVERTER VOUT/VIN RELATIONSHIP

CONTROLLING MAGNETIZATIONWhen the switch is turned OFF, the diode D1 becomesreverse-biased, and IM cannot flow in the secondaryside. Therefore, the magnetizing current is taken awayby the reset winding of the transformer, as shown inFigure 6(A and D).

The reflected magnetizing current I3 flows through thereset winding NR and the diode D3 into the input supply.During the interval TM when I3 is flowing, the voltageacross the transformer primary as well as LM is givenby Equation 9.

EQUATION 9: REFLECTED VOLTAGE AT PRIMARY

Time taken by the transformer to complete thedemagnetization can be obtained by recognizing thatthe time integral of voltage across the LM must be zeroover one time period. The maximum value of TM, asshown in Figure 6, is the time it takes the transformerto completely demagnetize before the next cyclebegins and is equal to TOFF. Therefore, the maximumduty cycle and the maximum drain-to-source blockingvoltage (VDS) seen by the switch (Q1) in a forwardconverter having number of primary and number ofreset winding turns as NP and NR, is given byEquation 10.

EQUATION 10: MAXIMUM DUTY CYCLE AND VDS

The maximum value of TM/TS to completelydemagnetize before the next cycle begins is equal to(1-D), so the maximum duty ratio for the forwardconverter is given by Equation 10.

From Equation 10, it is understood that when thenumber of primary winding turns, NP, is equal to thenumber of the reset winding turns, NR, the switch canhave a maximum 50% duty cycle and the blockingvoltage of the switch will be equal to twice the inputvoltage. The practical limit of maximum duty cycleshould be 45%, and maximum blocking voltage seenby the switch will be more than twice the input voltagedue to the nonlinearity of components and the leakageinductance of the transformer.

EQUATION 11: MAGNETIZING STORED ENERGY IN FLYBACK TRANSFORMER

If NR is chosen to be less than NP, the maximum dutycycle DMAX can be more than 50%; however, themaximum blocking voltage stress of the switchbecomes more than 2 • VIN the value of DMAX and VDS,as shown in Equation 10. If NR is chosen to be largerthan NP, DMAX will be less than 50%, but the maximumblocking voltage stress of the switch is now less than2 • VIN, the value of DMAX and VDS, as shown inEquation 10.

Since large voltage isolation is not required betweenthe reset and the primary windings, these two windingscan be wound bifilar to minimize leakage inductance.The reset winding carries only the magnetizing current,which means it requires a smaller size of wire ascompared to the primary winding.

VINNSNP------- VOUT–⋅⎝ ⎠

⎛ ⎞ TON VOUT TOFF⋅=⋅

VOUT VINNSNP-------⎝ ⎠⎛ ⎞ D⋅ ⋅=

NPNR-------⎝ ⎠⎛ ⎞ VIN⋅

1 DMAX–( )NRNP-------⎝ ⎠⎛ ⎞ DMAX⋅=

DMAX1

1NRNP-------⎝ ⎠⎛ ⎞+⎝ ⎠

⎛ ⎞---------------------------=

VDS VIN VINNPNR-------⎝ ⎠⎛ ⎞⋅+=

EP = Joules

IPK = Amps

LM = Henries

where:

EP12--- IPK( )2 LM⋅ ⋅=

IPKVIN TON⋅( )

LM----------------------------=


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To demagnetize the transformer core, a Zener diode orRC snubber circuit can also be used across thetransformer instead of the transformer reset winding.
The incomplete utilization of the magnetics, themaximum duty cycle limit and the high voltage stress ofthe switch, make a forward converter feasible for theoutput power (up to 150 watts) of an off-line low-costpower supply. Its non-pulsating output inductor currentmakes the forward converter well suited for theapplication involving a very high load current (>15A).The presence of the output inductor limits the use of aforward converter in a high output voltage (>30V)application, which requires a bulky inductor to opposethe high output voltage.

INCREASING EFFICIENCYThe efficiency of a forward converter is low comparedto other topologies with the same output power, due tothe presence of four major loss elements: the switch,transformer, output diode rectifiers and output inductor.

To increase efficiency, a synchronous MOSFET can beused in place of the output diode rectifier. TheMOSFET can be self-driven through the extra or thesame windings in the transformer secondary, as shownin Figure 7.

FIGURE 7: SYNCHRONOUS RECTIFIER

Improving the load transient response andimplementing current mode control requires reducingthe output inductor value and the use of a better outputcapacitor to meet the output voltage ripple requirement,as discussed in the “Buck Converter” section. Amultiple output, forward converter coupled inductor isused to get better cross-load regulation requirements.

Two-Switch Forward ConverterThe maximum voltage stress of the switch in a forwardconverter can be limited to a value equal to the inputvoltage, by placing one more switch (Q2) in series withthe transformer primary winding, as shown in Figure 8.The resulting converter is called a two-switch forwardconverter. The basic schematic and switchingwaveforms of the two-switch forward converter areshown in Figure 8.

The switches Q1 and Q2 are controlled by the samegate drive signal, as shown in Figure 8 (B and C). In thesteady state of operation, when the switches Q1 and Q2are ON for a TON period, the input voltage VIN is appliedto the transformer primary. During the TON period, themagnetizing current plus the reflected output inductorcurrent flows through the transformer primary and theswitches Q1 and Q2.

At the end of the ON period, when the switches areturned OFF, the flux stored inside the magnetic coreinduces a voltage in the reverse direction to thetransformer primary winding, which forward-biases thediodes D1 and D2, and provides a path to themagnetizing current to reset the core. The voltage VINis applied across the transformer primary winding in thereverse direction, as shown in Figure 8 (D). If there isno leakage inductance in the transformer T1, thevoltage across NP would be equal to VIN, and themaximum blocking voltage across the switch is VIN.When the magnetizing current reaches zero, diodes D1and D2 become reverse-biased and remain zero for therest of the switching period. The secondary sideoperation of the two-switch forward converter is thesame as the operation of the forward converterexplained earlier.

APPLICATION CONSIDERATIONSReduction in the blocking voltage of the switch allowsthe designer to select a better low-voltage MOSFET forthe design. Therefore, the two-switch forwardconverter can be used up to the output power level of350 watts. If peak current is greater than 350 watts,losses across the MOSFET become impractical tohandle, and incomplete utilization of magnetic makesthe transformer bulky (see Figure 9). Therefore, thetwo-switch forward converter is best suited forapplications with an output power level range of 150 to350 watts.

Q1G

S

D

D S

GQ2


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FIGURE 8: TWO-SWITCH FORWARD CONVERTER
.

Q1PWM

VP

VIN

Q2PWM

TS

TOFF

VIN NP NS

Q1

D3

D4

+

-

+

-

D

+ -

VP

IL

VL

Q2 DD1

D2

VP VIN

VIN

IN

IP

(A)

(A) = Two-switch forward converter power circuit(B) = Gate pulse for MOSFET Q1 (C) = Gate pulse for MOSFET Q2 (D) = Voltage across the primary winding NP (E) = Current through the primary winding NP (F) = Voltage across the MOSFET Q1 and Q2

(B)

(C)

(D)

(E)

(F)

t

t

t

t

t

VOUT


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FIGURE 9: TRANSFORMER BH CURVE
OF SINGLE SWITCH CONVERTER

Flyback Converter (FBT)A flyback converter (FBT) is a transformer-isolatedconverter based on the basic buck boost topology. Thebasic schematic and switching waveforms are shown inFigure 10.

In a flyback converter, a switch (Q1) is connected inseries with the transformer (T1) primary. Thetransformer is used to store the energy during the ONperiod of the switch, and provides isolation between theinput voltage source VIN and the output voltage VOUT.

In a steady state of operation, when the switch is ON fora period of TON, the dot end of the winding becomespositive with respect to the non-dot end. During the TONperiod, the diode D1 becomes reverse-biased and thetransformer behaves as an inductor. The value of thisinductor is equal to the transformer primarymagnetizing inductance LM, and the storedmagnetizing energy (see Equation 11) from the inputvoltage source VIN. Therefore, the current in theprimary transformer (magnetizing current IM) riseslinearly from its initial value I1 to IPK, as shown inFigure 10 (D).

As the diode D1 becomes reverse-biased, the loadcurrent (IOUT) is supplied from the output capacitor(CO). The output capacitor value should be largeenough to supply the load current for the time periodTON, with the maximum specified droop in the outputvoltage.

EQUATION 12: FLYBACK CONVERTER VOUT/VIN RELATIONSHIP

At the end of the TON period, when the switch is turnedOFF, the transformer magnetizing current continues toflow in the same direction. The magnetizing currentinduces negative voltage in the dot end of thetransformer winding with respect to non-dot end. Thediode D1 becomes forward-biased and clamps thetransformer secondary voltage equal to the outputvoltage.

The energy stored in the primary of the flybacktransformer transfers to secondary through the flybackaction. This stored energy provides energy to the load,and charges the output capacitor. Since themagnetizing current in the transformer cannot changeinstantaneously at the instant the switch is turned OFF,the primary current transfers to the secondary, and theamplitude of the secondary current will be the productof the primary current and the transformer turns ratio,NP/NS.

DISSIPATING STORED LEAKAGE ENERGYAt the end of the ON period, when the switch is turnedOFF, there is no current path to dissipate the storedleakage energy in the magnetic core of the flybacktransformer. There are many ways to dissipate thisleakage energy. One such method is shown inFigure 10 as a snubber circuit consisting of D2, RS andCS. In this method, the leakage flux stored inside themagnetic core induces a positive voltage at the non-dotend primary winding, which forward-biases the diodeD2 and provides the path to the leakage energy storedin the core, and clamps the primary winding voltage toa safe value. During this process, CS is charged to avoltage slightly more than the reflected secondaryflyback voltage, which is known as flyback overshoot.The spare flyback energy is dissipated in resistor RS. Ina steady state, and if all other conditions remainconstant, the clamp voltage is directly proportional toRS. The flyback overshoot provides additional forcingvolts to drive current into the secondary leakageinductance during the flyback action. This results in afaster increase in the transformer secondary current,which improves the efficiency of the flybacktransformer.

CONTINUOUS CONDUCTION MODEThe waveform shown in Figure 10 (D) representsContinuous Conduction mode operation of a flybackconverter. Continuous Conduction mode correspondsto the incomplete demagnetization of the flybacktransformer core. The core flux increases linearly from

ΔB

B

H

BSAT

VOUTVIN

-------------NSNP-------⎝ ⎠⎛ ⎞ D

1 D–( )------------------⎝ ⎠⎛ ⎞⋅=

where:D = the duty cycle of the flyback switch


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the initial value flux (0) to flux (PK) during the ONperiod, TON. In a steady state, the change in core fluxduring the TON period should be equal to the change influx during the TOFF period. This is important to avoid
saturation. The relation between the input and outputvoltage in a steady state and continuous mode ofoperation is given by Equation 12.

FIGURE 10: FLYBACK CONVERTER

Q1PWM

ID1

VP

VIN NP

NS

Q1

D1

+

-

D

VPD2

VCLAMP

RS CS

ID1

VIN

ISW

NPNS

TS

TON TOFF

(A) = Flyback converter power circuit (B) = Gate pulse for the MOSFET Q1 (C) = Voltage across the primary winding (D) = Current through MOSFET Q1 (E) = Current through the diode D1 (F) = Voltage across the MOSFET Q1

(A)

(B)

(C)

(D)

(E)

(F)

t

t

t

t

t

ISW

I1

IPK

VOUT

IOUT

VIN + VCLAMP

• IPK


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During Continuous Conduction mode of operation, theduty cycle is independent of the load drawn from theconverter, and is a constant for the DC input voltage.However, in a practical situation the load increases theloss inside the transformer and the output diode D2 lossis also increased. To maintain constant output voltage,the duty cycle varies slightly in Continuous Conductionmode at a constant DC input voltage.
Because of the presence of the secondary reflectedvoltage on the primary winding and the leakage storedenergy in the transformer core, the maximum voltagestress VDS of the switch is given by Equation 13. If theflyback converter is used for universal input of theoff-line power supply, the switch voltage rating shouldbe 700V, considering the secondary reflected voltageof 180V and 20% volts of leakage spike due to leakageenergy storage in the transformer.

EQUATION 13: MAXIMUM VDS IN FLYBACK CONVERTER

SELECTING A CAPACITORThe pulsating current ID1, as shown in Figure 10(E),flows in, and the DC load current flows out of the outputcapacitor, which causes the output capacitor of theflyback converter to be highly stressed. In the flybackconverter, the selection of the output capacitor is basedon the maximum ripple RMS current seen by thecapacitor given by Equation 6, and the maximumpeak-to-peak output voltage ripple requirements. Theoutput voltage peak-to-peak ripple depends on theripple current seen in the capacitor and its EquivalentSeries Resistor (ESR). The ESR of the capacitor andthe ripple current cause heating inside the capacitor,which affects its predictive life. Therefore, selection ofthe capacitor depends highly on the ripple currentrating and the ESR value so as to meet thetemperature rise and output voltage ripple requirement.If the output ripple current is high, it is advisable to havemore than one capacitor in parallel in place of a single,large capacitor. These capacitors should be placed atan equal distance from the diode cathode terminal, sothat each capacitor shares equal current.

AIR GAPTo increase the throughput capability and reduce thechances of magnetic saturation in the flybacktransformer core, an air gap is inserted in the limb of thetransformer core. This air gap doesn't change thesaturation flux density (BSAT) value of the corematerial; however, it increases the magnetic fieldintensity, H, to reach saturation and reduces the

residual flux density, BR, as shown in Figure 11.Therefore, the air gap increases the working range ofdelta BH to increase the throughput of the flybacktransformer.

FIGURE 11: BH CURVE WITH AIR GAP FOR THE FLYBACK TRANSFORMER

ADVANTAGES OF FLYBACK TOPOLOGYFlyback topology is widely used for the output powerfrom a maximum of a 5 to150 watt low-cost powersupply. Flyback topology doesn’t use an outputinductor, thus saving cost and volume as well as lossesinside the flyback converter. It is best suited fordelivering a high output voltage up to 400V at a lowoutput power up to 15-20 watts. The absence of theoutput inductor and the freewheeling diode (used in theforward converter) makes the flyback convertertopology best suited for high output voltageapplications.

In a flyback converter, when more than one output ispresent, the output voltages track one another with theinput voltage and the load changes, far better than theydo in the forward converter. This is because of theabsence of the output inductor, so the output capacitorconnects directly to the secondary of the transformerand acts as a voltage source during the turned offperiod (TOFF) of the switch.

APPLICATION CONSIDERATIONSFor the same output power level, and if the outputcurrent requirement is more than 12-15 amps, the RMSpeak-to-peak ripple current seen by the outputcapacitor is very large, and becomes impractical tohandle. Therefore, it is better to use the forwardconverter topology than the flyback topology for anapplication where the output current requirement ishigh.

VDS VIN VCLAMP VLEAKAGE+ +=

where:VCLAMP = Voltage across the snubber circuit (D2, R2, and C2)VLEAKAGE = Leakage spike voltage due to leakage energy

BSAT

ΔBAC

ΔH ΔH

H

B

(air gap)without air gap


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Push-Pull ConverterA push-pull converter is a transformer-isolatedconverter based on the basic forward topology. Thebasic schematic and switching waveforms are shown inFigure 12.
The high-voltage DC is switched through thecenter-tapped primary of the transformer by twoswitches, Q1 and Q2, during alternate half cycles.These switches create pulsating voltage at thetransformer primary winding. The transformer is usedto step down the primary voltage and to provideisolation between the input voltage source VIN and theoutput voltage VOUT.

The transformer used in a push-pull converter consistsof a center-tapped primary and a center-tappedsecondary. The switches Q1 and Q2 are driven by thecontrol circuit, such that both switches should createequal and opposite flux in the transformer core.


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In the steady state of operation, when Q1 is ON for theperiod of TON, the dot end of the windings becomepositive with respect to the non-dot end. The diode D5becomes reverse-biased and the diode D6 becomesforward-biased. Thus, the diode D6 provides the path tothe output inductor current IL through the transformersecondary NS2. As the input voltage VIN is applied tothe transformer primary winding NP1, a reflectedprimary voltage appears in the transformer secondary.
The difference of voltages between the transformersecondary and output voltage VOUT is applied to theinductor L in the forward direction. Therefore, theinductor current IL rises linearly from its initial value ofIL1 to IL2, as shown in Figure 12(E). During this TONperiod while the input voltage is applied across thetransformer primary NP1, the value of the magnetic fluxdensity in the core is changed from its initial value of B1to B2, as shown in Figure 13.

FIGURE 12: PUSH-PULL CONVERTER

VIN

Q2

D6

+

-

D

D5

Q1 D

NP2

NP1

Q1PWM

IIN

Q2PWMVIN

VDS2

IL

VDS1

IQ1 IQ2 IQ1 IQ2

t

t

t

t

t

t

NS2

NS1

VOUT

IOUT

L+ -

IL

IL1

IL2

TON

TsTS/2

TOFF

(A)

(B)

(C)

(D)

(E)

(A) = Push-pull converter(B) = Gate pulse of MOSFET Q1

(C) = Drain-to-source voltage Vds of MOSFET Q1 (D) = Current through the MOSFET Q1 and Q2

(E) = Output inductor current


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At the end of the TON period, the switch Q1 is turnedOFF, and remains off for the rest of the switching periodTS. The switch Q2 will be turned ON after half of theswitching period TS/2, as shown in Figure 12. Thus,during the TOFF period, both of the switches (Q1 andQ2) are OFF. When switch Q1 is turned OFF, the bodydiode of the switch provides the path for the leakageenergy stored in the transformer primary, and theoutput rectifier diode D5 becomes forward-biased. Asthe diode D5 becomes forward-biased, it carries half ofthe inductor current through the transformer secondaryNS1, and half of the inductor current is carried by thediode D6 through the transformer secondary NS2. Thisresults in equal and opposite voltages applied to thetransformer secondaries, assuming both secondarywindings NS1 and NS2 have an equal number of turns.Therefore, the net voltage applied across thesecondary during the TOFF period is zero, which keepsthe flux density in the transformer core constant to itsfinal value B2. The output voltage VOUT is applied to theinductor L in the reverse direction when both switchesare OFF. Thus, the inductor current IL decreaseslinearly from its initial value of IL2 to IL1, as shown inFigure 12 (E).
AVOIDING MAGNETIC SATURATIONAfter the time period TS/2, when the switch Q2 turnsON, the diode D6 become reverse-biased, and thecomplete inductor current starts flowing through thediode D5 and transformer secondary NS1. During thisTON period, when the switch Q2 is turned ON, the inputvoltage VIN is applied to the transformer primary NP2 inthe reverse direction, which makes the dot endnegative with respect to the non-dot end.

As the input voltage applies across the transformerprimary NP2, the value of the magnetic flux density inthe core is changed from its initial value of B2 to B1, asshown in Figure 13. Assuming the number of primaryturns NP1 is equal to NP2, and the number of secondarywinding turns NS1 is equal to NS2, the TON period ofboth switches should be the same to avoid magneticsaturation in the transformer core. After the TON period,Q2 turns OFF and remains off for the rest of the periodTS, as shown in Figure 12.

FIGURE 13: BH CURVE FOR PUSH-PULL TRANSFORMERVOLTAGE

VOLTAGE RATING OF SWITCHDuring the TON period of any switch, the voltage VIN isapplied to half of the transformer primary and inducesequal voltage to the other half of the transformerprimary winding. This results in twice the input voltageapplied to the off switch. Therefore, the switches usedfor the push-pull converter must be rated at least twicethe maximum input voltage. For practical purposes, thevoltage rating of the switch should be 20% more thanthe theoretical calculation due to leakage spike andtransients. For the universal input voltage, the rating ofthe switch used should be: 264 • 1.414 • 2 • 1.2 = 895,which means a 900 volt switch is required.

VOUT/VIN RELATIONSHIPIn the steady state and Continuous Conduction modeof operation, the relation between the input and outputvoltage is given by Equation 14, where D is the dutycycle of the switch.

EQUATION 14: PUSH-PULL CONVERTER VOUT/VIN RELATIONSHIP

ΔB

B

H

BSAT

B2

B1

BSAT

VOUT VINNSNP-------⎝ ⎠⎛ ⎞ 2 D⋅ ⋅ ⋅=

DTONTS

----------=


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REDUCING MAGNETIC IMBALANCEIf the flux created by both primary windings is not equal,a DC flux is added at every switching cycle and willquickly staircase to saturation. This magneticimbalance can be caused by an unequal TON period forboth switches, an unequal number of turns of theprimary NP1 and NP2 and the secondary NS1 and NS2,and an unequal forward voltage drop of the outputdiodes D5 and D6. This imbalance can be reduced bycareful selection of the gate pulse drive circuitry, usinga switching device that has a positive temperatureco-efficient (PTC) for the ON state resistance, addingair gap to the transformer core, and using peak currentmode control techniques to decide the TON period ofthe switches Q1 and Q2.Figure 14 explains how to determine the status ofmagnetics imbalance in the core during the steadystate of operation by looking at current waveforms ofthe two switches Q1 and Q2. If the current wave shapeof both switches is symmetrical and equal inmagnitude, as shown in Figure 14 (A), the fluxexcursion in the core is well balanced and thetransformer is operating in a safe region. However, ifthe current wave shape of both switches is notsymmetrical and the peak magnitude current is notequal, as shown in Figure 14 (B), there is an imbalancein the flux excursion inside the core; however, it is stilloperating at the safe operating region of the BH loop. Ifthe current wave shape of one of the switches hasupward concavity, as shown in Figure 14 (C), thismeans there is a large inequality in the flux excursioninside the magnetic core, and magnetic BH loop isclose to saturation. A small increase in the magneticfield intensity H will cause a decrease in magnetizinginductance, whereas a significant increase inmagnetizing current can destroy the switch and thetransformer.
FLUX DOUBLING AND VOLT-SECOND CLAMPINGWhen such a system is first switched ON or during theload transient, the flux density will start from zero ratherthan B1 or B2, and consequently, the available fluxexcursion at this instant will be half that normallyavailable under the steady state condition. This iscalled “flux doubling”. The drive and control circuitrymust recognize this condition and protect theapplication from wide drive pulses until the normalworking condition of the core is restored. This is knownas “volt-second clamping”.

COPPER UTILIZATIONA push-pull transformer requires a center tappedprimary, and each winding is active only for alternatepower pulses, which means only 50% utilization ofprimary copper. The unused copper occupies space inthe bobbin and increases the primary leakageinductance. A center-tapped primary would normally bebifilar wound, but this will cause a large AC voltagebetween the adjacent turns.

APPLICATION CONSIDERATIONSThe high voltage (2 • VIN) stress on the switch, and50% utilization of the transformer primary makes usingthe push-pull topology undesirable when the inputvoltage is European, Asian, the universal range (90VAC-230 VAC), or when PFC is used as the front endrectifier. The reason for this is incomplete utilization ofmagnetic core, which is due to only one switchconducting during each switching cycle and full inputvoltage is applied across the transformer primary. Thepush-pull topology is most favorable for low-voltageapplications such as US regulation 110 VAC input directoff-line SMPS, or low input voltage DC-DC isolatedconverter for the power rating of up to 500 watts.

FIGURE 14: PUSH-PULL CONVERTER SWITCH CURRENT

Q1ON Q2ON Q1ON Q2ON

IQ1 IQ2 IQ1 IQ2

Saturation

t

t

t(A) = Equal volt second is applied across the primary (B) = Unequal volt second applied across the primary but still in safe region (C) = Highly unbalance volt second applied across the secondary and core is near to saturation

(C)

(B)

(A)


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AVOIDING SHOOT-THROUGHIn a push-pull converter, both switches cannot turn ONat the same time. Turning both switches on at the sametime will generate an equal and opposite flux in thetransformer core, which results in no transformer actionand the windings will behave as if they have a short.This condition offers a very low impedance betweenthe input source VIN and ground, and there will be avery large shoot-through current through the switch,which could destroy it. To avoid shoot-through, aninductor is placed between the transformer primary andthe input supply, as shown in Figure 15. The resultedconverter is known as a current-source push-pullconverter. When both switches are on, the voltageacross the primary becomes zero and the input currentbuilds up and energy is stored in the inductor. Whenonly one of the two switches is ON, the input voltageand stored energy in the inductor supplies energy tothe output stage.
The relation between the output and input inContinuous Conduction mode is given by Equation 15.

EQUATION 15: CURRENT SOURCE PUSH-PULL CONVERTER VOUT/VIN RELATIONSHIP

FIGURE 15: CURRENT FED PUSH-PULL CONVERTER

Half-Bridge ConverterThe half-bridge converter is a transformer-isolatedconverter based on the basic forward topology. Thebasic schematic and switching waveforms are shown inFigure 16.

The switches Q1 and Q2 form one leg of the bridge, withthe remaining half being formed by the capacitors C3and C4. Therefore, it is called a half-bridge converter.

The switches Q1 and Q2 create pulsating AC voltage atthe transformer primary. The transformer is used tostep down the pulsating primary voltage, and to provideisolation between the input voltage source VIN and theoutput voltage. In the steady state of operation,capacitors C3 and C4 are charged to equal voltage,which results in the junction of C3 and C4 beingcharged to half the potential of the input voltage.

When the switch Q1 is ON for the period of TON, the dotend of the primary connects to positive VIN, and thevoltage across the capacitor C4 (VC4) is applied to thetransformer primary. This condition results in half of theinput voltage being VIN, which is applied to the primarywhen the switch Q1 is ON, as shown in Figure 16 (C).The diode D4 becomes reverse-biased, and the diodeD3 becomes forward-biased, which carry the fullinductor current through the secondary winding NS1.The difference of the primary voltage reflected on thesecondary NS1 and output voltage VOUT is applied tothe output inductor L in the forward direction.Therefore, the inductor current IL rises linearly from itspresent value of IL1 to IL2, as shown in Figure 16 (E).During this TON period, the reflected secondary current,plus the primary magnetizing current flows through theswitch Q1. As the voltage is applied to the primary in theforward direction during this TON period, and when theswitch Q1 is ON, the flux density in the core changesfrom its initial value of B1 to B2, as shown in Figure 13.

At the end of the TON period, the switch Q1 turns OFF,and remains off for the rest of the switching period TS.The switch Q2 will be turned ON after half of theswitching period TS/2, as shown in Figure 16 (B);therefore, during the TOFF period, both switches are off.

When switch Q1 is turned off, the body diode of theswitch Q2 provides the path for the leakage energystored in the transformer primary, and the outputrectifier diode D4 becomes forward-biased. As thediode D4 become forward-biased, it carries half of theinductor current through the transformer secondaryNS2 and half of the inductor current is carried by thediode D3 through the transformer secondary NS1, asshown in Figure 16 (E). Therefore, the equal andopposite voltage is applied at the transformersecondary, assuming both secondary windings NS1and NS2 have an equal number of turns. As a result, thenet voltage applied across the secondary during theTOFF period is zero, which keeps the flux density in thetransformer core constant to its value of B2.

The output voltage VOUT is applied to the inductor L inthe reverse direction when both switches are OFF.Therefore, the inductor current IL decreases linearlyfrom its initial value of IL2 to IL1, as shown in Figure 16(E). The body diodes of switches Q1 and Q2 provide thepath for the transformer leakage energy.

VOUTVIN

-------------NSNP-------⎝ ⎠⎛ ⎞ 1

2 1 D–( )⋅-------------------------⎝ ⎠⎛ ⎞⋅=

VIN

Q2

VOUT

+

-

D

D5

Q1 D

NP2

NP1

NS2

NS1

NP1 = NP2 = NP

NS1 = NS2 = NS

D6

IOUT


AN1114
After the time period TS/2 when the switch Q2 turns ON,the dot end of the primary connects to the negative ofVIN, and the voltage across the capacitor C3 (VC3) isapplied to the transformer primary. Therefore, half ofthe input voltage VIN is applied to the primary when theswitch Q2 is ON in the reverse direction, as shown inFigure 16 (C). The value of the magnetic flux density inthe core is changed from its initial value of B2 to B1, asshown in Figure 13. Assuming the number ofsecondary winding turns of NS1 is equal to NS2, and to
avoid magnetic saturation in the transformer core, theTON period of both switches should be the same. Afterthe TON period, Q2 turns OFF and remains off for therest of the period TS, as shown in Figure 16 (B). Pleasenote that when either of the switches turn ON for theTON period, it affects the entire input voltage VIN of theother switch.

FIGURE 16: HALF-BRIDGE CONVERTER

VIN

D3 IOUT

+

-

D4

Q1

IQ1

Q2

L+ -

IL

IQ2

C4

C3

CB

VC3

VC4

Q1PWM

Q2PWM

VIN/2

IQ1 IQ2 IQ1 IQ2

VP

+

-VP

IL

ISW

ID4

t

t

t

t

t

IL1

IL2

VOUT

(A) = Half-Bridge Converter(B) = Gate pulse waveform of Q1(C) = Voltage across transformer primary(D) = Current through the switch Q1 and Q2

(E) = Output inductor and diode D4 current

(A)

(B)

(C)

(D)

(E)

TON TOFF

TS

NPNS1

NS2


AN1114
EQUIVALENT TRANSFORMERThe equivalent transformer model is shown inFigure 17. During the TOFF period, when both switchesare OFF, ideally, the secondary currents flowingthrough the diode D3 and the diode D4 should be equal.However, in the practical sense, because of thepresence of the non-zero magnetizing current IM, ID3and ID4 are not equal.
This magnetizing current IM(t), as shown in Figure 17,may flow through the transformer primary, through oneof the secondaries, or it may divide between all three ofthe windings.

FIGURE 17: TRANSFORMER EQUIVALENT MODEL

The division of the magnetizing current depends on theI-V characteristics of the switches, the diode and theleakage of the transformer windings. Assumingnegligible leakage in the transformer and that bothdiodes have similar I-V characteristics, the currentflowing through the diode D3 and D4 is given byEquation 16.

EQUATION 16: OUTPUT DIODES AND MAGNETIZING CURRENT RELATIONSHIP

DC BLOCKING CAPACITORA small DC blocking capacitor is placed in series withthe transformer primary, to block the DC flux in thetransformer core. The value of the DC blockingcapacitor is given by Equation 17.

EQUATION 17: DC BLOCKING CAPACITOR

PREVENTING SHOOT-THROUGHA half-bridge converter is also prone to magneticimbalance of the transformer core when the fluxcreated by the switches Q1 and Q2 during the TONperiod is not equal. To prevent staircase saturation, thepeak current mode control technique is used to decidethe TON period of the switches Q1 and Q2. Themaximum duty cycle of 45% with a dead-time betweenthe two switches is used to prevent shoot-throughcurrent from the transformer primary.

APPLICATION CONSIDERATIONSThe complete utilization of the magnetic andmaximum voltage stress on either of the switches isequal to the input voltage VIN. However, only half ofthe input voltage is applied across the primary wheneither of the switches is ON for the TON period.Therefore, double the primary switch current isrequired to have the same output power as thepush-pull converter. This makes the half-bridgetopology best suited for applications up to 500 watts.This is especially suited for European and Asianregions where the AC is 230 VAC line voltage. Thepower rating of the half-bridge converter can beincreased up to 650-750 watts if front-end PFC isused. The peak primary current and the maximumtransient OFF state voltage stress of the switchdetermine the practical maximum available outputpower in the half-bridge converter topology.

I1(t)

D4

NP

NS2

NS1

D3

id3

ID4

Transformer Equivalent Model

I1’(t)

IM(t)

VP

+

-

NS = NS1 = NS2

for IM(t)<< i(t)

I1 0=ID3 0.5 i t( ) 0.5 n⋅( )– IM t( )⋅ ⋅=

ID3 ID4 0.5 i t( )⋅= =

ID4 0.5 i t( ) 0.5 n⋅( )– IM t( )⋅ ⋅=

CBIPRIM TONMAX⋅

VΔ----------------------------------------=

where:TONMAX = maximum ON time of either MOSFETIPRIM = maximum primary currentΔV = permissible droop in primary voltage because ofthe DC blocking capacitor


AN1114
Half-Bridge Resonant ConverterMagnetics and heat sink occupy more than 80% of thetotal system volume. High switching frequency andhigh efficiency are the two methods used to improvepower density and the profile of a SMPS. However,these two methods do not come together easily. Highswitching frequency (more than 100 kHz) could reducethe volume of the passive components, but efficiencyoften suffers as a result. High EMI noises caused byparasitic components prevent fast switching. Efficiencyis reduced due to high switching losses, and diodereverse recovery causes voltage overshoot and ringingacross the device.
IMPROVEMENT TECHNIQUESTo develop SMPS with high efficiency and highswitching frequencies, and to achieve high powerdensity and low profile, the following techniques needto be improved.

The size of the magnetic components is limited bymagnetic losses. With the use of better magnetic, thesize of the magnetic could be greatly reduced. Withbetter semiconductor switching devices likeCoolMOS™, Schottky diode losses in thesemiconductor can be reduced. This lessens thethermal management requirement as well as reducingthe size and quantity of the heat sink.

Advanced packaging of active and passivecomponents, such as integration of a capacitor into themagnetic, integration of output inductor in the isolationtransformer, and the use of the leakage inductance ofthe transformer when an inductor is required in serieswith transformer winding, contribute to improvingefficiency. In addition, the use of advanced powertopologies, which reduce switching losses at higherfrequencies.

RESONANT TOPOLOGIESThe resonant technique is used to reduce the switchinglosses in the semiconductor devices. There are manyresonant topologies available, such as:

• Series resonant converter• Parallel resonant converter• LLC resonant converter

The first two topologies cannot be optimized for thewide input voltage range and wide output loadvariation. The LLC resonant converter is capable ofreducing switching losses at wide input voltage range,and minimizes the circulating energy at high inputvoltage. Turn off losses can be minimized by reducingthe turn-off current through the switch and zero voltageswitching (ZVS), thereby eliminating turn-on losses.Therefore, the LLC resonant converter providesnegligible switching losses at high switching frequencyeven at high input voltage variation range.

Series Resonant Converter (SRC)In a series resonant converter (SRC), resonant tankelements (the inductor LR and the capacitor CR), areconnected in series with the transformer primary, asshown in Figure 18.

FIGURE 18: SERIES RESONANT CONVERTER

The resonant tank is used to shape the primary currentas sinusoidal, and to reduce the current value flowingthrough the switch at its transition period, therebyreducing the switching losses. In a power MOSFET,zero voltage switching is preferred as compared to zerocurrent switching. Therefore, the operating switchingfrequency, more than the resonant tank frequency, ispreferred for this type of converter to achieve ZVS, asshown in Figure 19. The operating frequency increasesto a very high value at light load (Q = 0) to keep theoutput voltage regulated.

FIGURE 19: DC CHARACTERISTICS

At low input voltage, the converter is operating close toresonant frequency. As the input voltage increases, theconverter should operate at a higher switchingfrequency away from the resonant frequency, therebyincreasing more and more circulation energy in theresonant tank, as shown in Figure 20.

VINIOUT

+

-

CR

NS

NS

LR

VOUT

.2 .4 .6 .8 1.0 1.2 1.4 1.6 1.8

Q = 1

Q =

2Q

= 3

Q =

4

VIN= 300V

VIN = 400V


AN1114
FIGURE 20: CURRENT AND VOLTAGE
WAVEFORM

From this analysis, it can be shown that a seriesresonant converter is not a good choice for a front endDC-DC converter. The major problems are: light loadregulation, high circulating energy and turn-off currentat high input voltage.

Parallel Resonant Converter (PRC)In a parallel resonant converter (PRC), a resonant tankelement, the capacitor CR, is connected in parallel withthe transformer primary, as shown in Figure 21. Similarto the SRC, the operation switching frequency is alsodesigned to be more than the resonant tank frequency.

FIGURE 21: PARALLEL RESONANT CONVERTER

Compared to SRC, the operating region is muchsmaller at a light load (Q = ∞), as shown in Figure 22.

FIGURE 22: DC CHARACTERISTICS

FIGURE 23: CURRENT AND VOLTAGE WAVE FORM

In a parallel resonant converter, since the load is inparallel with the resonant capacitor, even at no load,the resonant tank offers very small impedance to theinput, which induces a very high circulation energy.Given the above analysis, we can determine that aparallel resonant converter is not a good choice for afront end DC-DC converter. The major problems are:high circulating energy and high turn-off current at highinput voltage conditions.

IR CirculatingEnergy

CirculatingEnergy

VIN = 300V, full Load


VIN

+

-

NS

NS

LR

VOUT

IOUT

CR

.2 .4 .6 .8 1.0 1.2 1.4 1.6 1.8

VIN = 300VVIN = 400V

IR CirculatingEnergy

CirculatingEnergy




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LLC Resonant ConverterIn an LLC resonant converter, resonant tank elements(the inductor LR and the capacitor CR), are connectedin series with the transformer primary, and the resonantinductor LM is connected in parallel with thetransformer primary, as shown in Figure 24.
The LLC resonant converter uses transformermagnetizing inductance for generating one moreresonant frequency, which is much lower than the mainresonant frequency comprising resonant tank LR andCR. The LLC resonant converter is designed to operateat a switching frequency higher than the resonantfrequency of the resonant tank LR and CR.

The benefit of the LLC resonant converter is narrowswitching frequency range with light load and ZVScapability even at no load. In addition, its special DCgain characteristic, as shown in Figure 25, makes theLLC resonant converter an excellent choice for thefront end DC-DC application. The two resonantfrequencies are given by Equation 18. The firstresonant frequency is determined by LR and CR andthe other resonant frequency is determined by LR, CRand LM.

FIGURE 24: HALF-BRIDGE LLC RESONANT CONVERTER

EQUATION 18: LLC RESONANT FREQUENCIES

FIGURE 25: DC CHARACTERISTIC OF LLC RESONANT CONVERTER

VIN

+

-

-CR

NS

NS

LR

Transformer

Vout

IOUT

LM

Q1

Q2

D1

D2

FR11

2 π LR CR⋅( )⋅⋅( )-----------------------------------------------=

FR21

2 π LM LR+( ) CR⋅( )⋅ ⋅( )-----------------------------------------------------------------=

.2 .6 .8 1

.2

.4

.6

.8

1.0

1.2

1.4

1.6

1.8

ZCS REGION

ZVS REGION


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LLC Resonant Converter OperationLLC resonant converter operation can be divided intotwo time intervals. In the first interval, the inductor LR,resonant with the capacitor CR and inductor LM, isclamped with the output voltage. Resonance of LR andCR is stopped when the LR resonant current is equal tothe LM current, after which LM will contribute to theresonance and the second interval begins. During thisinterval, the resonant components will change to CRand LM in series with LR (see the flat region inFigure 26 (B)). Therefore, the LLC resonant converteris a multi-resonant converter since the resonantfrequency at particular time intervals is different. The detailed operation of the LLC resonant converter,as shown in Figure 26, can be broken down into threemodes. At the initial condition, t = t0, the description ofthe LLC resonant converter operation begins at theconclusion of one power transfer cycle. This occursafter the resonant tank delivering power to the load withswitch Q2 is conducting. The resonant current (whenQ2 is conducting) flowing through the inductor isnegative, as indicated in Figure 26 (B).• Mode 1: t0 < t < t1 (Q2 turned OFF at t = t0)
In this mode, the energy stored in the resonantinductor discharges the output capacitor of theswitch Q1 to zero potential. The body diode of theswitch provides the path for the resonant inductorcurrent LR, which creates a ZVS condition forSwitch Q1. The gate signal of Q1 should be appliedafter the body diode of Q1 starts conducting.

• Mode 2: t1 < t < t2This mode begins when inductor current becomespositive, as shown in Figure 26 (B). Since theswitch Q1 is turned ON during Mode 1, current willflow through switch Q1. The output rectifier diodeD1 becomes forward-biased, and the transformervoltage clamps at output voltage VOUT. Thereflected secondary voltage on the primary clampsLM to constant voltage, so it cannot participate inthe resonance during this period. This modecomes to an end when LR current is equal to LMcurrent, and the output current reaches zero, asshown in Figure 26 (C).

• Mode 3: t2 < t < t3In this mode, when the inductor current LR and LMare equal and the output current reaches zero,both output rectifiers become reverse-biased.During this period, LM is freed to contribute toresonance, and form a resonant tank, CR and LRin series with LM. This mode ends when the switchQ1 turns OFF.

As seen in Figure 26 (B), the switch Q1 turns OFF at avery low value of current compared with peak current.ZVS depends on the magnetizing current and not theload current. This magnetizing current is also theturn-off current of the switch, which can be controlled toachieve almost zero turn-off losses. For the next halfcycle, the operation is the same as previouslydescribed.

FIGURE 26: LLC RESONANT CONVERTERtd = Dead time

TON

TOFF

TS

t1t0 t2 t3(A) = Gate pulse for LLC resonant converter(B) = Resonant magnetizing current(C) = Output current

(A)

(B)

(C)


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Full-Bridge ConverterA full-bridge converter is a transformer-isolated buckconverter. The basic schematics and switchingwaveforms are shown in Figure 27. Since the shape ofthe converter looks like an H, a full-bridge converter isalso known as an H-bridge converter.
BASIC OPERATIONThe transformer primary is connected between the twolegs formed by the switches Q1 Q4 and Q3 Q2. Theswitches Q1 Q2 and Q3 Q4 create a pulsating ACvoltage at the transformer primary. The transformer isused to step down the pulsating primary voltage, aswell as to provide isolation between the input voltagesource and the output voltage VOUT. As in half-bridgetopology, the voltage stress on the switch is VIN.However, voltage applied on the primary when either ofthe switches is ON is half of the input voltage, therebydoubling the switch current. In a push-pull topology,voltage applied on the transformer primary when eitherof the switches is ON, is full input voltage; however, the

voltage stress of the switch is twice the input voltage.This condition renders both topologies unfeasible forhigh power (>500 watt) applications.

A full-bridge converter configuration retains the voltageproperties of the half-bridge topology, and the currentproperties of push-pull topology. The diagonal switchpairs, Q1 Q2 and Q3 Q4, are switched alternately at theselected switching period. In the steady state ofoperation when the diagonal switch pair, Q1 Q2, is ONfor a period of TON, the dot end of the winding becomespositive with respect to the non-dot end. The diode D4become reverse-biased and diode D3 becomesforward-biased. The diode D3 carries the full loadcurrent through the secondary winding NS1. As theinput voltage is applied across the transformer primary,the switch carries the reflected load current, plus thetransformer primary magnetizing current. The fluxdensity in the core changes from its initial value of B1 toB2, as shown in Figure 13. The difference of theprimary reflected voltage to the secondary and theoutput voltage is applied across the inductor L in theforward direction.

FIGURE 27: FULL-BRIDGE/H-BRIDGE PHASE SHIFT ZVT CONVERTER

VIN

D3

+

-D4

Q3

Q2

L+VL

Q1PWMQ2PWM

VIN

Q1

Q4

VIN

Q3PWMQ4PWM

COSS1

COSS4 COSS2

COSS3

LLKG

(A) = Full-Bridge/H-Bridge Phase Shift ZVT converter(B) = PWM gate pulse waveform for full-bridge switches(C) = Voltage across the transformer primary(D) = Output inductor and rectifier diode current

(A)

(B)

(C)

(D)

-

CO

VOUT

TON TOFF

TS


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At the end of the ON period, when the switch pair Q1 Q2is turned OFF, and when it remains OFF for the rest ofthe switching period TS, the switch pair Q3 Q4 will beturned ON after half of the switching period TS/2, asshown in Figure 27(B and C). Therefore, during theTOFF period, all four switches are OFF.
When the switch pair Q1 Q2 is turned OFF, the bodydiode of the switch pair Q3 Q4 provides the path for theleakage energy stored in the transformer primary.Theoutput rectifier diode D4 becomes forward-biased, andit carries half of the inductor current through thetransformer secondary NS2. Half of the inductor currentis carried by the diode D3 through the transformersecondary NS1, as shown in Figure 27 (D). Therefore,the net voltage applied across the secondary duringTOFF period is zero as previously discussed inhalf-bridge topology operation. This keeps the fluxdensity in the transformer core constant to its finalvalue of B2 (see Figure 15). The output voltage VOUT isapplied to the inductor L in the reverse direction whenboth switches are OFF.

After the time period TS/2, when the diagonal switch Q3,Q4 is turned ON for a period of TON, the dot end of thewinding becomes negative with respect to the non-dotend. The diode D3 becomes reverse-biased and thediode D4 becomes forward-biased. The diode D4 car-ries the full load current through the secondary windingNS2. As the input voltage is applied across the trans-former primary, the switch carries the reflected loadcurrent plus the transformer primary magnetizing cur-rent. As the input, voltage is applied to the transformerin the reverse direction, the flux density in the corechanges from its initial value of B2 to B1, as shown inFigure 13. The difference of the primary reflected volt-age to the secondary and the output voltage is appliedacross the inductor L in forward direction.

Assuming the number of secondary winding turns NS1is equal to NS2, and to avoid magnetic saturation in thetransformer core, the TON period of both switch pairs Q1Q2 and Q3 Q4 should be equal. After the TON period ofthe switch pair Q3 Q4, it turns OFF and remains OFF forthe rest of the period TS, as shown in Figure 27 (B).Please note that when either of the diagonal switchpairs turns ON for a period of TON, it applies the entireinput voltage VIN to the other switch.

In Continuous Conduction mode of operation, therelation between the input voltage and the outputvoltage is given by Equation 19.

EQUATION 19: FULL-BRIDGE CONVERTER VOUT/VIN RELATIONSHIP

APPLICATION CONSIDERATIONSSince the maximum voltage stress across any switch isVIN, and with the complete utilization of magnetic coreand copper, this combination makes the full-bridge con-verter an ideal choice for high input voltage, high powerrange SMPS (<1000 watts) applications.

Full-Bridge ConverterIn the full-bridge converter, four switches have beenused, thereby increasing the amount of switchingdevice loss. For applications requiring output power ofmore than 1000 watts, the loss in the switching devicebecomes impractical to handle in a full-bridgeconverter. The conduction loss of a MOSFET can be reduced byusing a good MOSFET, and switching losses can bereduced by using either a ZVS (zero voltage switchingduring turn ON transition), a ZCS (zero currentswitching during turn OFF transition), or bothtechniques. Shaping the input current sinusoidal toachieve ZCS, increases the peak and the RMS currentthrough the MOSFET in the high power application,thereby increasing the conduction losses. At high inputvoltage, the ZVS technique is preferred for theMOSFET.

Full-Bridge/H-Bridge Phase-Shift ZVT TopologyA full-bridge converter using the phase shift ZVTtechnique is known as an H-Bridge Phase-Shift ZVTtopology. In this topology, the parasitic output capacitorof the MOSFETs and the leakage inductance of theswitching transformer are used as a resonant tankcircuit to achieve zero voltage across the MOSFET atthe turn-on transition. There are two major differencesin the operation of a phase-shift ZVT and simplefull-bridge topology. In a phase-shift ZVT converter, thegate drive of both of the diagonal switches is phaseshifted. In addition, both halves of the bridge switchnetwork are driven through the complementary gatepulse with a fixed 50% duty cycle. The phase differencebetween the two half-bridge switching network gatedrives control the power flow from primary tosecondary, which results in the effective duty cycle.Power is transferred to the secondary only when thediagonal switches are ON. If either the top or bottomswitches of both legs are ON simultaneously, zerovoltage is applied across the primary. Therefore, nopower is transferred to the secondary during thisperiod. When the appropriate diagonal switch is turnedOFF, primary current flows through the output capacitorof the respective MOSFETs causing switch drain volt-age to move toward to the opposite input voltage rail.This causes zero voltage across the MOSFET to beturned ON next, thus creating zero voltage switchingwhen it turns ON. This is possible when enough circu-lating current is provided by the inductive storageenergy to charge and discharge the output capacitor of

VOUT 2 VINNSNP-------⎝ ⎠⎛ ⎞ D⋅ ⋅ ⋅=


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the respective MOSFETs. Figure 28 shows the gatepulse required, and the voltage and current waveformacross the switch and transformer.
FIGURE 28: REQUIRED GATE PULSES AND VOLTAGE AND CURRENT ACROSS PRIMARY

Q1PWM

Q4PWM

Q2PWM

Q3PWM

VPRIMARY

IP

t0 t1 t2 t3 t4

IPK

(A) = Gate pulse for all switches for phase-shift ZVT converter(B) = Voltage across primary(C) = Current across primary

(A)

(B)

(C)


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TIME INTERVALSThe operation of the phase-shift ZVT can be dividedinto different time intervals. Assuming that thetransformer was delivering the power to the load, thecurrent flowing through primary is IPK, and the diagonalswitch Q1, Q2 was ON, at t = t0, the switch Q2 is turnedOFF.
• Interval1: t0 < t < t1The switch Q2 is turned OFF, beginning theresonant transition of the right leg. Primary currentis maintained constant by the resonant inductorLLK. This primary current charges the outputcapacitor of switch Q2 (COSS2) to the input voltageVIN, which results in the output capacitance of Q3(COSS3) being discharged to zero potential. Thiscreates zero potential across the switch Q3 prior toturn-on, resulting in zero voltage switching. Duringthis transition period, the transformer primaryvoltage decreases from VIN to zero, and theprimary no longer supplies power to the output.Inductive energy stored in the output inductor andzero voltage across the primary cause both outputrectifiers to share the load current equally.

• Interval2: t1 < t < t2After charging COSS2 to VIN, the primary currentstarts flowing through the body diode of Q3. NowQ3 can be turned on any time after t1 and have azero voltage turn-on transition.

• Interval3: t2 < t < 3At t = t2, Q1 was turned OFF and the primary wasmaintained by the resonant inductor LLK. Inaddition, at t = t2, IP is slightly less than theprimary peak current IPK because of finite losses.The primary resonant current charges the outputcapacitor of switch Q1 (COSS1) to input voltage VIN,which discharges the output capacitor of Q4(COSS4) to zero potential, thus enabling zerovoltage turn-on switching for Q4. During thistransition, the primary current decays to zero. ZVSof the left leg switches depends on the energystored in the resonant inductor, conduction lossesin the primary switches, and the losses in thetransformer winding. Since this left leg transitiondepends on leakage energy stored in thetransformer, it may require an external seriesinductor if the stored leak energy is not enough forZVS. Now, when Q4 is turned ON, voltage VIN isapplied across the primary in the reverse direction.

• Interval: t3 < t < t4The two diagonal switches Q3, Q4 are ON,applying full input voltage across the primary.During this period, the magnetizing current, plusthe reflected secondary current into the primaryflows through the switch. The exact diagonalswitch-on time TON depends on the input voltage,the transformer turns ratio, and the output voltage.After the TON period of the diagonal switch, Q3 isturned OFF.

One switching cycle is completed when the switch Q3is turned OFF. The primary current charges COSS3 to apotential of input voltage VIN and discharges COSS2 tozero potential, thereby enabling ZVS for the switch Q2.The identical analysis is required for the next half cycle.

ACHIEVING ZVTIn the H-Bridge Phase Shift ZVT Converter shown inFigure 27 (A), the maximum transition time occurs forthe left leg at minimum load current and maximum inputvoltage, and minimum transition time occurs for theright leg at maximum load current and minimum inputvoltage. Therefore, to achieve ZVT for all switches,enough inductive energy must be stored to charge anddischarge the output capacitance of the MOSFET inthe specified allocated time. Energy stored in theinductor must be greater than the capacitive energyrequired for the transition as given by Equation 20. TheMOSFET output capacitance varies as applieddrain-to-source voltage varies. Thus, the outputcapacitance of the MOSFET should be multiplied by afactor of 4/3 to calculate the equivalent outputcapacitance.

EQUATION 20: RESONANT ELEMENTS LR AND CR RELATIONSHIP

0.5 LR IPRIMIN2 CR> VINMAX

2⋅ ⋅ ⋅

LR IPRIMIN2 CR> VINMAX

2⋅ ⋅

where:LR = equivalent leakage inductorCR = equivalent capacitor required to charge and

discharge= output capacitor of two switches in parallel with parasitic


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METHOD OF CONTROLAll switching converter output voltage is a function of theinput voltage, duty cycle and load current, as well asconverter circuit component values. The output voltageshould be constant regardless of variation in inputvoltage, load current and converter circuit parametervalues. The input voltage may vary from 90 VAC to 264VAC, and input frequency from 47 Hz to 63 Hz for anoff-line power supply, and -25% to +50% from thenominal value for the DC input supply. The load currentmay vary from no load to full load. In addition, the loadmay vary from no load to 50% load in step, and viceversa. The converter circuit components will have sometolerance. Despite variation, it is desired that the outputvoltage be within a certain limit. This is not practical toachieve without negative feedback, and setting the dutycycle to a single value. There are two basic methods tocontrol the duty cycle to keep the output voltage withinthe specified limit: voltage mode control and currentmode control.

Voltage Mode Control In voltage mode control, the output voltage ismeasured and then compared with the reference value(desired output voltage). The error is then processedby the compensation block to generate the next dutycycle value, as shown in Figure 29. This mode has onlyone control loop, so it is easy to design and analyze.However, in this control method, any change in the lineor the load must be first sensed as an output voltagechange and then corrected by the feedback loop.Therefore, the response is slow and the transientresponse (step load change) is not favorable. Addinginput voltage feed-forward to this control scheme willreduce the effect of input voltage variation in the output.

FIGURE 29: VOLTAGE MODE CONTROL

VOUT

VIN Load

Drive CircuitComparator

Block

VREFx

x

CompensatorBlock Output

VoltageVoltageFeed Forward

Block

VIN

-+

Reference

PWM


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Current Mode ControlThe current mode control technique requires twofeedback loops, as shown in Figure 30. In this mode,two parameters are measured for control purposes. Theoutput voltage is measured at the output capacitor or atthe load end (known as remote sensing). The outputinductor/primary switch current is also measured.
In current mode control, the output voltage is firstcompared with the reference voltage (desired outputvoltage). This error is then processed by thecompensation block to generate the reference signalfor the current loop. This current reference is comparedto the measured current. Any error generated by thecomparison of the reference generated by the voltagecompensation block and the actual current drawn from

the input is processed by the current compensationblock. This generates the required duty cycle tomaintain the output voltage within the specified limit. Ascurrent mode control senses the circuit current, anychange in output load current or the input voltage canbe corrected before it affects the output voltage.

Sensing the input current, which depends on inputvoltage, provides the inherent feed-forward feature.Current mode control provides inherent input currentsymmetry for the push-pull and bridge converters,inherent current limiting features and load sharingfeatures for multiple converters connected in parallel. Italso improves step load response and transientresponse because of the inner current loop.

FIGURE 30: CURRENT MODE CONTROL

TABLE 1: CONTROL METHODS AND CHARACTERISTICSMode Converter Speed Description

Voltage Buck, Forward Slow Output short protection, no pulse by pulse protection

Current Boost, Flyback, Push-Pull, Half- and Full-bridge

Fast Output short circuit and OC protection, pulse current protection

VOUTVIN

RS

Load

Drive CircuitCompensator

BlockIERR

CompensatorBlock Output

Voltage

Current

amplifiersense

Current sense amplifier with

isolation

IREFPWM

+-

RS

reference


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Power DiodeA power diode requires a finite time to change from theblocking state to the conduction state and vice versa.The time required to change its state, and how thediode current and voltage change during the transitionperiod affects the operation of circuitry. The shape ofthe waveform (voltage and current) and transition timedepends on diode intrinsic properties.
CHARACTERISTICS Figure 31 shows how the voltage and current varies inthe power diode during the transition period. During theperiod t1, space charge is stored in the depletion regiondue to the growth of forward current and removal ofreverse voltage. During period t2, because of diodeforward current, excess carriers distributed in the driftregion settle toward a steady state value. If a large ΔI/Δtis applied to the diode, voltage overshoot is observeddue to the presence of ohmic resistance in the driftregion, the inductance of the silicon wafer and thebonding wires attached to it. At the turn-off transition, as shown in Figure 31, andduring the period t3, the excess charge stored in thedrift region is removed before the junction becomesreverse-biased during period t4. This recombinationprocess of the depletion layer acquires a substantialamount of charge from the reverse-biased voltage. Aslong as there is excess charge in the drift region diode,it will be forward-biased.

After the t4 junction becomes reverse-biased, and afterthe time period t4, the diode current no longer goesnegative and quickly falls and becomes zero after t5.Reverse recovery current reaches its maximum valueat the end of t4. In almost all of the power circuitconfigurations, this reverse recovery current of thediode will flow through the next MOSFET to turn ON.So, while fixing the MOSFET current rating, the reverserecovery current of the diode must be added.A Schottky diode is a majority carrier device and has nostored minority carrier; therefore, a Schottky diodeturns ON and OFF faster than a PN junction powerdiode. A Schottky diode also improves the switchingcharacteristics and the forward voltage drop of thediode by placing a thin film of metal in direct contactwith a semiconductor.The forward voltage drop of a Schottky diode is0.3-0.4V, and has a larger reverse current than thecomparable silicon power diode. Because of itsphysics, the breakdown voltage of the Schottky diodeat present cannot be more than 150-200V. At turn-offthere will be no reverse recovery current because thereis no stored charge. Ohmic resistance of the drift regionis much less than that of the PN junction diode,resulting in considerably less voltage overshoot duringdevice turn ON. The diode total loss in the circuit is given byEquation 21, which consists of forward voltage droploss, reverse recovery loss, and reverse leakagecurrent loss.

FIGURE 31: POWER DIODE SWITCHING CHARACTERISTICS

QRR = IRR • TRR/2 0

VF

0

VON

t

VFP

~ ~

t1 t2

t4 t5

TRR

IRR

VRR

VR

IFIF

t

~ ~

ΔIF/ΔT

t3


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EQUATION 21: DIODE LOSS
MOSFETAppreciable current carrying capability, high reverseblocking voltage, very low ON resistance and fastswitching capabilities make a MOSFET an ideal choiceas a switching element in SMPS topologies.

A MOSFET is a majority carrier and a voltage drivendevice, whereas a Bipolar Junction Transistor (BJT) isa minority carrier and a current driven device. The ONstate resistance of a MOSFET has no theoretical limit,so the ON state loss can be far lower than a BJT. TheON and OFF switching time of a MOSFET depends onthe presence or absence of a key charge quantity in thedevice, and is equal to the time required to insert orremove this controlling charge quantity.

The total amount of controlling charge in the majoritycarrier device is much less than the charge required inthe equivalent minority carrier device. This causes themajority charge carrier device to turn ON and OFFfaster than a minority carrier device. A MOSFET haspositive temperature coefficient for the ON stateresistance, which makes it easy to parallel many smalldevices to deliver higher current. Figure 32 shows anequivalent circuit diagram of a MOSFET with aparasitic capacitor and body diode.

FIGURE 32: MOSFET

The turn-on switching waveforms of the drain-to-sourcevoltage and drain current with gate-to-source voltageare shown in Figure 33. The rate of change of draincurrent depends on the rate at which the gate-to-sourcecapacitor is charged by the gate drive circuit.

The time required to charge the gate capacitor to VGTH(gate threshold voltage) is known as turn-on delay (td).This assumes the gate drive voltage rises from zero toVG at t = t0, and it is driving the MOSFET gate throughgate resistance RG.

After CGS is charged to VGTH, the drain current beginsrising from zero to the rated value. During this period,the gate current charges both capacitors, CGS andCGD. The drain-to-source voltage remains at VDS solong as the drain current (ID) reaches the rated value(ID). The time required for drain current to reach itsrated value ‘ID’, as shown in Figure 33, is known as thecurrent rise time TRI. When drain current reaches ID,VGS is clamped to VGSID, as shown in Figure 33, andthe entire gate current starts flowing through CGD tocharge it. This causes the drain-to-source voltage VDSto drop. The rate of change of VDS is given byEquation 22.

EQUATION 22: RATE OF CHANGE OF VDS

VDS decreases VD to VDSON in two intervals. The firstinterval is known as the active region and the secondinterval is known as the transient ohmic region. Oncethe MOSFET enters the ohmic region, thegate-to-source voltage starts to rise toward VG, whilesimultaneously, the gate current decays to zero. In apractical system, the freewheeling diode has somereverse recovery current IRR. At this moment, duringthe drain current rising period, the drain current rises tothe value ID + IRR, and then VDS starts to decay toVDSON. After the decay of the reverse recovery currentto zero, ID clamps to LD.

The sequence is reversed when the MOSFET is turnedOFF. The gate-to-source voltage first decays to VGSID,and then the drain-to-source voltage starts risingtoward VDS, as shown in Figure 34. When thedrain-to-source voltage reaches its rated value, VDS,the drain current begins to decay toward zero, and thegate-to-source voltage and gate current decays tozero, as shown in Figure 34. The time required for thegate source voltage to reach VGSID is known as turn-offdelay.

PLOSS VF IFAVG 0.5 t5 VR IREC F IREVAVG VR⋅+⋅ ⋅ ⋅ ⋅+⋅=where:PLOSS = Total diode lossVF = Forward voltage dropIFAVG = Average forward currentVR = Reverse blocking applied across the diodeIREC = Peak reverse recovery current

Gate (G)

Drain (D)

Source (S)

CGD CDS

CGS

IGATEVG VGSID–( )

RG---------------------------------=

VDSΔtΔ

-------------IG

CGD-----------=


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MOSFET LOSSESThere are three types of losses in a MOSFET:conduction loss, switching loss and gate charge loss.At low frequencies, conduction loss is dominant, but aswe begin switching at frequencies between 100-150kHz, switching and gate charge losses startcontributing a significant amount of power dissipation.The total losses in a MOSFET in power electroniccircuitry is given by Equation 23.
Conduction Loss Conduction loss depends on the ON state resistance ofMOSFET (RDSON), which can be reduced by selectinga low RDSON MOSFET.

Switching LossThe switching losses of the MOSFET are given by thearea under the waveforms of VDS and ID, shownshaded in Figure 33 and Figure 34, and the chargestored in the parasitic output capacitor CDS during theturn OFF period of the MOSFET. The switching lossesof the MOSFET can be reduced by selecting aMOSFET with lower CDS capacitance and shifting thecurrent ID and the voltage VDS waveform to reduce theoverlap period during transition.

Gate Charge LossGate charge loss is caused by charging the gatecapacitance and then dumping the charge to ground inevery switching cycle.

APPLICATION CONSIDERATIONSA lower RDSON device comes with high gatecapacitance and the driver has to charge bigger gatecapacitance, which means a longer turn-on andturn-off time, resulting in more switching losses. Thegeneral rule of faster switching time to reduce theswitching loss will cause high frequency noisebecause of high ΔV/Δt and high ΔI/Δt, which maycause an increase of the EMI filter size.

The safe operating area (SOA) of a MOSFET isdecided by maximum drain current IDMAX, Internaljunction temperature TJ, and the breakdown voltageBVDS rating. There is no second breakdown voltage ina MOSFET as in the case of IGBT, and the SOA of theMOSFET remains the same in the reverse direction. Inaddition, a MOSFET can conduct in either directionwhile keeping the same RDSON.

While selecting a MOSFET driver, care must be takento ensure that the driver can source and sink themaximum peak current required by a MOSFET gate toturn ON and OFF in a given specified time. A MOSFETgate needs large current as the device turns ON, andfor the rest of the period, a high gate-to-source voltageat low current level.

EQUATION 23: MOSFET LOSS

PSW IDRMS

2 RDSON 0.5 VDS ID TRISE TFALL+( ) fSW 0.5 VDS2 CDS fSW QGTOTAL VG fSW⋅ ⋅+⋅ ⋅ ⋅+⋅ ⋅ ⋅ ⋅+⋅=

where:IDRMS = Drain RMS currentTRISE = Rise timeTFALL = Fall timefSW = Switching frequencyQGTOTAL = Total gate chargeCDS = MOSFET output capacitorVDS = Drain-to-source voltageID = Drain currentVG = Gate voltageRDSON = ON state resistance of the MOSFET


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FIGURE 33: MOSFET TURN ON CHARACTERISTICS
FIGURE 34: MOSFET TURN OFF CHARACTERISTICS

τ1 = RG(CGD + CGS)

VG

VGS(ID)

0

0td(on)

VGS(th)

ID

VD

t

t

VGS(t)

IG(t)

TRI

VDS(on)

IG(t)

VGS(t)

TFI

ID(t)

VDS(t)

ID

t

t

VDS

VG


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SnubbersThere are two basic ways to solve the problem of asemiconductor device that is stressed beyond itsrating. Either the device can be replaced with a higherrated device to meet the stress level, or a snubbercircuit can be added to reduce the stress to a safe level.Both options are trade-offs between cost, availability ofthe higher rated device, complexity, component countand the cost of using a snubber circuit.
A snubber circuit is typically used to limit the rate of riseof voltage (ΔV/Δt), the voltage applied across thedevice during turn-off, the rate of rise of current (ΔI/Δt)and the current through the device during turn-on.Figure 35 shows some of the popular snubber circuitryused across the transformer primary in a single switchpower converter application to limit the ΔV/Δt andblocking voltage applied across the MOSFET duringturn-off.

The simple design of the RCD snubber, as shown inFigure 35 (A), is to first choose the capacitor CS largeenough so that it contains negligible switching ringing,and then choose RS so that the power dissipated in RSat VS (voltage across the capacitor CS) is equal to theswitching loss caused by the leakage inductance asgiven in Equation 24.

FIGURE 35: TURN OFF SNUBBERS

EQUATION 24: SNUBBER RESISTOR SELECTION

Figure 36 shows the common turn-off snubber circuitryused to limit the ΔV/Δt and reduce the switching lossesin the MOSFET. When the MOSFET turns OFF, someof the peak current starts flowing through CS, whichcauses it to slow the drain voltage rise time, and reducethe area under the VDS and ID during turn-off time. CShas to completely discharge during the minimum TONtime of the MOSFET, which limits the maximum valueof CS that can be used, is given by Equation 25.

EQUATION 25: SNUBBER CAPACITOR

When the MOSFET turns OFF, CS charges to voltageVS, so energy is dissipated during each switching cyclein the snubber resistor is given by Equation 26.

EQUATION 26: SNUBBER POWER LOSS

FIGURE 36: MOSFET TURNS OFF SNUBBER

VINVINVIN

111

Q

(A)(B)

where:I = The current flowing through the transformer primary

just before the MOSFET turns offLLK = LLEAKAGE inductance of the transformer

VS2

RS-------- 0.5 LLK I2 fSW⋅ ⋅ ⋅=

where:RS = Snubber resistorCS = Snubber capacitorTONMIN = Minimum ON time of switch

CSTONMIN

4 RS⋅--------------------=

PRS 0.5 VS2 CS fSW⋅ ⋅ ⋅=

where:VS = Voltage across the snubber capacitor CS

fSW = Switching frequency

CS

RSDS

Q


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MAGNETICS DESIGNThis section covers the basics of magnetic design usedin SMPS applications. After selecting the topology thatis best suited to the power supply specification, thenext choice is to fix the switching frequency andtransformer core size. To do this, it is necessary toknow the numerical relation between maximumavailable power and transformer parameters such asmagnetic core area, magnetic length, window area,bobbin area, peak flux density and coil current density.

There are two types of magnetic losses: hysteresis andeddy current. Ferrite has high electrical resistivity, sotypically there are only negligible hysteresis and eddycurrent losses. This makes ferrite a good material touse for a switching frequency of 10 kHz to 1 MHz.

Table 2 lists some of the pros and cons of the magneticmaterial used in high frequency transformer andinductor design.

TABLE 2: MAGNETICS MATERIAL AND THEIR CHARACTERISTICSMaterial Pros Cons

Ferrite High permeability, thus can be used to generate high inductance, permeability is relatively constant with flux density, and variety of ferrite is available optimized for minimum power dissipation for various frequencies. Generally used for power transformers.

Ferrite saturates hard

Molyperm MPP Soft saturation, a wide variety of different permeability is available. Generally used for power Inductors.

Considerably higher losses than ferrites

Powdered Iron Variety of permeability is available, and it is less expensive than the MPP. Generally used for power inductors where cost is more important.

Saturates slightly harder than MPP, a powdered iron core inductor will be larger in size than an inductor made from MPP or ferrite.


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Transformer DesignTransformer size depends on many parameters suchas: core loss, copper loss, cooling efficiency, insulation,core geometry, and the maximum throughput power.Core loss increases as the flux density swings and thecore size increases. Copper loss increases as the fluxdensity and core size decreases. When operating at ornear 100 kHz, maximum efficiency occurs at 40-45% ofcore loss and 55-60% of copper loss.
The first step in the transformer design is to fix the coreand the bobbin size. The power rating of the core isrelative to the product of the core window area and thecore cross-sectional area (known as the area product),which is readily available from the core manufacturer.

The window area used for the primary winding is givenby the primary area factor KP and primary utilizationfactor KU. The numerical relation between the coregeometry, area product and power output is given byEquation 27.

EQUATION 27: CORE GEOMETRY AND POWER OUTPUT RELATIONSHIP

Once the numerical relation is known, the area productcore size can be selected. The number of primary turnsis given by Equation 28.

EQUATION 28: TRANSFORMER PRIMARY NUMBER OF TURNS

The number of secondary turns for the center taptransformer is given by Equation 29.

EQUATION 29: TRANSFORMER SECONDARY NUMBER OF TURNS

When testing the transformer in the actual application,some fine tuning may be required to improve its overallperformance. For a given transformer, if the power lossin the core is much less than copper loss (primary andsecondary together), decreasing the number of turnswill be required. This interim increases the flux density.And, if core loss in substantially lesser than copperloss, an increase in the number of turns is required,which reduces the flux density to optimize the total loss(core loss plus copper loss). The winding area in theprimary and secondary should be proportional to theirlosses. If multiple secondary windings are present, thewinding area should be proportional to the copper loss.

where:AE = Core cross section areaAW = Core window areaAP = Area productPIN = Power input = power outputDMAX = Maximum duty cycle of switchK = KP • KU • KT = overall copper utilization factorJ = Current density of primaryfSW = Switching frequencyB = Change in flux density during ON timeKT = Ratio of primary average to RMS current

AP AE AW PINDMAX

K J fSW BΔ⋅ ⋅ ⋅( )---------------------------------------- 108 CM

4⋅ ⋅ ⋅=⋅=

NP VINMINTONMAXAE BΔ⋅( )

-----------------------⋅=

NS VONP

VINMIN 2 DMAX⋅ ⋅( )--------------------------------------------------⋅=


AN1114
Inductor DesignAn inductor is a magnetic component that has a singlewinding in its core and carries a primarily DC currentalong with AC ripple, which is generally very smallcompared with DC current. For power inductors, atoroid is the most commonly used core geometry.
For a power inductor design, two parameters must beknown: the inductance required with the DC bias andthe value of the DC current. The following proceduredefines how to choose the core size and the number ofturns required. The design example is based on theMPP core selector chart from the manufacturerMAGNETICS (see Figure 37).

1. Calculate the energy storage requirement forthe inductor. The data provided by themanufacturer is L • I2; therefore, compute E =L • I2, where L is the inductance value and I isthe DC current flowing through the inductor. Forexample, the required inductance of 500 µH for3 amps DC current would be: E = 4.5 mJ.

2. Locate the value E in the core selector chart, asshown in Figure 37. This graph is provided bythe manufacturer. Follow this coordinate to theintersection with the first core size. Here itpasses through the 125µ section of permeabilityand the smallest core that can be used is the55310 MPP core.

3. Calculate the number of turns from the AL value,given by the core manufacturer.

4. Calculate the magnetic field strength in oerstedsfrom the magnetic data sheet provided by themanufacturer.

5. From the permeability versus DC bias curve,determine the percentage of initial permeability.

6. Calculate the actual number of turns required,based on initial permeability value.

EQUATION 30: INDUCTOR NUMBER OF TURNS

FIGURE 37: ENERGY VERSUS CORE SIZE

NLREQUIRED 106⋅

AL------------------------------------------=

N 0.5 106

90--------⋅=

N 75 turns=

27.8125---------- 75 3 50.04=⋅ ⋅

N 89=

55868554405509155083

5507155586

55310

55378

55045

550355527555285

55235

55175

55135

0.0001 0.001 0.01 0.1 1 10 100 1000

LI2, mH-amperes2

Cor

es L

iste

d by

Geo

met

ry F

acto

r

55908551915511155716

5507655894

55350

5520455118

55125552855540555025

55015

55145

300µ

200µ160µ

125µ

60µ

26µ

MPP Core Selector Chart


AN1114
Selection of CapacitorsThe selection of the input bulk capacitor dependsmainly on the hold-up time required from the powersupply, and the ripple RMS current rating of thecapacitor. Selection of the output capacitor depends onthe maximum operating RMS current, switchingfrequency, lifetime and the type of the converter used.
The Equivalent Series Resistor (ESR) of the outputcapacitor directly affects the output ripple voltage andlife of the capacitor. Figure 38 shows the current andvoltage waveform across the output capacitor, whichhas a ΔI ripple amplitude centered at the output loadcurrent IOUT. The product of ΔI with the ESR of thecapacitor provides the peak-to-peak ripple voltage ΔVat the output voltage.

The life of the capacitor doubles with every 10 degreedrop in temperature from its rated value. For example,if the capacitor is rated at 5000 hours at 105°C, it wouldhave a life span of 5000 • 24, which equals 80,000hours at a 65°C operating temperature.

Table 3 shows the type of capacitors and theapplications where they are typically used.

FIGURE 38: INDUCTOR CURRENT AND OUTPUT CAPACITOR VOLTAGE WAVEFORM

VOUT

IOUT

IOUT

ΔI

ΔV

TABLE 3: CAPACITORS AND THEIR CHARACTERISTICSType of Capacitor Typical Application

Aluminum Electrolytic Generally used at converter input and output where capacitance required is large and size of the capacitor is not important.

Tantalum Generally used at output of converter where it requires high ripple current RMS rating and low ESR of capacitor and size and footprint requirement is very small. It generally comes in a SMD package.

Ceramic and Multilayer Ceramic Used for signal and timing application. Used in parallel with electrolytic capacitor for noise filter.

Film, Polypropylene Generally used for safety application like X- and Y-type capacitors.


AN1114

ELECTROMAGNETIC INTERFERENCE (EMI) IN SMPSOne of the biggest challenge faced by a power supplyengineer is to design a power supply that meets thespecification, which calls for EMI and EMC limits. In thisapplication note, only EMI and more particularly,practical aspects of EMI are discussed.

There are two types of noise: conducted and radiated.The most fundamental difference is that the conductednoise is carried by the conductor and the radiated noisedoes not rely on the conductors.

Best PracticesA good PCB layout and good wiring practice drasticallyreduces the radiated noise. The high frequency currentloop should be short. A twisted pair of conductorsshould be used. A transformer and an inductor with airgap should be screened to reduce the radiatedmagnetic field. The best practice is to keep the line andreturn path for any signal as close as possible to eachother, since signal level is directly proportional to theloop area formed by the signal wires. Also, use metalfor the enclosure box material.

There are two types of conducted noise: the differentialmode noise that flows in one power line and returns onthe other, as shown in Figure 39 (A), and the differentialmode current delivering energy to the load. Commonmode noise flows on both power lines simultaneously,as shown in Figure 39 (B). Common mode currentdoes not deliver energy.

FIGURE 39: COMMON AND DIFFERENTIAL MODE NOISE

Place a current probe around both wires to measurethe common mode current in the circuit, as shown inFigure 40 (A). Now place the power line in thecurrent probe and make a twist in the returns path,and then place the current probe to measure thedifferential mode current, as shown in Figure 40 (B).If the common mode current measures 100 µA at300 kHz, and differential mode current is 1 mA, theratio is 1:10. If the total noise voltage measured at300 kHz is: 101 ΔBµV = 110000 µV = 110 mV, it willcontain 100 mV differential and 10 mV commonmode noise.

FIGURE 40: MEASUREMENT OF COMMON AND DIFFERENTIAL MODE NOISE

Common Sources of Noise GenerationFigure 41 shows some of the common sources of noisegeneration. The conducted electrical noise is mainlycaused by parasitic electrostatic and electromagneticcoupling between high frequency switching elementsand the ground plane.

The major sources for common mode noise are:

• High ΔV/Δt switching in the MOSFET• High-frequency switching transformer• Output rectifier reverse recovery

The differential noise is suppressed by an inputelectrolytic capacitor and a large decoupling capacitorin parallel with the input bulk capacitor. The commonmode current is introduced to earth ground byinsulation leakage in the transformer and the parasiticcoupling. The maximum value of ground leakagecurrent (filter capacitor CY1 and CY2) that can be placedis limited by regulatory agencies.

VIN

VIN

+

+

Earth

Earth

Noise

Noise

RTN

RTN

(A) Differential mode noise

(B) Common mode noise

VIN

Current probe

RTN(B)

VIN

Current probe

RTN

(A)


AN1114
NOISE REDUCTION METHODSThe parasitic capacitors, CP1 through CP5, shown inFigure 41, introduce common mode noise to theground line. To reduce noise, the transformer shouldhave a Faraday screen, which should return to theinput DC line.
The heat sink of the switching device is one of themajor sources of noise. Therefore, an insulating padshould be used to reduce parasitic capacitancebetween the MOSFET and heat sink.

All high voltage components should be isolated fromthe ground plane.

To minimize the EMI filter inductor size, the largestdecoupling capacitor value should be used.

To reduce noise generated due to high ΔV/Δt andΔI/Δt, a snubber circuit is sometimes added inparallel across the switching device.

A high permeability core is used for a common modeinductor to provide high common mode inductance, aswell as carry the line input current in the smallest core.

The winding of a common mode inductor is physicallyseparated, and a bobbin with two isolation sections isused to meet safety requirements and to have leakageinductance between the two windings. This leakageinductance will help in suppressing differential noise.

The self-resonant frequency of the common modeinductor should be as high as possible to maintain goodhigh frequency rejection. To meet this, interwindingcapacitance should be as low as possible. For thisreason, a high permeability ferrite toroidal core with asingle layer can be used to avoid interwindingcapacitance, and having a one or two turn difference inthe two windings to create leakage inductance todifferential noise.

To know what value of inductor to start with, measurethe value of the largest noise voltage in the system withonly a filter capacitor present, and then decide thevalue of the inductor required to bring it down to anacceptable limit at that frequency. The losses in thecommon inductor will be only copper loss, as the coreinductor and skin effect are negligible.

FIGURE 41: SOURCE OF COMMON AND DIFFERENTIAL MODE NOISE

X-capacitor

CY1 CY2

CP3CP5

DiodeBridge

Y-capacitor

CP4

CP2

CP1


AN1114

SUMMARYThe appropriate SMPS topology can be selected basedon input voltage, output power, and output current (seeTable 4).

The selection of topology may differ to meet some ofthe specific requirements of the power supply includingcost, size and personal experience of the designer.

TABLE 4: SMPS TOPOLOGY SELECTION GUIDELINESInput voltage Output power Preferred Topology

Universal input (90-264) VAC Po < 150 watt, Load current < 10A Flyback, ForwardUniversal input (90-264) VAC Po < 150 watt, Load current > 10A ForwardUniversal input (90-264) VAC 150 watt < Po > 350 Two-Switch Forward, Half-Bridge, Push-PullUniversal input (90-264) VAC Po < 500 watt Half-Bridge, Push-PullVin > 350 VDC Po < 750 watt Half-BridgeVin < 200 VDC Po < 500 watt Push-PullVin > 350 VDC 500 < Po > 1000 watt Full-BridgeVin > 350 VDC Po > 1000 watt ZVT Full-BridgeVin > 350 VDC Po > 2000 watt More than one ZVT full-bridge in parallel,

interleaved with more than one ZVT full-bridge


AN1114

APPENDIX A: GLOSSARY

Bipolar Junction Transistor (BJT)A BJT is a three-terminal device constructed of dopedsemiconductor material and may be used in amplifyingor switching applications.

Boost ConverterA basic SMPS topology in which energy is stored in ainductor when a switch is ON, and is transferred to theoutput when the switch is OFF. It converts anunregulated input voltage to a regulated output voltagehigher than the input.

Buck ConverterA basic SMPS topology in which a series switch chopsthe input voltage and applies the pulses to anaveraging LC filter, which produces a lower outputvoltage than the input.

Constant Output VoltageA mode of operation when output voltage is regulatedregardless of any other parameter changes in thesystem.

Current Mode ControlA control method which is using a dual loop circuit toadjust the PWM operation.

Electromagnetic Interference (EMI)Unwanted energy, in the form of electrical noisegenerated from the SMPS, which may be conducted orradiated.

Faraday ShieldAn electrostatic shield between input and outputwindings of a transformer. This is used to reduceprimary to secondary coupling capacitance, which inturn will reduce output common mode noise.

Feed ForwardA term describing a system that reacts to changes in itsenvironment, usually to maintain some desired state ofthe system. Also, it is a system that exhibitsfeed-forward behavior that responds to a measureddisturbance in a predefined way, in contrast with afeedback system.

Flyback Converter (FBT)An isolated Buck-Boost SMPS topology in which,during the first period of a switching cycle, the energyis stored in a magnetizing inductance of thetransformer. Then, during the second period, thisenergy is transferred to a secondary winding of thesame half-bridge resonant converter where the load isconnected in series with the resonant tank capacitor, C,and into the load.

Forward ConverterA Buck-derived SMPS topology in which energy istransferred to the secondary of a transformer windingand into the load, when the switching transistor is ON.

Full-Bridge Converter An SMPS topology in which four switches areconnected in a bridge configuration to drive the primaryof a transformer. This is also known as an H-BridgeConverter.

H-Bridge ConverterSee Full-Bridge Converter.

Half-Bridge ConverterA SMPS topology similar to a full-bridge converter inwhich only two switches are used. The other two arereplaced by capacitors.

Half-Bridge LLC Resonant ConverterA SMPS half-bridge topology where the seriesresonant tank consisting of the inductor, L, and thecapacitor, C, which is used to generate anotherresonant frequency with transformer magnetizinginductance.

Half-Bridge Resonant ConverterA half-bridge converter using an LC resonant tank toreduce the switching losses in the MOSFET.

H-Bridge Phase-Shift ZVT ConverterA full-bridge converter using the phase-shift ZVStechnique is known as an H-Bridge Phase-Shift ZVTtopology. In this topology, the parasitic output capacitorof the MOSFETs and the leakage inductance of theswitching transformer are used as a resonant tankcircuit to achieve zero voltage across the MOSFET atthe turn-on transition.


AN1114
LLC Resonant ConverterA full-bridge converter with an LC resonant tank, whichis used to reduce switching losses and the phase shiftbetween the two leg gate pulse defined in the outputpower flow.
Parallel Resonant Converter (PRC)A half-bridge resonant converter where the load isconnected in parallel with the resonant tank capacitor, C.

Power DiodeA power diode is a unidirectional semiconductor switch,which has only one PN junction. A power diode is ableto carry a large amount of current and typically is ableto support a large reverse-bias voltage in the OFFstate.

Power Factor Correction (PFC)PFC is a technique of counteracting the undesirableeffects of electric loads that create a power factor thatis less than 1.

Push-Pull ConverterAn SMPS topology which is using usually a center-taptransformer and two switches that are driven ON andOFF alternately.

Series Resonant Converter (SRC)A half-bridge resonant converter where the load isconnected in series with the resonant tank capacitor, C.

SnubberA component or a circuit, active or passive, dissipativeor regenerative used in a SMPS to reduce componentsstress by limiting peak voltage or current, ΔV/Δt, ΔI/Δt.

Switch Mode Power Supply (SMPS)A power supply technology in which a switching device,along with a passive component, is used to process thepower flow.

Total Harmonic Distortion (THD)The total harmonic distortion or THD, of a signal is ameasurement of the harmonic distortion present and isdefined as the ratio of the sum of the powers of allharmonic components to the power of the fundamental.

Two-Switch Forward ConverterUsed in series with the transformer primary to reducethe reverse blocking voltage of the switch.

Voltage Mode ControlA control method that uses a single loop to control theoutput.


AN1114
NOTES:

Note the following details of the code protection feature on Microchip devices:• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use. Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer’s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property rights.

© 2007 Microchip Technology Inc.

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DS01114A -page 47

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