Solar Cell

IMPROVING THE PERFORMANCE OF A GRID CONNECTED SINGLE PHASE PV INVERTER BY MITIGATING LOWER ORDER HARMONICS

2. PHOTOVOLTAIC SYSTEMS

2.1 BLOCK DIAGRAM OF PV SYSTEM

Fig 2.1: Block Diagram of PV System

The above diagram shows the block diagram of the PV STSTEM .The block

diagram consists of following blocks.

1. Solar cell array

2. Blocking diode

3. Converter

4. Battery Storage

2.1.1 Solar cell array

Solar array is the one which converts the solar radiation in to useful DC

electrical power.

2.1.1(A) Electricity from solar energy

Electricity is directly generated by utilizing solar energy by the photo voltaic process.

When photons from the sun are absorbed in a semi-conductor, they create free

electrons with higher energies than the electrons which provide the bonding in the

base crystal. Once these free electrons are created, there must be an electric field to

induce these higher energy electrons to flow out of the semiconductor to do useful

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work. The electric field in most solar cells is provided by a junction of materials

which have different electrical properties.

2.1.1(B) Solar electric power generation

The direct conversion of solar energy into electrical energy by means of the

photovoltaic effect, that is, the conversion of light (or other electromagnetic radiation)

into electricity. The photo-voltaic effect is defined as the generation of an

electromotive force as a result of the absorption of ionizing radiation. Energy

conversion devices which are used to convert sunlight to electricity by the use of the

photovoltaic effect are called solar cells. A single converter cell or, more generally, a

photovoltaic cell, and combination of such cells designed to increase the electric power

output is called a solar module or solar array.

Photovoltaic cells are made of semiconductors that generate electricity when

they absorb light. As photons are received, free electrical charges are generated that

can be collected on contacts applied to the surface of the semiconductors.

2.1.1(C) Solar cell principles

The photo-voltaic effect can be observed in nature in a variety of materials, but the

materials that have shown the best performance in sunlight are the semi-conductors as

started above. When photons from the sun are absorbed in a semiconductor, they

create free electrons with higher energies than the electrons which provide the

bonding in the base crystal. Once these electrons are created, there must be an electric

field to induce these higher energy electrons to flow out of the semi-conductor to do

useful work. The electric field in most solar cells is provided by a junction of

materials which have different electrical properties.

To obtain a useful power output from photon interaction in a semi-conductor

three processes are required.The photons have to be absorbed in the active part of the

material and result in electrons being excited to a higher energy potential.

1. The electrons-hole charge carrier created by the absorption must be physically

separated and moved to the edge of the cell.

2. The charge carriers must be removed from the cell and delivered to a useful

load before their loose extra potential.

For completing the above processes, a solar cell consists of:

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(a) Semi-conductor in which electron hole pairs are created by absorption of

incident solar radiation.

(b) Region containing a drift field for charge separation, and

(c) Charge collecting front and back electrodes.

The photo-voltaic effect can be described easily for p-n junction in a semi-

conductor. In an intrinsic semi-conductor such as silicon, each one of the four valence

electrons of the material atom is tide in a chemical bond, and there are no free

electrons at absolute zero. If a piece of such a material is doped on one side by a five

valence electron material, such as arsenic or phosphorus, there will be an excess

electrons in that side, becomes an n-type semi-conductor. The excess electrons will be

practically free to move in the semi-conductor lattice. When the other side of the same

piece is doped by a three valence electron material, such as boron, there will be

deficiency of electrons leading to a p-type semi-conductor. This deficiency is

expressed in terms of excess of holes free to move in the lattice. Such a piece of semi-

conductor with one side of the p-type and the other of the n-type is called a p-n

junction. In this junction after the photons are absorbed, the free electrons of the n-

side will tend to flow to the p-side, and the holes of the p-side will tend to flow to the

n-region to compensate for their respective deficiencies. This diffusion will create an

electric field EF from the n-region to the p-region. This field will increase until it

reaches equilibrium for Ve, the sum of the diffusion potentials for holes and electrons.

If electrical contacts are made with the two semi-conductor materials and the contacts

are connected through an external electrical conductor, the free electrons will flow

from the n-type material through the conductor to the p-type material. Here the free

electrons will enter the holes and become bound electrons thus, both free electrons

and holes will be removed. The flow of electrons through the external conductor

constitutes an electric current which will continue as long as more free electrons and

holes are being formed by the solar radiation. This is the basis of photo-voltaic

conversion, that is, the conversion of solar energy into electrical energy. The

combination of n-type and p-type semi-conductors thus constitutes a photo-voltaic

(PV) cell or solar cell. All such cells generate direct current which can be converted

into alternating current if desired.

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Fig 2.2: Schematic view of a Typical Solar cell

The most normal configuration for a solar cell to make a p-n junction semi

conductor is sunlight. This p-n junction is usually obtained by putting a p- type base

material into a diffusion furnace containing a gaseous n-type dopant such as

phosphorus and allowing the n-dopant to diffuse into the surface about 0.2µm. The

junction is thus formed slightly below the planer surface of the cell and the light

impinges perpendicular to the junction. The positive and negative charges created by

the absorption of photons are thus encouraged to drift to the front and back of the

solar cell. The back is completely covered by a metallic contact to remove the charges

to the electric load. The collection of charges from the front of the cell is aided by a

fine grid of narrow metallic fingers. The surface coverage of the conducting collectors

is typically about 5% in order to allow as much light as possible to reach active

junction area. An antireflective coating is applied on the top of the cell. The p-n

junction provides an electrical field that sweeps the electrons in one direction and the

positive holes in the other. If the junction is in thermodynamic equilibrium, then the

Fermi energy must be uniform throughout. Since the Fermi level is near the top of the

gap of an n-doped material and near the bottom of the p-doped side, an electric field

must exist at the junction providing the charge separation function of the cell.

Important characteristics of the Fermi level is that, in thermodynamic equilibrium, it

is always continuous across the contact between the two materials.

2.1.1(D) Conversion efficiency and power output

A solar cell usually uses a p-n junction its physical configuration is shown

schematically in fig.2.3.

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Fig 2.3: The Equivalent circuit of a Solar cell

Where

Ic = cell output current

Vc = cell output voltage

Iph = light generated current

Io = reverse saturation current

Rs = series resistance of the cell

Current and voltage relationship is given by

I i=I o[expV e

KT−1] (2.1)

Where

Io→Saturation current also called the dark current and is applied when a large

negative voltage is applied across the diode.

V → Voltage across junction.

e →Electronic charge

k → Boltzmann’s constant

T →Absolute temperature

When light impinges on the junction, electron hole pairs are created at a

constant rate providing an electrical flow across the junction. The net current is thus

the difference between the normal diode current and light generated current IL. The

internal series resistance Rs is mostly due to the high sheet resistance of the diffused

layer which is in series with the junction. The light generated current acts as a

constant current source supplying the current to either the junction or a useful load

depending on the junction characteristic and the value of the external load resistance.

The net current I is given by

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I=I L−I i=I L−I o[expV e

KT−1] (2.2)

The internal voltage drop in a cell can usually be minimized, and for ideal cell Rs may

be assumed equal to zero i.e. Rs=0. With these the corresponding I-V plot is given in

figure. Open circuit voltage Voc for the ideal cell is then given by

V oc=KTe

ln [ I L

I O

+1](2.3)

Since IL>>Io, the 1 in the equation can be neglected. Then open circuit voltage

V oc=KTe

ln [ I L

I O](2.4)

In practice the open circuit voltage of the cell decreases with increasing temperature.

The maximum power that can be derived from the device is given by

Pmax=Vmp.Imp (2.5)

Fig 2.4: A Typical I-V Plot for Ideal Solar cell

Where

Vmp and Imp are the voltage and current at maximum power point as shown in figure

respectively. It can be seen that the maximum efficiency for the cell is obtained by

dividing Vmp Imp by the total power density of the sunlight Psun.

Thus Ƞ ηmax=V mp I mp

P sun

(2.6)

= ( I L EG

eP sun)(V mp I mp

I lV OC)( eV OC

EG)

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[Where Eg= Forbidden energy gap]

The fill factor (FF) for a solar cell is defined as the ratio of two areas shown.

FF=V mp I mp

I lV OC

(2.7)

Solar cell designers, strive to increase the fill factor values, to minimize the internal

losses. Maximum – power can be defined in terms of Voc and IL is given by

Pmax= IL× VOC× FF (2.8)

A typical value of the fill factor for a good silicon cell is about 0.8.The voltage factor

(eVoc/Eg) is determined by the basic properties of the materials in the cell and typically

about 0.5 for a silicon cell.

2.1.2 Blocking diode

A Blocking Diode which lets the array – generated power flow only toward

the battery or grid. Without a blocking diode the battery would discharge back

through the solar array during times of no insulation.

2.2 PHOTOVOLTAIC SYSTEMS

A photovoltaic system is a system which uses one or more solar panels to

convert solar energy into electricity. It consists of multiple components, including the

photovoltaic modules, mechanical and electrical connections and mountings and

means of regulating and/or modifying the electrical output [8].

2.2.1 PHOTOVOLTAIC CELL

PV cells are made of semiconductor materials, such as silicon. For solar cells,

a thin semiconductor wafer is specially treated to form an electric field, positive on

one side and negative on the other. When light energy strikes the solar cell, electrons

are knocked loose from the atoms in the semiconductor material. If electrical

conductors are attached to the positive and negative sides, forming an electrical

circuit, the electrons can be captured in the form of an electric current - that is,

electricity. This electricity can then be used to power a load [10]. A PV cell can either

be circular or square in construction.

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Fig 2.5: Basic Structure of PV Cell

2.2.2 PHOTOVOLTAIC MODULE

Due to the low voltage generated in a PV cell (around 0.5V), several PV cells

are connected in series (for high voltage) and in parallel (for high current) to form a

PV module for desired output. Separate diodes may be needed to avoid reverse

currents, in case of partial or total shading, and at night. The p-n junctions of mono-

crystalline silicon cells may have adequate reverse current characteristics and these

are not necessary. Reverse currents waste power and can also lead to overheating of

shaded cells. Solar cells become less efficient at higher temperatures and installers try

to provide good ventilation behind solar panels [9].

2.2.3 PHOTOVOLTAIC ARRAY

The power that one module can produce is not sufficient to meet the

requirements of home or business. Most PV arrays use an inverter to convert the DC

power into alternating current that can power the motors, loads, lights etc. The

modules in a PV array are usually first connected in series to obtain the desired

voltages; the individual modules are then connected in parallel to allow the system to

produce more current [8].

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Fig 2.6: Photovoltaic system

2.3 MATERIALS USED IN PV CELL

The materials used in PV cells are as follows:

Single-crystal silicon

Single-crystal silicon cells are the most common in the PV industry. The main

technique for producing single-crystal silicon is the Czochralski (CZ) method. High-

purity polycrystalline is melted in a quartz crucible. A single-crystal silicon seed is

dipped into this molten mass of polycrystalline. As the seed is pulled slowly from the

melt, a single-crystal ingot is formed. The ingots are then sawed into thin wafers

about 200-400 micrometers thick (1 micrometer = 1/1,000,000 meter). The thin

wafers are then polished, doped, coated, interconnected and assembled into modules

and arrays [6].

Polycrystalline silicon

Consisting of small grains of single-crystal silicon, polycrystalline PV cells are less

energy efficient than single-crystalline silicon PV cells. The grain boundaries in

polycrystalline silicon hinder the flow of electrons and reduce the power output of the

cell. A common approach to produce polycrystalline silicon PV cells is to slice thin

wafers from blocks of cast polycrystalline silicon. Another more advanced approach

is the “ribbon growth” method in which silicon is grown directly as thin ribbons or

sheets with the approach thickness for making PV cells [6].

Gallium Arsenide (GaAs)

A compound semiconductor made of two elements: Gallium (Ga) and Arsenic (As).

GaAs has a crystal structure similar to that of silicon. An advantage of GaAs is that it

has high level of light absorptive. To absorb the same amount of sunlight, GaAs

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requires only a layer of few micrometers thick while crystalline silicon requires a

wafer of about 200-300 micrometers thick. Also, GaAs has much higher energy

conversion efficiency than crystal silicon, reaching about 25 to 30%.The only

drawback of GaAs PV cells is the high cost of single crystal substrate that GaAs is

grown on [6].

Cadmium Telluride (CdTe)

It is a polycrystalline compound made of cadmium and telluride with a high light

absorbility capacity (i.e. a small thin layer of the compound can absorb 90% of solar

irradiation).The main disadvantage of this compound is that the instability of PV cell

or module performance. As it a toxic substance, the manufacturing process should be

done by extra precaution [6].

Copper Indium Diselenide(CuInSe2)

It is a polycrystalline compound semiconductor made of copper, indium and

selenium. It delivers high energy conversion efficiency without suffering from

outdoor degradation problem. It is one of the most light-absorbent semiconductors. As

it is a complex material and toxic in nature so the manufacturing process face some

problem [6].

2.4 CHARACTERISTICS OF PV CELL

Fig 2.7: Equivalent circuit of a PV cell

An ideal is modeled by a current source in parallel with a diode. However no solar

cell is ideal and thereby shunt and series resistances are added to the model as shown

in the PV cell diagram above. RS is the intrinsic series resistance whose value is very

small. RP is the equivalent shunt resistance which has a very high value [4].

Applying Kirchhoff’s law to the node where Iph, diode, Rp and Rs meet, we get

I ph=I D+ I R P+ I (2.9)

We get the following equation for the photovoltaic current:

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I=I ph−I RP−I D (2.10)

I=I p h−I O .[exp(V + I RS

V T)−1]−[V + I RS

Rp](2.11)

Where, Iph is the Insolation current, I is the Cell current, Io is the Reverse saturation

current, V is the Cell voltage, Rs is the Series resistance, Rp is the Parallel resistance,

VT is the Thermal voltage (KT/Q ), K is the Boltzmann constant, T is the

Temperature in Kelvin, q is the Charge of an electron.

2.4.1 EFFICIENCY OF PV CELL

The efficiency of a PV cell is defined as the ratio of peak power to input solar power.

η=V mp . I mp

I ( KWm2 ) . A (m2)

(2.12)

where, Vmp is the voltage at peak power, Imp is the current at peak power, I is the

solar intensity per square metre, A is the area on which solar radiation fall.

The efficiency will be maximum if we track the maximum power from the PV

system at different environmental condition such as solar irradiance and temperature

by using different methods for maximum power point tracking.

2.5 MODELLING OF PV ARRAY:

The building block of PV arrays is the solar cell, which is basically a p-n junction that

directly converts light energy into electricity: it has a equivalent circuit as shown

below in Figure 2.8.

Fig 2.8: Equivalent circuit of a PV cell

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The current source Iph represents the cell photo current; Rj is used to represent the

non-linear impedance of the p-n junction; Rsh and Rs are used to represent the

intrinsic series and shunt resistance of the cell respectively. Usually the value of Rsh

is very large and that of Rs is very small, hence they may be neglected to simplify the

analysis. PV cells are grouped in larger units called PV modules which are further

interconnected in series-parallel configuration to form PV arrays or PV generators

[3].The PV mathematical model used to simplify our PV array is represented by the

equation:

I=np I ph−np Irs [exp( qKTA

∗V

ns)−1](2.13)

where I is the PV array output current; V is the PV array output voltage; ns is the

number of cells in series and np is the number of cells in parallel; q is the charge of an

electron; k is the Boltzmann’s constant; A is the p-n junction ideality factor; T is the

cell temperature (K); Irs is the cell reverse saturation current. The factor A in equation

(2.13) determines the cell deviation from the ideal p-n junction characteristics; it

ranges between 1-5 but for our case A=2.46 [3]. The cell reverse saturation current

Irs varies with temperature according to the following equation:

I rs=Irr( TT r

)3

exp( q EG

KA [ 1T r

− 1T ])(2.14)

Where Tr is the cell reference temperature, Irr is the cell reverse saturation

temperature at Tr and EG is the band gap of the semiconductor used in the cell.

The temperature dependence of the energy gap of the semi conductor is given by [25]:

EG=EG (0 ) ∝T2

T+β (2.15)

The photo current Iph depends on the solar radiation and cell temperature as follows:

I ph=[ I scr+K i (T−T r ) ] s100

(2.16)

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where Iscr is the cell short-circuit current at reference temperature and radiation, Ki

is the short circuit current temperature coefficient, and S is the solar radiation in

mW/cm2. The PV power can be calculated using equation (2.17) as follows:

P=IV =np I phV [( qKTA

∗V

ns)−1 ] (2.17)

2.5.1 PV ARRAY CHARACTERISTIC CURVES

The current to voltage characteristic of a solar array is non-linear, which

makes it difficult to determine the MPP. The Figure below gives the characteristic I-V

and P-V curve for fixed level of solar irradiation and temperature.

Fig 2.9: I-V and P-V curve characteristics.

The IV and PV curves for various irradiance but a fixed temperature (250C) is shown

below in Figure (2.9)& (2.10).The characteristic I-V curve tells that there are two

regions in the curve: one is the current source region and another is the voltage source

region. In the voltage source region (in the right side of the curve), the internal

impedance is low and in the current source region (in the left side of the curve), the

impedance is high. Irradiance temperature plays an important role in predicting the I-

V characteristic, and effects of both factors have to be considered while designing the

PV system. Whereas the irradiance affects the output, temperature mainly affects the

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terminal voltage. The figures (2.10), (2.11) give the simulated I-V and P-V

characteristic for various temperatures at a fixed irradiance at 1000 W/m2 [4].

Fig 2.10: I-V characteristic of a solar array for a fixed temperature but varying irradiance

Fig 2.11: P-V characteristic of a solar array for a fixed temperature but varying irradiance

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Fig 2.12: I-V Characteristic of a PV array under a fixed irradiance but varying temperatures

Fig 2.13: P-V Characteristic of a PV array under a fixed irradiance but varying temperatures

From the I-V and P-V curves, we observe that the short circuit current

increases with increase in irradiance at a fixed temperature. Moreover, from the I-V

and P-V curves at a fixed irradiance, it is observed that the open circuit voltage

decreases with increase in temperature.

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3. CONVERTERS

3.1 DC-DC CONVERTERS

DC-DC converters can be used as switching mode regulators to convert an

unregulated dc voltage to a regulated dc output voltage. The regulation is normally

achieved by PWM at a fixed frequency and the switching device is generally BJT,

MOSFET or IGBT. The minimum oscillator frequency should be about 100 times

longer than the transistor switching time to maximize efficiency. This limitation is

due to the switching loss in the transistor. The transistor switching loss increases with

the switching frequency and thereby, the efficiency decreases. The core loss of the

inductors limits the high frequency operation. Control voltage Vc is obtained by

comparing the output voltage with its desired value. Then the output voltage can be

compared with its desired value to obtain the control voltage Vcr. The PWM control

signal for the dc converter is generated by comparing Vcr with a saw tooth voltage

Vr. There are four topologies for the switching regulators: buck converter, boost

converter, buck-boost converter, and Cuk converter. However my project work deals

with the boost regulator and further discussions will be concentrated towards this one.

3.1.1 BOOST CONVERTER AND ITS OPERATION

The figure (3.1) below shows a step up or PWM boost converter. It consists of a dc

input voltage source Vg; boost inductor L, controlled switch S, diode D, filter

capacitor C, and the load resistance R. When the switch S is in the on state, the

current in the boost inductor increases linearly and the diode D is off at that time.

When the switch S is turned off, the energy stored in the inductor is released through

the diode to the output RC circuit.

Fig 3.1: Circuit diagram of boost converter

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(a) OFF STATE:

In the OFF state, the circuit becomes as shown in the Figure (3.2) below.

Fig 3.2: The OFF state diagram of the boost converter

When the switch is off, the sum total of inductor voltage and input voltage appear as

the load voltage.

(b) ON STATE:

In the ON state, the circuit diagram is as shown below in Figure (3.3):

Fig 3.3: The ON state diagram of the boost converter

When the switch is ON, the inductor is charged from the input voltage source Vg and

the capacitor discharges across the load. The duty cycle, D=(Ton/T), where T=1/f.

Fig 3.4: Inductor current waveform

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Fig 3.5: Inductor voltage waveform

From the inductor voltage balance equation, we have:-

Vg(DTs) +(Vs-Vo)(1-D)Ts=0

Vg(DTs)-Vg(DTs)-Vg Ts+ Vo DTs-Vo Ts=0

Vo=Vg/(1-D)

Conversion ratio, M=Vo/Vg=1/(1-D) (3.1)

From inductor current ripple analysis, change in inductor current

From inductor current ripple analysis, change in inductor current,

Δ Il=(Imax-I min)

Δ IL=(Vg/L)*(DTs)

Δ IL = (Vg D)/ (fs L)

L=Vg D/ fs ( IL) (3.2)

The boost converter operates in CCM (continuous conducting mode) for L> Lb where

Lb=(1−D )2 DR

2 f(3.3)

The current supplied to the output RC circuit is discontinuous. Thus a large filter

capacitor is used to limit the output voltage ripple. The filter capacitor must provide

the output dc current to the load when the diode D is off.

The minimum value of the filter capacitance that results in the voltage ripple Vr is

given by:

Cmin=D V O

V O RF(3.4)

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3.2 INVERTERS

The inverter provides ac Load voltage from a dc Voltage source. The semi-

conductor switches can be BJTs, thyristors, Mosfets, IGBTs etc. The choice of

power switch will depend on rating requirements and ease with which the

device can be turned on and off. A single-phase inverter will contain two or

four power switches arranged in half-bridge or full-bridge topologies. Half-

bridges have the maximum ac voltage limited to half the value of the full dc

Source voltage and may need a centre tapped source. Full-bridges have the full dc

Source voltage as the maximum ac Voltage Where the dc Source voltage is low, e.g.

12V or 24V, the voltage drop across the conducting power switches is

significant and should be taken into account both in calculation and in selection

of the switch. The ac load voltage of the inverter is essentially a square wave,

but pulse- width-modulation methods can be used to reduce the harmonics and

produce a quasi-sine wave. If higher ac Voltages than the dc source voltage are

required, then the inverter will require a step-up transformer. The output frequency

of the inverter is controlled by the rate at which the switches are turned on

and off, in other words by the pulse repetition frequency of the base, or gate,

driver circuit. Thyristors would only be used in very high power inverters,

since on the source side there is no voltage zero, and a forced commutation

circuit would be required to turn the thyristor off. Some typical single-phase

inverters are considered in the following sections. The switching device shown is a

BJT, but could be any switch, the choice being determined by availability of

required rating and ease of turn-on and turn-off. Care must be taken not to

have two switches 'on' together, shorting out the dc source. There must be

either a dead-time between switches or an inhibit circuit to ensure this does

not happen.

The main objective of static power converters is to produce an ac output waveform

from a dc power supply. These are the types of waveforms required in adjustable

speed drives (ASDs), uninterruptible power supplies (UPS), static var compensators,

active filters, flexible ac transmission systems (FACTS), and voltage compensators,

which are only a few applications. For sinusoidal ac outputs, the magnitude,

frequency, and phase should be controllable. According to the type of ac output

waveform, these topologies can be considered as voltage source inverters (VSIs),

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where the independently controlled ac output is a voltage waveform. These structures

are the most widely used because they naturally behave as voltage sources as required

by many industrial applications, such as adjustable speed drives (ASDs), which are

the most popular application of inverters; see Fig. Similarly, these topologies can be

found as current source inverters (CSIs), where the independently controlled ac output

is a current waveform. These structures are still widely used in medium-voltage

industrial applications, where high-quality voltage waveforms are required.

3.3 SINGLE-PHASE VOLTAGE SOURCE INVERTER

Single-phase voltage source inverters (VSIs) can be found as half-bridge and

full-bridge topologies. Although the power range they cover is the low one, they are

widely used in power supplies, single-phase UPSs, and currently to form elaborate

high-power static power topologies, the main features of both approaches are

reviewed and presented in the following

3.3.1 Half-Bridge VSI

Fig3.6 shows the power topology of a half-bridge VSI, where two large

capacitors are required to provide a neutral point N, such that each capacitor

maintains a constant voltage vi/2. Because the current harmonics injected by the

operation of the inverter are low-order harmonics, a set of large capacitors (C+ andC-)

is required. It is clear that both switches S+ and S- cannot be on simultaneously

because a short circuit across the dc link voltage source vi would be produced. There

are two defined (states 1 and 2) and one undefined (state 3) switch state as shown in

Table 3.1. In order to avoid the short circuit across the dc bus and the undefined ac

output voltage condition, the modulating technique should always ensure that at any

instant either the top or the bottom switch of the inverter leg is on.

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Fig 3.6: Single phase half-bridge VSI.

TABLE3.1 Switch states for a half-bridge single-phase VSI

Fig 3.7: Ideal waveforms of the half-bridge inverter

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The ideal waveforms associated with the half-bridge inverter shown in Fig. The states

for the switches S+ and S- are defined by the modulating technique, which in this case

is a carrier-based PWM.

3.3.2 Full-Bridge VSI

Fig3.8 shows the power topology of a full-bridge VSI. This inverter is similar

to the half-bridge inverter; however, a second leg provides the neutral point to the

load. As expected, both switches S1+ and S1- (or S2+ and S2-) cannot be on

simultaneously because a short circuit across the dc link voltage source vi would be

produced. There are four defined (states 1, 2, 3, and 4) and one undefined (state 5)

switch states as shown in Table 3.2.

Fig 3.8: Single-phase full bridge VSI.

TABLE 3.2 Switch states for a full-bridge single-phase VSI

The undefined condition should be avoided so as to be always capable of

defining the ac output voltage. In order to avoid the short circuit across the dc bus and

the undefined ac output voltage condition, the modulating technique should ensure

that either the top or the bottom switch of each leg is on at any instant. It can be

observed that the ac output voltage can take values up to the dc link value vi, which is

twice that obtained with half-bridge VSI topologies. Several modulating techniques

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have been developed that are applicable to full-bridge VSIs. Among them are the

PWM (bipolar and unipolar) techniques.

Fig 3.9: Ideal waveforms of the full-bridge inverter

3.4 THREE-PHASE VOLTAGE SOURCE INVERTERS

Single-phase VSIs cover low-range power applications and three-phase VSIs

cover the medium- to high-power applications. The main purpose of these topologies

is to provide a three-phase voltage source, where the amplitude, phase, and frequency

of the voltages should always be controllable. Although most of the applications

require sinusoidal voltage waveforms (e.g., ASDs, UPSs, FACTS, var compensators),

arbitrary voltages are also required in some emerging applications (e.g., active filters,

voltage compensators). The standard three-phase VSI topology is shown in Fig. and

the eight valid switch states are given in Table .As in single-phase VSIs, the switches

of any leg of the inverter (S1 and S4, S3 and S6,or S5 and S2) cannot be switched on

simultaneously because this would result in a short circuit across the dc link voltage

supply. Similarly, in order to avoid undefined states in the VSI, and thus undefined ac

output line voltages, the switches of any leg of the inverter cannot be switched off

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simultaneously as this will result in voltages that will depend upon the respective line

current polarity.

Fig 3.10: Three-Phase Voltage Source Inverters

TABLE 3.3 Valid switch states for a three-phase VSI

3.5 THREE PHASE CURRENT SOURCE INVERTERS

The main objective of these static power converters is to produce ac output

current waveforms from a dc current power supply. For sinusoidal ac outputs, its

magnitude, frequency, and phase should be controllable. Due to the fact that the ac

line currents ioa, iob, and ioc (Fig.) feature high di/dt,a capacitive filter should be

connected at the ac terminals in inductive load applications (such as ASDs).

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Fig 3.11: Three-Phase current Source Inverters

Thus, nearly sinusoidal load voltages are generated that justifies the use of

these topologies in medium-voltage industrial applications, where high-quality

voltage waveforms are required. Although single-phase CSIs can in the same way as

three-phase CSIs topologies be developed under similar principles, only three-phase

applications are of practical use and are analyzed in the following.

In order to properly gate the power switches of a three phase CSI, two main

constraints must always be met: (a) the ac side is mainly capacitive, thus, it must not

be short- circuited; this implies that, at most one top switch (1, 3, or 5and one bottom

switch (4, 6, or 2 ) Should be closed at any time; and (b) the dc bus is of the current-

source type and thus it cannot be opened; therefore, there must be at least one top

switch (1, 3, or 5) and one bottom switch (4, 6, or 2) closed at all times. Note that both

constraints can be summarized by stating that at any time, only one top switch and

one bottom switch must be closed. There are nine valid states in three-phase CSIs.

The states 7, 8, and 9 (Table) produce zero ac line currents. In this case, the dc link

current freewheels through either the switches S1 and S4, switches S3 and S6, or

switches S5 and S2. The remaining states (1 to 6 in Table) produce nonzero ac output

line currents. In order to generate a given set of ac line current waveforms, the

inverter must move from one state to another. Thus, the resulting line currents consist

of discrete values of current, which are . The selection of the states in

order to generate the given waveforms is done by the modulating technique that

should ensure the use of only the valid states.

TABLE 3.4 Valid switch states for a three-phase CSI

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