T.E. Sem. V [ETRX] Linear Integrated Circuit and Design Prelim …vidyalankar.org/file/engg_degree/prelim_paper_soln/SemV/ETRX/LIC.pdf · Linear Integrated Circuit and Design Prelim

1113/Engg/TE/Pre Pap/2013/ETRX/Soln/LIC 1

Vidyalankar T.E. Sem. V [ETRX]

Linear Integrated Circuit and Design Prelim Question Paper Solution

Consider Stage 1:

For V01 V01 = fin

1

RV

R

0110k

V 5V10k

V01 = 5 V Consider Stage 2:

Here, 0 01 210k 10k

V V V10k 10k

= [1] [5] + [1] [2] = 5 2 V0 = 3 V Hence, Final output V0 = 3 V An instrumentation amplifier must satisfy following requirements : i) Precise low level signal amplification ii) Low noise iii) Low thermal drift iv) High input resistance v) Accurate closed loop gain and easy gain adjustments vi) Low power dissipation vii) High CMRR viii)High slew rate

1. (a) 10 k

10 k 10 k

10 k

10 kV2

V1

+

+

V0

= 2V

V01

=5 V

10 k

10 k

10 k V2

+

V0

= 2V

V01

5V

1. (b)

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The following circuit shows the opamp comparator used for pulse width modulation. In this circuit the comparator compares two voltages viz. a sawtooth voltage VC and a modulating signal VI. Considering the sawtooth of amplitude 5V and the modulating signal of 1V. So when the sawtooth voltage is higher than modulating voltage the output of comparator is low. When the sawtooth is less than modulating, the output is high. Here the output is in the form of square pulses whose width can be changed by changing modulating signal. But the frequency of output waveform is same as that of sawtooth. The input output equation is given by

Pulse width during high output is

CMH I

Vt V

T

where T = period of sawtooth wave VCM = maximum peak voltage of sawtooth Duty cycle is given by

Htduty cycleT

1. (c)

+VCC

VEE

Vo

VC = 5V

Sawtooth

VI

+5V

t

5V

1V

VC

V0

t

input

output

Output waveform

T

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Prelim Question Paper Solution


Characteristics of an ideal comparator Zero Crossing Detector : An immediate application of comparator is zero crossing detector or sinetosquare wave converter. The zero crossing detector can be easily obtained from the comparator circuit just by making the reference voltage to zero. So the equation of zero crossing detector becomes

in 0 satV 0 V V

in 0 satV 0 V V That is, the output V0 is driven into negative saturation when the input signal passes through zero in positive direction and output is driven into positive saturation when input passes through zero in negative direction.

1. (d)

(a)

(b) Fig.: (a) Circuit diagram (b) Waveforms

Vcc

+Vcc

Vcc for V2 < V1

+Vcc for V2 < V1

Ideal characteristics Vout Actual characteristics Vout

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Low Pass KRC Filters The low pass KRC filter is as shown in figure 9. Here gain K is given by

K = B

A

R1

R …(1)

Now, V0 = 1 2 22

1k v (R 1/ sC )

sC

By inspection we have

V0 = 12 2

1K. V

R C s 1 …(2)

Summing currents as node 1V ,

0 1 0 1i 1

1 2 1

v / k v v vv v0

R R 1/ C s

…(3)

Eliminating v1 and collecting

H(s) = 0

i

v

v =

21 2 1 2 1 1 1 2 2 2

k

R R C C s [(1 k)R C R C R C ]s 1 …(4)

Substituting s = j

H(j) = 2

1 1 2 2 1 1 1 2 2 2

k

1 R C R C j [(1 k)R C R C R C ] …(5)

Comparing with H(j) = 2

0 0

k

j1 Q

Comparing this equation with standard second order Low pass Response, we obtain OLPH K …(6)

2

0

= 21 1 2 2R C R C

0 = 1 1 2 2

1

R C R C

2 f 1 1 2 2

1

R C R C

f = 1 1 2 2

1

2π R C R C …(7)

2. (a)

Vi

R1

v0

C2

R2+

+

v1

C1

Fig.

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Also, ( j )

Q

= 1 1 1 2 2 2j [(1 k)R C R C R C ]

Q = 1 1 2 2 1 2 2 1 2 2 1 1

1

(1 k) R C / R C R C / R C R C / R C …(8)

(i) Consider 2 V acting alone. a = b + c + d a = b + d

in 0in in V V2 V V

40k 25k 50k

Vin = 0 [Virtual ground]

0V2

40k 50k

05

V 24

0V = - 2.5V ….(1) (ii) Consider 3 V acting alone

050k

v 3V25k

= (2) (3) 0V = - 6 V ….(2) (iii) Consider 4 V acting alone

2. (b)

0V

+

2 V 40 k

Vin 50 k

c = 0

b25 k

dc

a

0V

+

40 k

50 k

25 k

3 V

0V

+

40 k

V1 50 k

25 k If0I1

V2

30 k

20 k

4 V

10 k

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R1 = 40 k || 25 k = 15.4 k R1 = 50 k

2

4 30 20V

30 20 10

V2 = 2.182

050k

V 1 2.18215.4k

0V = 9.27 V ….(3) (iv) Consider 5 V acting alone Rf = 50 k R1 = 50 42 V

2

30k||10kV 5

30k||10k 20k

V2 = 1.364 0V = 5.79 V ….(4)

From (1), (2), (3) and (4) V0 = 0 0 0 0V V V V

= 2.5 6 + 9.27 + 5.79 V0 = 6.56 V In VLSI circuits implementation, we use a device called switched capacitor for realizing second order filter sections. The basic concept of switched capacitor filter is a resistance simulated by using periodically operated MOS switches and a capacitor. The switched capacitor filters have the following advantages. 1) Since the resistances are eliminated, in VLSI realization the resistances have the major

disadvantage that it requires large area also they have tolerance level and drift parameters which are usually too large.

2) The frequency properties of the filters are determined by the ratio of capacitor values and we can control these ratios to 0.1 % accuracy and maintain excellent tracking with respect to time and temperature variations. The active RC filters have very poor performance when compared to VLSI implementation.

3) The frequency performance of filter is proportional to clock frequency that can be controlled to provide programmable filter characteristics.

The disadvantages of switched capacitor filter include noise and spurious high frequency responses which are present in the circuit due to the sampling process. These disadvantages can be reduced by using a clock frequency very much greater than the highest small frequency component

0V

+

40 k

V1 50 k

25 k

V2

30 k20 k

10 k

3. (a)

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The switch capacitor realization of a resistor using an SPDT switch is as shown.

When switch is in position (1) the capacitor CR charges to a voltage V1. Hence Q1 = CRV1 When switch is in position (2) the capacitor CR discharges to V2. Hence Q2 = CR V2 The net charge transfer per cycle of the switch Q = Q1 Q2 = CRV1 CR V2 = CR (V1 V2) If the switch moves between positions (1) and (2) at clock frequency

fc = c

1

T cycles/sec.

The average current for constant values of V1 and V2.

Iavg = Q

T

= R 1 2C (V V )

T

= R 1 2

c

C (V V )

T

Iavg = R c 1 2C f (V V )

1 2V V = avg

R c

I

C f = avg

R c

1I

C f

1 2V V = avg eqI R where Req = R c

1

C f

If fc is much higher than the highest frequency component in V1 and V2 then the charge transfer process can be treated as a continuous one and the switched capacitor circuit can be modelled as an equivalent resistor as shown. A modification of the switched capacitor filter is as shown. Here replacing the SPDT switch by SPST switch.

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Logarithmic Amplifier Using simple circuitry and a high performance OP-AMP it is possible to produce log, antilog amplifier with good linearity. Such amplifier uses the non-linear volt-amp relationship of the PN junction itself. This relationship is given by

If = fV VTSI e 1 (1)

where Is = saturation current of the diode Vf = forward voltage a/c diode. VT = thermal voltage KT/q n 2 for small currents in silicon devices, n = 1 for germanium devices.

If operating range of Vf in equation (1) is restricted so that

f TV nVe 1 (+ve exponential)

then fV nVTf sI I e

Take log of both sides

log If = fs

Vlog I

nVT

Vf = nVT [ln If ln Is] Here the non-inverting terminal is grounded, so there is virtual ground at inverting terminal. So current flowing through the resistor R is equal to the current flowing through diode If I = If

1 2f

1

V VI

R

V2 = 0 [Virtual ground]

If = i

1

V

R

Vf = nVT [ln If ln Is]

Vf = is

1

VnVT ln ln I

R

But Vf = V2 V0 Vf = V0 V0 = Vf

V0 = iS

1

VnVT ln ln I

R

… (A)

It should be noted that in equation (A), there are two separate temperature effect i.e. temperature sensitive scale factor nVT and temperature sensitive offset term nVT lnIs.

3. (b)

Vf

V0

If

Vin

R

I

Log Amplifier

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To reduce the temperature dependence factor temperature compensated log amplifier is used.

V1 = nVT is

1

Vln ln I

R

Vf = R snVT lnI -lnI [Vf for diode D2)

Vf for diode D2 Vf = V2 V1 V2 = V1 + Vf

= is R s

1

V-nVT ln -lnI -lnI +lnI

R

V2 = i

1 R

V-nVT ln

R I

… (B)

So in above circuit saturation current term can be reduced by the use of current source and a second matched diode D2.

The temperature sensitivity in equation (B) is the scale factor nVT. This can be compensated in the output amplifier by making its gain temperature sensitive and compensating for the nVT factor. This is done by using thermistor RT which is temperature sensitive.

V0 = Fi

1

R1 V

R

for non-inverting amplifier.

V0 = F2

1 T

R1 V

R R

V0 = F F T i

1 T 1 R

R +R +R V-nVTln

R +R R I

V0 = K1ln K2Vi where K1 and K2 are constants. By varying the RT value, we can compensate nVT. Given, RA = 2.2 k RB = 3.9 k C = 0.1 F

(i) Charging time (positive pulse width) TC TC = 0.69 (RA + RB) . C = 0.69 (2.2 k + 3.9 k) (0.1 ) TC = 0.421 sec.

Rf

Vin

Temperature compensated logarithmic amplifier

V0 iV Vf

D2

RRT

A2 A1

V2

V1

If D1

Vf

R1

I1

4. (a) Vidyala

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(ii) Discharging time (Free running frequency of negative pulse width) Td Td = 0.069 RB . C = (0.69) (3.9 k) (0.1 ) Td = 0.269 sec. Circuit Diagram : Expansion for time period T : Total time period T = TCharging + TDischarging

Case I : Charging time : (TC)

TC = final initialC

final terminating

V VR ln

V V

Vfinal = VCC

Vinitial = CC1

V3

Vterminating = 23

VCC

R = (RA + RB) = capacitor change through RA and RB.

= 1

CC CC3A B 2

CC CC3

V V(R + R )C ln

V V

= CC

CC

2V3

A B V3

(R + R )C ln

= (RA + RB) C ln 3 TC = 0.69 (RA + RB) C … (1)

555

8 4

7

6 3

51

RA

VCC = +5 V

output

0.01 f

2

C

RB

1/3 VCC

2/3 VCC

VCC VCC VCC = voltage across

capacitor

tc td

T

charge discharge

0 V 0 V

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Case II : Discharging time (Td)

Td = final initialC

final terminating

V VR ln

V V

Vfinal = 0 V

Vinitial = 2

3VCC CC

1V

3

Vterminating = CC1

V3

R = RB = capacitor change through RB

Td = 2

CC3B 1

CC3

0 VR C ln

0 V

= RB C ln (2) = 0.69 RB C Instrumentation Amplifier In many industrial and consumer applications, the measurement and control of physical conditions is very important. Generally these measurements are done using transducer. The transducer is a device that converts one form of energy into another. The instrumentation system is used to measure the output signal produced by a transducer and often to control the physical signal producing it. The following figure shows a block diagram of instrumentation system :

The input stage is a transducer and a preamplifier. The output stage may consist of devices like oscilloscope, magnetic recorders, display etc. The signal input to instrumentation amplifier is the output of transducer. Many transducers produce output which do not have sufficient strength. To amplify the lowlevel output, produced by transducer so that it can drive the display or indicator is the main function of instrumentation amplifier.

4. (b)

Input Stage

Intermediate Stage

Output Stage

Physical quantity to be measured

Transducer + pre amplifier

Instrumentation amplifier

Indicator and automatic process controller

Transmission lines

Block diagram of Instrumentation System

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Instrumentation amplifier using crosscoupled difference amplifier : The difference amplifier with 3 opamp is as shown. OA1 and OA2 is often referred input or first stage and OA3 forms the output or second stage. The OA1 and OA2 are connected in noninverting mode and OA3 act as difference amplifier. The drawback of difference amplifier using one opamp is that of unequal input impedance. This is overcome by connecting OA1 and OA2 to input of OA3 as shown. The output voltage can be calculated as follows.

Consider opamp OA1. To find output voltage of OA1 , we apply superposition theorem.

(i) Consider V2 acting alone.

3x 2

G

RV 1 V

R

(ii) Consider V1 acting alone.

3y 1

G

RV V

R

The total output of OA1 is

3 x yV V V

3 32 1

G G

R R1 V V

R R

Similarly for OA2 we can write

3 34 1 2

G G

R RV 1 V V

R R

Vx V2

R3 RG

VEE

VCC

V1

R3RG

VEE

VCC

V1

V2

OA2

OA1

OA3 V0

0V ¢¢

V0

R1

R1

R2

R2

R3

RG

R3

VEE

VCC

VEE

VCC

VEE

VCC

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Fig.: Linearity error for 3bit DAC

The V3 and V4 act as input to OA3. For OA3 we have to apply superposition theorem again. The output becomes

20 3 4

1

RV V V

R

3 3 3 320 2 1 1 2

1 G G G G

R R R RRV 1 V V 1 V V

R R R R R

3 320 2 1

1 G G

2R 2RRV 1 V 1 V

R R R

320 2 1

1 G

2RRV 1 V V

R R

By varying RG we can adjust gain of IA. Performance Specifications

i) Resolution The resolution of a converter is the smallest change in voltage which may be produced at the output (or input of the converter. For example, 8bit D/A converter has 28 1 = 255 equal internals. Hence the smallest change in output voltage is (1/255) of the full scale output range. In short, the resolution is the value of the LSB.

Resolution (in volts) = FSn

V

2 1 = 1 LSB increment

ii) Linearity The linearity of an A/D or D/A converter is an important measure of its accuracy and tells us how close the converter output is to its ideal transfer characteristics. In an ideal DAC, equal increment in the digital input should produce equal increment in the analog output and the transfer curve should be linear. However, in an actual DAC, output voltages do not fall on a straight line because of gain and offset errors as shown by the solid line curve in figure. iii) Accuracy Absolute accuracy is the maximum deviation between the actual converter output and the ideal converter output. Relative accuracy is the maximum deviation after gain and offset errors have been removed. Data sheets normally specify relative accuracy rather than absolute accuracy. The accuracy of a converter is also specified in terms of LSB increments or percentage of full scale voltage. iv) Monotonicity A monotonic DAC is the one whose analog output increase for an increase in digital input. Figure represents the transfer curve for a nonmonotonic DAC, since the output decreases when input code changes from 001 to 010. A monotonic characteristic is essential in control applications, otherwise oscillations can result. In successive approximation ADCs, a nonmonotonic characteristics may lead to missing codes.

If a DAC has to be monotonic, the error should be less than ± (½) LSB at each output level. All the commercially available DACs are monotonic because the linearity error never exceeds ± (½) LSB at each output level.

5. (a)

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A nonmonotonic 3bit DAC

v) Setting time The most important dynamic parameter is the settling time. It represents the time it takes for the output to settle within a specified band ± (½) LSB of its final value following a code change at the input (usually a full scale change). It depends upon the switching time of the logic circuitry due to internal parasitic capacitances and inductances. Settling time ranges from 100 ns to 10s depending on word length and type of the circuit used. vi) Stability The performance of converter changes with temperature, age and power supply variations. So all the relevant parameters such as offset, gain, linearity error and monotonicity must be specified over the full temperature and power supply ranges. A voltage regulator is a circuit that supplies a constant voltage regardless of changes in load currents or changing input voltage. The output of voltage regulator is regulated by internal circuitry of the regulator and is relatively independent of current drawn by load, the supply or line voltage and the room temperature. Common use of Voltage Regulators Voltage regulators are commonly used for on-card regulation and laboratory power supplies. The switching type regulators are especially used as control circuits in pulse width modulation (PWM), pushpull bridges and series type switch mode power supplies. Fixed Series Voltage Regulator The 78xx (sometimes L78xx, LM78xx, MC78xx...) is a family of self-contained fixed linear voltage regulator integrated circuits. The 78xx family is commonly used in electronic circuits requiring a regulated power supply due to their ease-of-use and low cost. For ICs within the family, the xx is replaced with two digits, indicating the output voltage (for example, the 7805 has a 5 volt output, while the 7812 produces 12 volts). The 78xx line are positive voltage regulators: they produce a voltage that is positive relative to a common ground. There is a related line of 79xx devices which are complementary negative voltage regulators. 78xx and 79xx ICs can be used in combination to provide positive and negative supply voltages in the same circuit. 78xx ICs have three terminals and are commonly found in the TO220 form factor, although smaller surface-mount and larger TO3 packages are available. These devices support an input voltage anywhere from a couple of volts over the intended output voltage, up to a maximum of 35 to 40 volts depending on the make, and typically provide 1 or 1.5 amperes of current (though smaller or larger packages may have a lower or higher current rating). Advantages 78xx series ICs do not require additional components to provide a constant, regulated source

of power, making them easy to use, as well as economical and efficient uses of space. Other voltage regulators may require additional components to set the output voltage level, or to assist in the regulation process. Some other designs (such as a switched-mode power supply) may need substantial engineering expertise to implement.

5. (b)

LM7805 Pinout Diagram

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Disadvantages The input voltage must always be higher than the output voltage by some minimum amount

(typically 2 volts). This can make these devices unsuitable for powering some devices from certain types of power sources (for example, powering a circuit that requires 5 volts using 6-volt batteries will not work using a 7805).

555 as Monostable Multivibrator The monostable multivibrator has only one stable state and it require triggering. It is often called as one shot multivibrator. It is a pulse generating circuit in which the duration of the pulse is determined by the RC network connected externally to the timer circuit. The following figure shows the arrangement for monostable multivibrator.

Operation Let us consider truth table of SR FF.

S R Qn +1 n 1 nQ (Q )

0 0 Qn nQ

0 1 0 1

1 0 1 0

1 1 9 9

Monostable multivibrator has quasi stable (unstable) state and one stable state. In the stable state output is at ground potential (0 V). This is because the flipflop output holds the transistor Q1 ON and thus capacitor C is shorted out to ground. However upon application of a negative trigger pulse to pin 2, and when this negative bigger

pulse goes below 1/3 VCC. The lower comparator (LC) output become high. Thus Q will make transistor Q OFF and short circuit across capacitor (C) is released. The capacitor C now starts charging up towards VCC through RA. However, when the voltage across the capacitor equals 2/3 VCC. Comparator 1 (UC) output switches from low to high [R = 1] which in turn drives the output of the flipflop turns transistor Q ON and hence capacitor rapidly discharges through the transistor. The output of the monostable remains low until a trigger pulse is again applied. Then the cycle repeats.

6. (a)

4

63

51

RA

VCC

output

0.01 f

Pin diagram : Monostable Multivibrator

2 Trigger input

C VCC 1/3 VCC

Circuit Diagram :

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Figure below shows the trigger input output voltage and capacitor voltage waveforms.

In a feedback system, a signal that is proportional to the output is feedback to the input and combined with the input signal to produce a desired system response. Feedback can be either positive or negative. In negative feedback, a portion of the output signal in subtracted from the input signal. In positive feedback, a portion of output signal is added to the input signal.

Majority of the opamp circuits employ negative feedback. Figure below shows the basic structure of a negativefeedback circuit. The arrows indicate signal flow, and the generic symbol ‘x’ stands for either a voltage or a current signal. Besides the source and load, we identify the following basic blocks : i) An amplifier, also called error amplifier in control theory, which accepts the signal xd and yields the output signal. x0 = axd where a, the forward gain of the amplifier, is called the openloop gain of the circuit.

ii) A feedback network, which samples x0 and produces the feedback signal. xf = x0 where , the gain of the feedback network, is called the feedback factor of the circuit.

iii) A summing network, denoted , which generates the difference xd = xi xf

also called the error signal. The designation negative feedback stems from the fact that we are in effect feeding a portion of x0 back to the input, where it is then subtracted from xi to yield the reduced signal xd.

Eliminating xf and xd from the above equations and solving for the ratio A = 0

i

x

x yields

A = a

1 a …(1)

where A is called the closedloop gain of the circuit.

6. (b)

Source Load

xi

xf

+

xd ax0

Block diagram of a negativefeedback system

Trigger I/P

output I/P

Capacitor I/P

+VCC

0 V

VCC

0 V

2/3 VCC

0 VInput and output waveform

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Now the factor a is the overall gain experienced by the signal as it propagates through the feedback network and summer. Its negative is referred to as return ratio or more commonly loop gain, T = a …(2)

Substituting in equation (1) we get A = 1 T

(1 T)

Letting T , yields the ideal situation

idealA = T

1lim A

…(3)

Hence we see that the closed loop gain A becomes independent of open loop gain ‘a’ and is exclusively set by the feedback network. Now, we can express,

A = idealT

A1 T

If we define error function =1

11

T

= 1

11 T

= 1

then A = idealA (1 ) where 1

(1 T)

is the fractional deviation of A from ideal.

The most direct implementation of negative feedback is the noninverting amplifier, where the

feedback signal is the inverting input voltage VN = V0, where = 1

1 2

R

(R R ).

The state variable filter realization has expense flexibility, good performance and low sensitivities. The name state variable is derived from the fact that statevariables methods of solving differential equations are used in the development of the realization.

Consider the inverting secondorder bandpass transfer function

22

1 1 0

V (s) | H | s

V (s) s a s a

….(1)

In this equation we now introduce an arbitrary frequency domain variable X(s) and multiply both the numerator and denominator by X(s)/s2 to obtain,

2

1 012

X(s)| H | .V (s) sa X(s) a X(s)V (s) X(s)

s s

….(2)

If we separately equate the numerators and denominators of both members of (2), two equations result :

1 01 2

a X(s) a X(s)X(s) V (s)

s s ….(3a)

2X(s)

V (s) | H | .s

….(3b)

Taking inverse Laplace transform :

1 0x(t) (t) a x(t).dt a x(t) . dt .dt ….(4a)

2(s) | H | x(t) . dt

7. (a)

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where 1x(t) L [X(s)]. The quantities x(t). x(t).dt and x(t) . dt .dt are called state

variables, which accounts for the name of the filter. The block diagram realization is as shown in figure.

Window Detector In some applications, it is needed to determine when an unknown input falls between two precise reference thresholds VTL & VTH. This is done with the help of a circuit known as Window detector. This circuit makes use of dual opamp comparator as shown. The unknown input Vin is applied to the positive terminal of comparator C1 and negative terminal of comparator C2. The lower reference voltage VTL is applied to ve terminal of C1 and higher reference voltage VTH is applied to +ve terminal of C2. The output from both the comparators is connected to get total output. The circuit operates as follows : (i) When in TL 0V V V low (ii) When VTL < Vin < VTH The output of both the comparators is high V0 = VCC (iii)When Vi > VTH V0 = low

Thus, only when the input falls within a specified window of the reference voltage, the output is high. If the resistance R is replaced by a LED with a series current limiting resistor, then the LED glows whenever i falls outside the window. Concept of Virtual Short and Virtual Ground

7. (b)

7. (c)

Vo

VCC

VTH

VTL

C2

C1

R

Vin

VCC

V0

VEE

Vid I = 0

(a)

VCC

V0

VEE

Vid = 0

(b)

1

2

At virtual groundVidy

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ar



While analysing different opamp applications two important concepts have to be considered. They are virtual short and virtual ground. Virtual Short : According to virtual short concept, the potential difference between two input terminals of an opamp is almost zero. In other words, both input terminals are approximately at same potential. This concept can be explained as follows.

The input impedance Ri of an ideal opamp is infinite. So no current flows from one input terminal to other as shown in (a). Thus voltage drop across Ri will be zero and both the input terminals will be at same potential. Virtual Ground : In figure (b), the voltage Vid = 0 implies that terminal 1 has same potential as terminal 2. Since terminal 2 is grounded, terminal 1 is also virtually grounded. The term “Virtual” is used to imply that since Vid = 0, no current flows from terminal 1 to terminal 2. Thus virtual ground point has zero voltage and draws no current. The inverting input terminal acts like ground as far as voltage is concerned. So the virtual ground has zero voltage and zero current unlike the usual ground which has zero voltage but can sink infinite current. In virtual Ground for closed loop opamp, we can write V0 = A.Vid

i.e. A = 0

id

V

V

where A is open loop gain of opamp and it is very large.

idV = 0V

A 0 = negligibly small

i.e. V1 V2 = 0 V1 = 0 V1 = V2 = 0 V1 is at ground potential, 2V is also virtually at ground potential i.e. for voltage purpose input appears as short circuit and for current purpose it appears as open circuit. Chebyshev Polynomials The normalized lowpass equal ripple magnitude approximation may be given in the form

2

22 2

n

H| N( j ) |

1 .C ( )

……(1)

where nC ( ) is a polynomial of order n. If these polynomials have the properties :

0 2nC ( ) 1 for 0 1 ……(2)

2nC ( ) 1 for 1

then permitted values for 2nC ( ) and | N( j ) | lie in the unshaded areas as shown in the figure

below.

7. (d)

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We see that the values of determines the limit of variation in the passband 0 1 rad/s. The stop band is defined for 1 rad/s.

A set of polynomials nC ( ) that have the properties specified above are Chebyshev

polynomials. These are defined as follows :

1

22

33

n 1 n n 1

C ( )

C ( ) 2 1

C ( ) 4 3

:

:

C ( ) 2 C ( ) C ( ) ......(3)

where the last expression in valid for all n > 1. The Chebyshev polynomials may also be written using the expressions.

1nC ( ) cos(n cos ) …… 0 1 …(4a)

1nC ( ) cosh(n cosh ) …… 1

nn 22n

1C ( ) 112

…… 1 …(4b)

Functions having the form of (1) in which the quantities nC ( ) are Chebyshev polynomials are

called Chebyshev functions or equal ripple functions. Plots of the magnitude of equalripple functions for = 1 and n = 2, 5, 10 are shown in figure.

We observe that the stop band attenuation in the vicinity of the cut off frequency is considerably higher for an equal ripple characteristic for any order, as compared to maximally flat or Butterworth approximation. For sufficiently high values of frequency, of course, the attenuation will be 20n decibels per decade of frequency past = 1 rad/s, just as was the case for maximally flat magnetic characteristic. The 3dB frequencies for various ripples and orders can be determined by the relation.

13 dB

1 1cosh cosh

…… ( 1) ……(5)

(rad/s)

Vidyala

nkar

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