The Application of Hardware in the Loop Testing for ...€¦ · National Aeronautics and Space Administration The Application of Hardware in the Loop Testing for Distributed Engine

National Aeronautics and Space Administration

The Application of Hardware in the Loop Testing

for Distributed Engine Control

George L. ThomasN&R Engineering and Management Services, Inc.

Dennis E. CulleyNASA Glenn Research Center

Alex BrandSporian Microsystems, Inc.

July 26, 2016

7/26/2016

Intelligent Control

and Autonomy

Branch

https://ntrs.nasa.gov/search.jsp?R=20170002703 2020-05-01T09:35:12+00:00Z


Outline

• Introduction

• HIL Test Implementation

• HIL Test Results

• Ancillary High Bandwidth Pressure Signal Modeling

• Conclusions

• Future Work

27/26/2016


Introduction

• Push in industry to meet future design goals (N+2/N+3)

– Fuel economy, noise, emissions

• Research on technologies to meet goals

– Main technologies

• Ultra high bypass

• Hybrid electric

• etc.

– Support technologies

• Distributed engine control (DEC)

• etc.

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Introduction

• Distributed engine control (DEC)

– Replaces centralized control (FADEC)

47/26/2016

– Analog wiring lightweight digital bus

• Reduced weight = better fuel economy

• Better scalability, easier certification process and overhauls

– Support advanced control (Active surge / combustion control)

– Electronics limited by high temperature environment!

– Needs different test techniques than centralized systems

Analog

wiring

Bus Short length wiring

and/or electronics

embedded inside

transducers

Smart Nodes

FADEC


Intro – How Does DEC Change HIL Testing?

• Testing centralized control

– Just a FADEC and/or analog transducers

• Testing distributed control

– More complicated

57/26/2016

Testbed Machine

FADEC

Smart

Nodes

Testbed Machine

Digital

Bus


Intro – HIL Testing of DEC Devices

• Research goals

– Demonstrate modular DEC HIL test techniques and testbed

• Smart sensor via Sporian Microelectronics serves as test case

– Investigate applications of high bandwidth smart sensor

• Active surge/stall control

• Stall precursors are audible Audio range

67/26/2016

• Research tools

– C-MAPSS40k (Distributed)

– DEC System Simulator (DECSS)

• 16 core real-time computer with IO

– Simulation (Sim) Workbench


Outline

• Introduction




• Conclusions

• Future Work

77/26/2016


HIL Test Implementation

• What is our HIL test?

– Smart P3 sensor in C-MAPSS40k simulation loop running on DECSS

– Replaces C-MAPSS40k Ps3 sensor for feedback

– Test is low bandwidth (signal f < 1/(2TS) ; f < 33.3 Hz)

• Test conditions

– Throttle (PLA) burst and chop (idle to full power and back)

– Sea-level-static (SLS)

87/26/2016

0 5 10 15 20 25 30

40

60

80

Time, [s]

PL

A [d

eg

ree

s]



• HIL Test Loop

97/26/2016

DECSS

Proxy Pressure

Transducer

Analog voltage

representing Ps3

Smart Node

Analog voltage

representing

transducer signal

UDP packets

containing sensed

Ps3 data (including

average, min, max,

and FFT data)

Distributed

C-MAPSS40k

Smart Sensor



• Distributed

C-MAPSS40k

as implemented

on DECSS

• Also shown:

smart sensor

substitutes

simulated Ps3

sensor

107/26/2016

EnginePlant

Model

P2 Sensor

P25 Sensor

P50 Sensor

T2 Sensor

T25 Sensor

T30 Sensor

T50 Sensor

Nf Sensor

Nc Sensor

ControlSystem

Fuel Metering

Valve

Variable StatorVanes

Variable BleedValve

Analog OutputDriver

Ps3 Sensor

Smart Sensor

DECSS



• Sim Workbench

“test” construction

• i.e. Programs and

execution order

for HIL test

117/26/2016

Engine Plant Model

P2 P25

P3

P50 T2 T25 T30 T50 Nf Nc

Control System

Fuel Metering Valve

VariableStator Vanes

VariableBleed Valve

Simulation Inputs[PLA, MN, alt, dTamb]

(C Code)

Set Point =f(PLA, ambient)

P3 Signal Generation

Exec

uti

on

Ord

er

Start of Scheduler Frame

End

SmartNode


Outline

• Introduction




• Conclusions

• Future Work

127/26/2016


HIL Test Results

• Net thrust, fuel flow, sensed

Ps3, and actual Ps3

– Blue = Baseline (simulation only)

– Red = HIL test (w/ smart sensor)

• Smart sensor Ps3 has 100 ms lag

• Actual and closed-loop response

only change during decel

– Wf/Ps3 (R/U) overestimated

– More conservative limiting

• All limits protected in both cases

137/26/2016

0 5 10 15 20 25 300

2

4x 10

4

Time [s]

Fn

et [

lbf]

0 5 10 15 20 25 300

2

4

Time [s]

Wf [

lb/s

]

0 5 10 15 20 25 300

200

400

Time [s]

Se

nse

d P

s3 [p

si]

0 5 10 15 20 25 300

200

400

Time [s]A

ctu

al P

s3 [p

si]


Outline

• Introduction




• Conclusions

• Future Work

147/26/2016


Ancillary P3HB Signal Modeling

• Data from literature about stall/surge are often taken with high

bandwidth Kulite sensors, but DC levels and scales not shown

– Limitation of sensors

• Data suggest that pressure disturbances due to blades passing by

stator vanes are picked up and that their magnitude correlates to

compressor stall (and surge often comes after stall inception)

157/26/2016

Compressor stall inception as HPC flow is throttled:

Abdel-Fattah, A. M. and Vivian, A. S., “Development of

the Larzac Engine Rig for Compressor Stall Testing,”

Defense Science and Technology Organization, Victoria,

Australia, DSTO-RR-0377, 2010.



• Preliminary high bandwidth P3 model added to C-MAPSS40k

• Assumptions– P3HB = Ps3 + blade passing pressure disturbances (BPPD)

– BPPD is sinusoidal, comes from one compressor stage only

– BPPD magnitude is nonlinear, sigmoidal function of HPC surge margin

– BPPD frequency is proportional to HP shaft speed times number of blades in that stage

– All noise in P3HB measurement is lumped together and is AWGN

•

• Goal: HPC SM can be estimated from P3HB measurement

and used for closed-loop surge control

167/26/2016

𝑃3𝐻𝐵 = 𝑃𝑠3 +𝑘2 1 − tanh 𝑘3 ∗ SMHPC − 𝑘4

2∙ cos 𝑘1 ∙ 2𝜋𝑁𝑐 ∙ 𝑡 + N 0, 𝜎2



• Initial Simulink-only test

(HIL test not performed yet)

– P3HB signal model –

implementation of previous

equation

– BPPD sensor model –

BPPD magnitude recovered

from FFT of sensed P3HB

– HPC SM observer model –

surge margin backed out

from BPPD magnitude

– HPC SM limit logic not shown

177/26/2016



• Simulink-based simulation

test results

• HPC surge margin limit is protected

• Limiter state chatters on/off

– Can retune

• Response is very slow

– Needs improvement

• Extend to entire flight envelope

187/26/2016

0 5 10 1540

50

60

70

80

PLA

[deg]

0 5 10 150

200

400

Ps3 [

psi]

0 5 10 150

20

40

time [s]HP

C S

urg

e M

arg

in [

%]

0 5 10 150

1

2

3

4

Wf

[lb/s

]

0 5 10 150

0.5

1

BP

PD

[psi]

actual

sensed


Outline

• Introduction




• Conclusions

• Future Work

197/26/2016


Conclusions

• Demonstrated HIL test of smart P3 sensor on DECSS in

C-MAPSS40k Simulation loop

– HIL test is modular, allows nodes to be added or subtracted from test loop

– Smart sensor works as intended except lag, not characterized yet

• May be due to UDP channel, sensor dynamics, delays in signal generator HW

• P3HB signal model + active surge control models

– Demonstrate potential modeling approach for active surge control

– Need better data for validated empirical model

207/26/2016


Outline

• Introduction




• Conclusions

• Future Work

217/26/2016


Future Work

• Apply HIL test development techniques to DEC and other problems

• Obtain high quality compressor data to improve model

• Extend active surge control logic to entire flight envelope

227/26/2016


Done! Questions?

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The Application of Hardware in the Loop Testing for ...€¦ · National Aeronautics and Space Administration The Application of Hardware in the Loop Testing for Distributed Engine