THE FRONTIERS COLLECTION

Series Editors

Avshalom C. Elitzur, Iyar, Israel Institute of Advanced Research, Rehovot, IsraelZeeya Merali, Foundational Questions Institute, Decatur, GA, USAThanu Padmanabhan, Inter-University Centre for Astronomy and Astrophysics(IUCAA), Pune, IndiaMaximilian Schlosshauer, Department of Physics, University of Portland, Portland,OR, USAMark P. Silverman, Department of Physics, Trinity College, Hartford, CT, USAJack A. Tuszynski, Department of Physics, University of Alberta, Edmonton, AB,CanadaRüdiger Vaas, Redaktion Astronomie, Physik, bild der wissenschaft,Leinfelden-Echterdingen, Germany

The books in this collection are devoted to challenging and open problems at theforefront of modern science and scholarship, including related philosophical debates.In contrast to typical research monographs, however, they strive to present theirtopics in a manner accessible also to scientifically literate non-specialists wishing togain insight into the deeper implications and fascinating questions involved. Taken asa whole, the series reflects the need for a fundamental and interdisciplinary approachto modern science and research. Furthermore, it is intended to encourage activeacademics in all fields to ponder over important and perhaps controversial issuesbeyond their own speciality. Extending from quantum physics and relativity toentropy, consciousness, language and complex systems—the Frontiers Collectionwill inspire readers to push back the frontiers of their own knowledge.

More information about this series at http://www.springer.com/series/5342

Boris Murmann • Bernd HoefflingerEditors

NANO-CHIPS 2030On-Chip AI for an Efficient Data-DrivenWorld

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EditorsBoris MurmannDepartment of Electrical EngineeringStanford UniversityStanford, CA, USA

Bernd HoefflingerSindelfingen, Baden-Württemberg, Germany

ISSN 1612-3018 ISSN 2197-6619 (electronic)The Frontiers CollectionISBN 978-3-030-18337-0 ISBN 978-3-030-18338-7 (eBook)https://doi.org/10.1007/978-3-030-18338-7

© Springer Nature Switzerland AG 2020This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or partof the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations,recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmissionor information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilarmethodology now known or hereafter developed.The use of general descriptive names, registered names, trademarks, service marks, etc. in thispublication does not imply, even in the absence of a specific statement, that such names are exempt fromthe relevant protective laws and regulations and therefore free for general use.The publisher, the authors and the editors are safe to assume that the advice and information in thisbook are believed to be true and accurate at the date of publication. Neither the publisher nor theauthors or the editors give a warranty, expressed or implied, with respect to the material containedherein or for any errors or omissions that may have been made. The publisher remains neutral with regardto jurisdictional claims in published maps and institutional affiliations.

This Springer imprint is published by the registered company Springer Nature Switzerland AGThe registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland

Contents

1 The New Era of Nano-chips: Green and Intelligent . . . . . . . . . . . . 1Boris Murmann and Bernd Hoefflinger

2 IRDS—International Roadmap for Devices and Systems,Rebooting Computing, S3S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Bernd Hoefflinger

3 Real-World Electronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Bernd Hoefflinger

4 Silicon Complementary MOS into Its 7th Decade . . . . . . . . . . . . . . 31Bernd Hoefflinger

5 Nanolithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Bernd Hoefflinger

6 The Future of Ultra-Low Power SOTB CMOS Technologyand Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47Nobuyuki Sugii, Shiro Kamohara and Makoto Ikeda

7 Dealing with the Energy Versus Performance Tradeoff in FutureCMOS Digital Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89Wim Dehaene, Roel Uytterhoeven, Clara Nieto Taladriz Morenoand Bob Vanhoof

8 Monolithic 3D Integration—An Update . . . . . . . . . . . . . . . . . . . . . 117Zvi Or-Bach

9 Heterogeneous 3D Nano-systems: The N3XT Approach? . . . . . . . . 127Dennis Rich, Andrew Bartolo, Carlo Gilardo, Binh Le, Haitong Li,Rebecca Park, Robert M. Radway, Mohamed M. Sabry Aly,H.-S. Philip Wong and Subhasish Mitra

10 High-Speed 3D Memories Enabling the AI Future . . . . . . . . . . . . . 153Zvi Or-Bach

v

11 3D for Efficient FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165Zvi Or-Bach

12 Digital Neural Network Accelerators . . . . . . . . . . . . . . . . . . . . . . . 181Ulrich Rueckert

13 Enabling Domain-Specific Architectures with ProgrammableDevices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203Alireza Kaviani

14 Coarse-Grained Reconfigurable Architectures . . . . . . . . . . . . . . . . 227Raghu Prabhakar, Yaqi Zhang and Kunle Olukotun

15 A 1000� Improvement of the Processor-Memory Gap . . . . . . . . . . 247Zvi Or-Bach

16 High-Performance Computing Trends . . . . . . . . . . . . . . . . . . . . . . 269Bernd Hoefflinger

17 Analog-to-Information Conversion . . . . . . . . . . . . . . . . . . . . . . . . . 275Boris Murmann, Marian Verhelst and Yiannos Manoli

18 Machine Learning at the Edge . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293Marian Verhelst and Boris Murmann

19 The Memory Challenge in Ultra-Low Power Deep Learning . . . . . 323Francesco Conti, Manuele Rusci and Luca Benini

20 Multi-sensor Scenarios for Intelligent SOCs . . . . . . . . . . . . . . . . . . 351Bernd Hoefflinger

21 High-Dynamic-Range and Wide Color Gamut Video . . . . . . . . . . . 359Zhichun Lei, Xin Yu and Markus Strobel

22 Update on Brain-Inspired Systems . . . . . . . . . . . . . . . . . . . . . . . . . 387Ulrich Rueckert

23 Energy-Harvesting Applications and Efficient PowerProcessing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405Thorsten Hehn, Alexander Bleitner, Jacob Goeppert,Daniel Hoffmann, Daniel Schillinger, Daniel A. Sanchezand Yiannos Manoli

24 Artificial Retina: A Future Cellular-Resolution Brain-MachineInterface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443Dante G. Muratore and E. J. Chichilnisky

25 Augmented and Virtual Reality . . . . . . . . . . . . . . . . . . . . . . . . . . . 467Gordon Wetzstein

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26 Cryogenic-CMOS for Quantum Computing . . . . . . . . . . . . . . . . . . 501Edoardo Charbon, Fabio Sebastiano, Masoud Babaieand Andrei Vladimirescu

27 Quantum Computing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527Albert Frisch, Harry S. Barowski, Markus Brink and Peter Hans Roth

28 Human-Machine Interaction and Cognitronics . . . . . . . . . . . . . . . . 549Ulrich Rueckert

29 Efficient System-on-Chip (SOC) for Automated Drivingwith High Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 563Yutaka Yamada and Katsuyuki Kimura

30 The Thirties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577Boris Murmann and Bernd Hoefflinger

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585

Contents vii

Editors and Contributors

About the Editors

Boris Murmann received his Ph.D. degree from the University of California,Berkeley in 2003 and serves as a professor of electrical engineering at StanfordUniversity. His research interests are in mixed-signal integrated circuit design, witha focus on sensor interfaces, data converters, and custom circuits for embeddedmachine learning. He has served as an associate editor of the IEEE Journal ofSolid-State Circuits, an AdCom member, and a distinguished lecturer of the IEEESolid-State Circuits Society, as well as the data converter subcommittee chair andthe technical program chair of the IEEE International Solid-State CircuitsConference (ISSCC). He is a fellow of the IEEE.

Bernd Hoefflinger became an assistant professor at Cornell University, Ithaca,NY, USA, after completing his Ph.D. at the Technical University of Munich,Germany. He was a co-founder of the MOS Division of Siemens in Munich andfounded the electrical engineering department of the University of Dortmund,Germany, which houses the first Ion-Implanted BiCMOS production line. Afterserving as the head of the electrical engineering departments at the University ofMinnesota and then at Purdue University in Indiana, he established the Institute ofMicroelectronics Stuttgart, Germany, as the first ISO 9000-certified research andmanufacturing facility—a leader in ASICs, HDR vision, and e-beam-driven nan-otechnology.

Contributors

Masoud Babaie received the Ph.D. (cum laude) degree from the Delft Universityof Technology, Delft, The Netherlands, in 2016. In 2006, he joined the KavoshcomResearch and Development Group, Tehran, where he was involved in designingwireless communication systems. From 2009 to 2011, he was a CTO of that

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company. From 2014 to 2015, he was a visiting scholar researcher with theBerkeley Wireless Research Center, Berkeley, CA, USA. In 2016, he joined theDelft University of Technology, where he is currently an assistant professor(tenured). He has co-authored one book, two chapters, 11 patents, and over 40technical publications. His current research interests include RF/millimeter-waveintegrated circuits and systems for wireless communications and cryogenic elec-tronics for quantum computation. He has been a committee member of ISSCCStudent Research Preview since 2017 and will join as a technical program com-mittee of ESSCIRC in 2020. He was a co-recipient of the 2015–2016 IEEESolid-State Circuits Society Pre-Doctoral Achievement Award and the 2019IEEE ISSCC Best Demo Award. In 2019, he received the Veni Award from theNetherlands Organization for Scientific Research.

Harry S. Barowski studied physics at the University of Regensburg, where hegraduated in low-temperature physics 1994. He finished his doctoral degree in 1997on far and infrared spectroscopy on various types of cuprate-basedhigh-temperature superconductors. After finishing his doctoral study, he startedhis career as logic designer of mainframe processors at IBM Research andDevelopment in Boeblingen, Germany. Here he worked in logic design as logicdesign engineer professional of computational units for high-performance proces-sors for P and Z systems and gaming consoles (Cell processor for SonyPlaystation). He also was engaged in the field of formal logic verification andcustom circuit design. He currently is focussed on custom array design and physicaland logical design verification methodologies. As IBM master inventor, he drivestechnical innovations and new technologies. He contributed to several aspects ofIBM system Q, such as design of classical hardware components to the IBM QSystem One, superconducting chip design and was coaching the IBM Extreme Blueinternship on implementation of the well-known HHL algorithm to solve a systemof linear equations into Qiskit.

Andrew Bartolo received the B.S. and M.S. degrees in computer science fromStanford University, Stanford, CA, USA, where he is currently working toward thePh.D. degree in computer science. His work focuses on hardware and softwaresupport for computation immersed in memory. His current research interestsinclude the fields of architecture, compilers, digital design, and networking.

Luca Benini holds the chair of digital circuits and systems at ETHZ and is a fullprofessor at the Università di Bologna. His research interests are in energy-efficientparallel computing systems, smart sensing micro-systems, and machine learninghardware. He has published more than 1000 peer-reviewed papers and five books.He is a fellow of the IEEE, of the ACM and a member of the Academia Europaea.

Alexander Bleitner received the B.Sc. and M.Sc. degrees in embedded systemsengineering from the University of Freiburg, Freiburg, Germany, in 2013 and 2017,respectively, where he is currently pursuing the Ph.D. degree at the Fritz HuettingerChair of Microelectronics, Department of Microsystems Engineering—IMTEK.From 2010 to 2013, he was an intern at Siemens Medical Solutions in Forchheim,

x Editors and Contributors

Germany. There, he developed electronic circuits and FPGA designs for medicalimaging. Additionally, in 2015, he pursued an internship at the Bosch Research andTechnology Center in Palo Alto, CA, USA. During this internship, he was workingon image processing algorithms and integrated circuit designs for a low-powerimage sensor. Currently, his main research interests evolve around ultra-low-voltage and ultra-low-power circuits using Schmitt trigger structures in the sub-threshold region with a focus on digital standard cell and memory design.

Markus Brink as a physics graduate student in Paul McEuen’s laboratory atCornell University, investigated electronic properties of low-dimensional nanos-tructures using cryogenic scanning force microscopy combined with electronictransport measurements. He graduated from Cornell University in 2006 and startedas postdoctoral associate in QLab with Michel Devoret at Yale University, where hebuilt and characterized his first superconducting qubit circuits. In 2010, he joinedIBM as a researcher at the T. J. Watson Research Center, where he has worked onscaling of classical (CMOS) and quantum hardware.

Carlo Gilardo received his B.S. (2015) and M.S. (2017) in engineering physics atPolitecnico di Milano, Milan, Italy, and is currently pursuing his Ph.D. in electricalengineering at Stanford University, Stanford, CA. His current research interestsinclude modeling and simulation of nanoscale carbon nanotube electronic devicesand technology assessment and benchmarking.

Edoardo Charbon (SM’00–F’17) received the Diploma from ETH Zurich, theM.S. from the University of California at San Diego, and the Ph.D. from theUniversity of California at Berkeley in 1988, 1991, and 1995, respectively, all inelectrical engineering and EECS. He has consulted with numerous organizations,including Bosch, X-Fabs, Texas Instruments, Maxim, Sony, Agilent, and theCarlyle Group. He was with Cadence Design Systems from 1995 to 2000 and withCanesta from 2000 to 2002. Since 2002, he is a member of the faculty of EPFL, fullprofessor since 2015. From 2008 to 2016, he was a full professor and chair of VLSIdesign with Delft University of Technology. He has been the driving force behindthe creation of CMOS SPAD technology, which is mass produced since 2015 andthe core of telemeters, proximity sensors, and medical diagnostics. His interestsspan from 3D vision, LiDAR, FLIM, FCS, NIROT to super-resolution microscopy,time-resolved Raman spectroscopy, and cryo-CMOS circuits and systems forquantum computing. He has authored or co-authored over 350 papers and twobooks, and he holds 21 patents. He has received several best paper awards and theprestigious award for best academic research team in Europe (London, 2019). He isa distinguished visiting scholar of the W. M. Keck Institute for Space at Caltech, afellow of the Kavli Institute of Nanoscience Delft, and a fellow of the IEEE.

E. J. Chichilnisky is the John R. Adler Professor of Neurosurgery and Professor ofOphthalmology, at Stanford University, where he has worked since 2013.Previously, he worked at the Salk Institute for Biological Studies for 15 years. Hereceived his B.A. in mathematics from Princeton University and his M.S. inmathematics and Ph.D. in neuroscience from Stanford University. His research has

Editors and Contributors xi

focused on understanding the spatiotemporal patterns of electrical activity in theretina that convey visual information to the brain, and their origins in retinal cir-cuitry, using large-scale multi-electrode recordings. His ongoing work now focuseson using basic science knowledge along with electrical stimulation to develop anovel high-fidelity artificial retina for treating incurable blindness. He is therecipient of an Alfred P. Sloan Research Fellowship, a McKnight Scholar Award, aMcKnight Technological Innovation in Neuroscience Award, and a Research toPrevent Blindness Stein Innovation Award.

Francesco Conti is a postdoctoral researcher at the IIS Laboratory, ETH Zurich,Switzerland, and the EEES Laboratory, University of Bologna, Italy, where hereceived his Ph.D. in 2016. His research focuses on enabling sophisticated AIcapabilities on ultra-low-power computers, working on the full pipeline “fromalgorithm to silicon” to achieve that goal. He has co-authored more than 40 papersin international conferences and journals, and he has been the recipient of three BestPaper Awards and the 2018 HiPEAC Tech Transfer Award.

Wim Dehaene was born in Nijmegen, The Netherlands, in 1967. He received theM. Sc. degree in electrical and mechanical engineering in 1991 from the KatholiekeUniversiteit Leuven. In November 1996, he received the Ph.D degree at theKatholieke Universiteit Leuven. In the beginning of his career, he joined AlcatelMicroelectronics, Belgium. There he was a senior project leader for the feasibility,design, and development of mixed mode systems on chip. The application domainswere telephony, xDSL, and high-speed wireless LAN. In July 2002, he joined thestaff of the ESAT-MICAS laboratory of the Katholieke Universiteit Leuven wherehe is now a full professor and head of the MICAS division. His research domain isthe circuit-level design of digital circuits. The current focus is on ultra-low-powersignal processing and memories in advanced CMOS technologies. Part of thisresearch is performed in cooperation with IMEC, Belgium, where he is also apart-time principal scientist. He is a senior member of the IEEE. He was thetechnical program chair for ESSCIRC 2017. He is a member of the ESSCIRC/ESSDERC steering committee and the ESSCIRC technical program committee. Hehas also served for several years on the ISSCC program committee.

Albert Frisch studied quantum optics and atomic physics at the Institute ofExperimental Physics at the University of Innsbruck where he graduated in 2014.His PhD thesis on Dipolar Quantum Gases of Erbium was awarded the thesis prizeby the Institute of Quantum Optics and Quantum Information at the AustrianAcademy of Sciences. In 2015, he worked at this institute as a postdoctoral researchscientist before he joined IBM Research and Development in Böblingen, Germany.He started as a circuit design engineering professional working on IBM’shigh-performance processor series P and Z. He primarily focussed on array designand physical design verification. Further, he co-developed an automated buildprocess for synthesized soft arrays. Since 2017, he was additionally engaged in thehardware and software development for IBM Q. He contributed on several layersof the system including the design of classical hardware components for the IBM Q

xii Editors and Contributors

System One, the superconducting chip design, as well as the quantum softwaredevelopment kit Qiskit. He co-supervised an Extreme Blue internship out of whichan efficient implementation of the well-known HHL quantum algorithm for solvinglinear systems of equations was developed and contributed to Qiskit. Today, he isworking on ion trap quantum computers.

Jacob Goeppert was born in Lahr, Germany, in 1984. He received the Dipl.-Ing.(M.Sc.) degree in microsystems engineering from the University of Freiburg,Germany, in 2010. From 2010 to 2019, he was with the Fritz Huettinger Chair ofMicroelectronics, Department of Microsystems Engineering (IMTEK), University ofFreiburg, Germany, where he worked in his Ph.D. degree. During this time, hisresearch focus lay on of ultra-low-voltage, ultra-low-power digital circuits, andthermoelectrical energy-harvesting interfaces. Since 2019, he is with Hahn-Schickard,Villingen-Schwenningen, Germany, where he is working as a research engineercontinuing his work on low-voltage digital circuits in addition to inference hardwarefor machine learning systems.

Thorsten Hehn received the Dipl.-Ing. degree in microsystems engineering fromthe University of Freiburg, Germany, in 2006 and the Dr.-Ing. degree inmicrosystems engineering from the University of Freiburg in 2014.

From December 2006 to September 2012, he was a research assistant with theFritz Huettinger Chair of Microelectronics, Department of MicrosystemsEngineering (IMTEK), University of Freiburg. From December 2006 to December2009, he was a fellow in the graduate school micro energy harvesting, funded bythe German Research Foundation (DFG).

In October 2012, he joined Hahn-Schickard, Villingen-Schwenningen,Germany, as a research assistant in the group “Energy Autonomous Systems.” Asof February 2016, he is leading the group “Electronic Systems” which developslow-power embedded hardware and software for sensor systems. His researchinterests include low-power electronics, cyber-physical sensor systems, powermanagement, energy harvesting, and stress measurement.

Daniel Hoffmann received his Dipl.-Ing. degree (M.Eng.) in mechanical engi-neering from the Technical University of Ilmenau, Germany, in 2002. From 2002 to2006, he was a research scientist at the Tyndall National Institute in Cork, Ireland,and obtained his Ph.D. degree in microelectronics engineering from UniversityCollege Cork, Ireland, in 2006.

In 2007, he joined the group “Energy Autonomous Systems” at Hahn-Schickardin Villingen-Schwenningen, Germany, where he worked in the field of kineticenergy harvesting systems as a postdoctoral research fellow.

From 2016 to 2020, he was the head of the group “Energy AutonomousSystems” at Hahn-Schickard. His main field of research was the design and opti-mization of kinetic energy harvesting devices with emphasis on frequency-tunabledevices and rotational systems. He now joined the group “Inertial Sensor Systems”at Hahn-Schickard working on low-power and zero power microsystems.

Editors and Contributors xiii

Makoto Ikeda received the B.E., M.E. and Ph.D. degrees in electrical engineeringfrom the University of Tokyo, Tokyo, Japan, in 1991, 1993 and 1996, respectively.He is a professor at the University of Tokyo. His research interests includinghardware security, asynchronous circuits design, smart image sensor for 3D rangefinding and time-domain circuits for associate memories. He is a program vice-chairof International Solid-State Circuits Conference 2020 (ISSCC 2020). He was atechnical program chair (2016–2017), a symposium chair and an executive com-mittee member for the symposium on VLSI circuits, a technical program chair forAsian Solid-State Circuits Conference 2015 (A-SSCC 2015) and also a chair forIEEE SSCS Japan Chapter. He is an elected IEEE SSCS AdCom member for 2020–2022. He is a senior member of IEEE, IEICE Japan, and member of IPSJ and ACM.

Shiro Kamohara received the B. S. degree in physics from Keio University in1986, M. E. degree from University of Tokyo Institute Technology in nuclearengineering in 1988 and Ph.D. from Tokyo metropolitan University in electricaland electronic engineering in 2008. He joined the Central Research Laboratory ofHitachi Ltd. in 1988. Since 1995, he was the member of Semiconductor & andIntegrated Circuit Div. of Hitachi Ltd. He is a member of Renesas Technology Corpsince 2003 and Renesas Electronics Corp since 2010. He is now the director ofbusiness unit for SOTB products. He was the visiting industrial fellow of theUniversity of California at Berkeley in 1996.

Alireza Kaviani is a distinguished engineer at Xilinx Research Laboratories with afocus on the next-generation FPGA architectures and tools. He has more than 25years of FPGA and ASIC industry experience in the areas of architecture, tools, ICdesign, and applications. He has authored more than 55 patents and publications ina number of areas, including clocking, asynchronous design, FPGA architecture,and CAD tools. He is a senior IEEE member and holds a Ph.D. degree fromUniversity of Toronto in electrical and computer engineering.

Katsuyuki Kimura received the M.S. in information and computer science fromKeio University in 2002. His major is processor and LSI architecture. From 2002 to2016, he worked on the hardware of media processors, multimedia CODECs andimage recognition at Center for Research and Development, Toshiba Corporation.Since 2017, he has been working on the development of an automotive SoC atElectronic Devices and Storage Research and Development Center, ToshibaElectronic Devices and Storage Corporation.

Dr. Binh Le is an assistant professor of electrical engineering at San Jose StateUniversity and a researcher at Stanford University. His current research interestsinclude non-volatile memory, carbon electronics, brain-inspired computing, brain–machine interface, and especially high-performance and energy-efficient analog/digital machine learning systems using emerging memory technologies. His recentpublication on the topic was highlighted in the Nature Electronics journal, February2019 issue. He received his B.S. degree in electrical engineering and computersciences from the University of California, Berkeley, in 1994, his M.S and Ph.D.degrees in electrical engineering from Stanford University in 1999 and 2004,

xiv Editors and Contributors

respectively. He has more than 20 years of experience working in the semiconductorindustry where his last position was the director of Design Engineering at SanDiskCorporation. He is a senior member of the Institute of Electrical and ElectronicsEngineers (IEEE) and has authored or co-authored 59 US patents.

Zhichun Lei was born in Qian’an, China, in 1964. He received the B.S. degree incommunication technology from Tianjin University, China, in 1986, the M.S.degree in communication and electronic system from Tianjin University in 1989and the Ph.D. degree in electronic engineering and information technology fromUniversity of Dortmund, Germany, in 1998. From 1989 to 1993, he was a scientificassistant in Department of Electronic Engineering, Tianjin University, China. From1994 to 1998, he was a scientific assistant at Chair for Communication Technology,Circuits and Systems Laboratory, University of Dortmund, Germany. From 1998 to2001, he was a scientific assistant at Philips Research Laboratory, Aachen,Germany. From 2001 to 2011, he was an engineer at Sony European TechnologyCenter in Stuttgart, Germany. Since 2011, he has been a professor at Institute ofMeasurement Engineering and Sensor Technology, University of Applied SciencesRuhr West, Germany. Since 2014, he has held a second professorship at School ofMicroelectronics, Tianjin University, China. His research interests include highdynamic range and wide color gamut.

Haitong Li is a Ph.D. candidate in electrical engineering at Stanford University,supervised by Prof. H.-S. Philip Wong. He received M.S. in electrical engineeringfrom Stanford University in 2017 and B.S. in microelectronics from PekingUniversity, China, in 2015. His research theme is centered around energy-efficientmachine learning hardware enabled by emerging nanotechnologies (e.g., 3Dresistive memories), with over 30 publications and 800 citations to date. Hereceived 2019 IEEE EDS Ph.D. Student Fellowship, 2016 IEEE EDS MastersStudent Fellowship, Best Paper Award at 2016 SRC TechCon, and Best Papernomination at 2016 Symposium of VLSI Technology.

Yiannos Manoli holds a B.A. degree (summa cum laude) in physics and mathe-matics, a M.S. degree in electrical engineering and computer science from theUniversity of California, Berkeley, and the Dr.-Ing. degree in electrical engineeringfrom the Gerhard Mercator University, Duisburg, Germany.

He was a research assistant at the University of Dortmund, Germany, beforejoining the Fraunhofer Institute of Microelectronic Circuits and Systems inDuisburg in 1985. There he established a design group for microsystem andmicrocontroller integrated circuits. In1996, he was appointed as a chair of micro-electronics in the department of electrical engineering at the University of Saarland,Saarbrücken, Germany.

He joined the department of microsystems engineering (IMTEK) at theUniversity of Freiburg, Germany, in 2001, where he holds the Fritz HuettingerChair of Microelectronics. Since 2005, he additionally serves as a director of theHahn-Schickard Institute in Villingen-Schwenningen, Germany.

Editors and Contributors xv

He received Best Paper Awards from ESSCIRC 1988, 2009, and 2012,MWSCAS 2007, MSE 2007, and PowerMEMS 2006. For his creative and effectivecontributions to the teaching of microelectronics and the design of a web-basedvisualization of circuit functionality (Spicy VOLTsim, www.imtek.de/svs), hereceived various awards including the Excellence in Teaching Award of theUniversity of Freiburg and the Teaching Award of the State of Baden-Württemberg,both in 2010.

Subhasish Mitra is a professor of electrical engineering and of computer scienceat Stanford University, where he co-leads the computation focus area of theStanford SystemX Alliance and is a faculty member of the Wu Tsai NeurosciencesInstitute. He also holds the Carnot Chair of Excellence in NanoSystems atCEA-LETI in Grenoble, France. His research ranges across robust computing,NanoSystems, electronic design automation (EDA), and neurosciences. Resultsfrom his research group have been widely deployed by industry and have inspiredsignificant development efforts by government and research organizations in mul-tiple countries. Jointly with his students and collaborators, he demonstrated the firstcarbon nanotube computer and the first three-dimensional NanoSystem withcomputation immersed in data storage. These demonstrations received widespreadrecognitions: cover of NATURE, Research Highlight to the U.S. Congress by theNSF, and highlights by news organizations worldwide. In the field of robustcomputing, he and his students created key approaches for soft error resilience,circuit failure prediction, CASP on-line self-test and diagnostics, and QED designverification and system validation. His X-Compact test compression has provenessential to cost-effective manufacturing and high-quality testing of almost allelectronic systems. X-Compact and its derivatives have been implemented inwidely used commercial EDA tools. His honors include the ACM SIGDA /IEEE CEDA Newton Technical Impact Award in EDA (a test of time honor), theSemiconductor Research Corporation’s Technical Excellence Award (for innova-tion that significantly enhances the semiconductor industry), the Intel AchievementAward (Intel’s highest corporate honor), and the Presidential Early Career Awardfor Scientists and Engineers from the White House. He and his students havepublished many award-winning papers at major venues. He is a fellow of the ACMand the IEEE.

Dante Gabriel Muratore is an assistant professor of Microelectronics at the DelftUniversity of Technology. He received the B.S. degree and the M.S. degree inelectrical engineering from Politecnico of Turin in 2012 and 2013, respectively.He received the Ph.D. degree in microelectronics from University of Pavia in 2017.From 2015 to 2016, he was a visiting scholar at MTL laboratories at theMassachusetts Institute of Technology. From 2016 to 2020, he was a postdoctoralfellow at Stanford University. He is the recipient of the Wu Tsai NeurosciencesInstitute Interdisciplinary Scholar Award. His research focuses on hardware designfor brain–machine interfaces, bioelectronics, sensor interfaces, andmachine learning.

xvi Editors and Contributors

Clara Nieto Taladriz Moreno was born in Madrid, Spain, in 1994. She receivedthe B.S. with honors in Ingeniería de Tecnologías y Servicios de Telecomunicaciónfrom the Univeridad Politécnica de Madrid (UPM), Spain, in 2016. She got herM.S. degree with honors in telecommunication engineering from the UPM in 2018,after completing the second year in the University of KU Leuven (KUL), Belgium.Since 2018, she has been a research assistant at the MICAS division of thedepartment of electrical engineering (ESAT) at the KU Leuven. She has beenworking on the design of ultra-low-voltage energy-efficient digital circuits under thesupervision of Prof. Wim Dehaene.

Kunle Olukotun is the Cadence Design Systems professor of electrical engi-neering and computer science at Stanford University. Olukotun is well known as apioneer in multicore processor design and the leader of the Stanford Hydra chipmultiprocessor (CMP) research project and the founder of Afara Websystems,which designed the Niagara processors. Olukotun currently directs the StanfordPervasive Parallelism Laboratory (PPL), which seeks to proliferate the use ofheterogeneous parallelism in all application areas using domain-specific languages(DSLs). Olukotun is an ACM fellow and IEEE fellow.

Zvi Or-Bach is the founder and CEO of MonolithIC 3D™ Inc. He is a worldrecognized expert in monolithic 3D technologies, past chairman of the 3D of IEEES3S Conference, and is active as an invited speaker and tutorial instructor in theUSA, Korea, and Japan. He is currently the chairman of the Board for ZenoSemiconductors and VisuMenu. Prior to founding and running MonolithIC 3Dsince 2009, he founded eASIC in 1999 and served as its CEO for six years. eASICwas funded by leading investors, such as Vinod Khosla and KPCB, in three suc-cessive rounds. Intel acquired eASIC in 2018. Under his leadership, eASIC won theprestigious EETimes’ 2005 ACE Award for Ultimate Product of the year in theLogic and Programmable Logic category and the Innovator of the Year Award andwas selected by EE Times to be part of the “Disruptors—The people, products andtechnologies that are changing the way we live, work and play.” Earlier, he foundedChip Express in 1989 and served as the company’s president and CEO for 10 years,bringing the company to $40M revenue. Chip Express was acquired by GigOptixwhich was later acquired by IDT. He received his B.Sc. degree (1975) cum laude inelectrical engineering from the Technion-Israel Institute of Technology, and M.Sc.(1979) with distinction in computer science, from the Weizmann Institute, Israel.He holds over 251 issued patents.

Rebecca Park received her B.S. from Cornell University and is currently a Ph.D.candidate in electrical engineering at Stanford University, under the supervision ofProfessor H.-S. Philip Wong and co-advised by Professor Subhasish Mitra. Hercurrent research interest is in the development of high-performance and energy–efficient nanoelectronics, in which she has focused on carbon nanotube-based FETs.She is a recipient of the Intel/SRCEA Masters Scholarship (2014–2016), theIntel/SRCEA Ph.D. Fellowship (2016–2019), and a finalist to participate in theRising Stars Women in Engineering Workshop (2018). She has interned at IBM

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(summer 2017) working on carbon nanotube transistors and at Apple (summer2018) as a flat panel display engineer.

Raghu Prabhakar is a senior principal engineer and one of the founding engi-neers at SambaNova Systems. His research interests include designing high-levelprogramming models, compiler optimizations, and novel architectures with a focuson reconfigurable hardware. He holds a Ph.D. in computer science from StanfordUniversity, where he was advised by Prof. Kunle Olukotun and Prof. ChristosKozyrakis. He earned a M.S. in computer science from UCLA. He is a member ofIEEE and ACM.

Robert M. Radway is a Ph.D. student in electrical engineering at StanfordUniversity. His research focuses on performance benefits, design, and thermalconsiderations for monolithic 3D systems (through the DARPA 3DSoC Program).He has worked on emerging non-volatile memories such as resistive RAM, aimingto increasing effective density (multiple bits-per-cell, 1T4R designs) and improvingresilience through development of endurance management techniques. He com-pleted his bachelor’s and master’s at the Massachusetts Institute of Technology inEECS. For his Master’s thesis, he developed designs and processes for thermallyefficient GaN HEMTs fabricated via wafer bonding.

Dennis Rich is currently pursuing a Ph.D. at Stanford University, advised byProf. Subhasish Mitra. He received his dual B.S. in electrical engineering andengineering physics from the University of Illinois at Urbana-Champaign, inves-tigating thin-film device fabrication advised by Prof. Can Bayram. His currentresearch interests include addressing system-level design and fabrication challengesof emerging nanotechnologies and nanosystems. Previously, he worked atNorthwestern University investigating carbon nanotube fabrication and at SiliconLaboratories. He is a recipient of the Goldwater Scholarship, the BardeenUndergraduate Award, and the Robert C. MacClinchie Scholarship.

Peter Hans Roth received his Dipl.-Ing. degree in electrical engineering and hisDr.-Ing. degree from the Stuttgart University in 1979 and 1985, respectively. In1985, he joined the IBM Germany Research and Development Laboratory, startingin the department of VLSI logic chip development. Since 1987, he has been leadingthe VLSI test and characterization team of the Boeblingen Laboratory. Later on, hewas leading several development projects in the area of IBM’s mainframe andpower microprocessors. He also was heavily involved in the development ofgaming products like the cell processor for the Sony Playstation. He owned also thehardware strategy for the IBM Germany Research and Development Laboratory. Inearly 2017, he formed a quantum computing team in the IBM BoeblingenLaboratory, and today he is still involved on several quantum engagements.

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Ulrich Rueckert received the diploma degree (M.Sc.) with honor in computerscience and the Dr.Ing. degree (Ph.D.) with honors in electrical engineering fromthe University of Dortmund, Germany, in 1984 and in 1989, respectively. He joinedthe Department of Electronic Components, University of Dortmund, in 1985, wherehe developed the first VLSI implementation of artificial neural networks in Europe.In February 1990, he accepted the position as a senior researcher at the Departmentof Electronic Components, University of Dortmund. From 1993 to 1995, he was anassociate professor of microelectronics technology of the University ofHamburg-Harburg. From 1995 until 2009, he was a full professor of electricalengineering at the University of Paderborn. As a member of the Heinrich-NixdorfInstitute, he held the Chair “System and Circuit Technology”. Since 2009, he hasbeen at the Cognitive Interaction Technology Center of Excellence at the Universityof Bielefeld, heading the Research Group Cognitronics and Sensor Systems. Since2001, he has been adjunct professor of the Faculty of Information Technology at theUniversity of Technology, Brisbane, Australia. In 2006, he received the firstInnovation Award of North-Rhine Westfalia (together with his colleagueProf. Noé). His main research interests are bio-inspired architectures for neuralinformation processing and cognitive robotics. He has held many internationalpositions, including the committee for the European Brain project.

Dr. Manuele Rusci is currently a postdoctoral researcher at the Energy-EfficientEmbedded Systems Laboratory, University of Bologna, Italy. He received the Ph.D.degree in electronics from the same university in 2018. His main research interestsinclude low-power embedded systems and AI-powered smart sensors, working atthe intersection between machine learning and HW-SW system co-design.

Mohamed M. Sabry Aly is an assistant professor at Nanyang TechnologicalUniversity, Singapore. He received his Ph.D. degree in electrical and computerengineering from École Polytechnique Fédérale de Lausanne (EPFL), in 2013. Hewas a postdoctoral research fellow at Stanford University from 2014 to 2017. Hiscurrent research interests include system-level design and optimization of com-puting systems enabled by emerging technologies. He is an active close collabo-rator with Stanford University and a founding member of the N3XT project atStanford University. He was the recipient of the Swiss National Science FoundationEarly Postdoctoral Mobility Fellowship in 2013.

Daniel A. Sanchez was born in Tepic, Mexico. He received his B.Sc. degree inelectronic engineering from the Western Institute of Science and Technology(ITESO), Guadalajara, Mexico, in 2006, and the M.Sc. in microsystems engi-neering from the University of Freiburg, Germany, in 2012.

From 2006 to 2009, he worked in the Research and Development Center atContinental Automotive, Guadalajara, Mexico, designing instrument clusters forpassenger cars. Between 2010 and 2011, he was with Corporate Technology,Siemens AG, Munich, Germany, working on piezoelectric harvesters. Between2012 and 2017, he was with the Fritz Huettinger Chair of Microelectronics,University of Freiburg, Germany, working toward his Ph.D. degree, where he

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researched about efficient interface circuits for energy harvesting devices withspecial focus on integrated circuit design. Since 2017, he is with Hahn-Schickard inFreiburg, Germany, where he leads the microelectronics group.

He received second place in the statewide basic sciences challenge, Nayarit,Mexico, in 2002. In 2009, he was awarded with a DAAD-CONACYT scholarshipand in 2016 with a Fritz Huettinger fellowship.

Fabio Sebastiano received the B.Sc. (cum laude) and M.Sc. (cum laude) degreesin electrical engineering from the University of Pisa, Italy, in 2003 and 2005,respectively, the M.Sc. degree (cum laude) from Sant’Anna school of AdvancedStudies, Pisa, Italy, in 2006, and the Ph.D. degree from Delft University ofTechnology, The Netherlands, in 2011. From 2006 to 2013, he was with NXPSemiconductors Research in Eindhoven, The Netherlands, where he conductedresearch on fully integrated CMOS frequency references, deep-submicron tem-perature sensors, and area-efficient interfaces for magnetic sensors. In 2013, hejoined Delft University of Technology, where he is currently an assistant professor.He has authored or co-authored one book, 11 patents, and over 60 technical pub-lications. His main research interests are cryogenic electronics for quantum com-puting, quantum computing, sensor read-outs, and fully integrated frequencyreferences. He has been a member of the “Emerging technologies” subcommitteeof the technical program committee of the RFIC symposium. He was a co-recipientof the best student paper at ISCAS in 2008, the Best Paper Award at IWASI in2017, and the Best IP Award at DATE in 2018. He is a distinguished lecturer of theSolid-State Circuit Society.

Daniel Schillinger was born in Freiburg im Breisgau, Germany, in 1985. At theAlbert Ludwig University, Department of Microsystems Engineering–IMTEK,Freiburg im Breisgau, Germany, he received the bachelor’s degree in microsystemsengineering in 2009 as well as the master’s degree in 2012. After that he became aPh.D. candidate in the Fritz Huettinger Chair of Microelectronics.

Since 2017, he is additionally a part of the electronics systems design group,Hahn-Schickard, Villingen-Schwenningen, Germany, where he is working in thefield of energy harvesting and RFID.

His current research interests are in efficient power processing circuits forvibration-based energy harvesters, where he is focusing on integrated circuit designas well as implementations with discrete components, and the power managementfor wireless and self-sustaining autonomous sensor systems. Currently, he is alsoinvolved in the development of long-lasting highly efficient LED drivers forlighting applications as well as in the development of a telemetric interface for astrain measurement chip in industrial applications.

He was a recipient of the German Research Foundation scholarship GRK 1322:Micro Energy Harvesting, in 2013.

Markus Strobel received his degree in electrical engineering (Dipl.-Ing.) from theUniversity Stuttgart, Germany, and heads the Department Vision Sensors at theInstitute for Microelectronics Stuttgart (IMS CHIPS). He has been with IMS CHIPS

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since 1997 and focusses on CMOS Imaging including the development of loga-rithmic high dynamic range CMOS (HDRC) image sensors, optical characteriza-tion, optical and electrical test environments as well as camera system integrationfor automotive, autonomous, industrial and custom-specific applications. Recentresearch topics cover high dynamic range imagers with linear characteristics as wellas photonic or plasmonic nanostructures to build multispectral CMOS sensors.

Nobuyuki Sugii received the B.S., M.S. and Ph.D. degrees in applied chemistryfrom the University of Tokyo in 1986, 1988 and 1995, respectively. He joined theCentral Research Laboratory, Hitachi, Ltd. in 1988. Since 1996, he has beenworking on the research and development of CMOS devices, including strainedsilicon and SOI. From 2010 to 2015, he served as a research group leader for theLow-Power Electronics Association and Project and developed ultralow-powerthin-BOX FDSOI (named SOTB) process and design environment for ICs oper-ating down to 0.4 V. From 2004 to 2015 and 2018–2020, he served as a visitingprofessor with the Tokyo Institute of Technology. He is currently with the Researchand Development Group, Hitachi, Ltd., where he is researching on sensing devicesand systems, and energy management systems fully utilizing renewables. He hasbeen a technical committee member of the IEEE VLSI Technology (2012-2019),the International Symposium on Solid-State Devices and Materials (2014–2017)and the IEEE S3S Conference (2011-). He is a fellow of the Japan Society ofApplied Physics.

Roel Uytterhoeven was born in Sint-Truiden, Belgium, in 1992. He received theM.S. degree in electrical engineering magna cum laude from KU Leuven, Belgium,in 2015. He is currently working as a research assistant with the ESAT-MICASlaboratories at KU Leuven. Here, he pursues a Ph.D. degree under the supervisionof Prof. Dr. Ir. Wim Dehaene in the field of ultra-energy-efficient digital circuitsthrough near/subthreshold supply voltage operation. For this research, he is beingsponsored by the Research Foundation Flanders (FWO) with an SB-fellowship.

Bob Vanhoof was born in Leuven, Belgium, in 1994. In 2017, he received theM.Sc. degree in electrical engineering from the KU Leuven with a master’s thesisabout the implementation on FPGA of the IEEE802.11ad PHY. Currently, he is aresearch assistant at MICAS where he is working toward the Ph.D. degree. Hisresearch interest lies in the fields of ultra-low-energy design and SRAM design.

Marian Verhelst is an associate professor at the MICAS laboratories of the EEdepartment of KU Leuven. Her research focuses on embedded machine learning,hardware accelerators, HW-algorithm co-design, and low-power edge processing.Before that, she received a Ph.D. from KU Leuven in 2008, was a visiting scholar atthe BWRC of UC Berkeley in the summer of 2005, and worked as a researchscientist at Intel Laboratories, Hillsboro, OR from 2008 to 2011. She is a memberof the DATE and ISSCC executive committees, is TPC co-chair of AICAS2020 andtinyML2020, and TPC member DATE and ESSCIRC. She is an SSCS distin-guished lecturer, was a member of the Young Academy of Belgium, an associateeditor for TVLSI, TCAS-II, and JSSC, and a member of the STEM advisory

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committee to the Flemish Government. She currently holds a prestigious ERCStarting Grant from the European Union and was the laureate of the RoyalAcademy of Belgium in 2016.

Andrei Vladimirescu received the M.S. and Ph.D. degrees in EECS from theUniversity of California, Berkeley, where he was a key contributor to the SPICEsimulator, releasing the SPICE2G6 production-level SW in 1981. He pioneeredelectrical simulation on parallel computers with the CLASSIE simulator as part ofhis Ph.D. He is the author of “The SPICE Book” published by J. Wiley and Sons.For many years, he was R&D director leading the design and implementation ofinnovative software and hardware electronic design automation (EDA) products forAnalog Devices Inc., Daisy Systems, Analog Design Tools, Valid Logic, andCadence Design Systems. Currently, he is a professor involved in research at theUniversity of California at Berkeley, Delft University of Technology, and theInstitut Superieur d’Electronique de Paris, ISEP, as well as a consultant to industry.His research activities are in the areas of design, simulation, and modeling ofCMOS circuits, new devices, and circuits for quantum computing. He is an IEEElife fellow.

Gordon Wetzstein is an assistant professor of electrical engineering and, bycourtesy, of computer science at Stanford University. He is the leader of theStanford Computational Imaging Laboratory and a faculty co-director of theStanford Center for Image Systems Engineering. At the intersection of computergraphics, machine vision, optics, scientific computing, and applied vision science,his research has a wide range of applications in next-generation imaging, display,wearable computing, and microscopy systems. Prior to joining Stanford in 2014, hewas a research scientist in the Camera Culture Group at MIT. He received a Ph.D.in computer science from the University of British Columbia in 2011 and graduatedwith honors from the Bauhaus in Weimar, Germany, before that. He is the recipientof an NSF CAREER Award, an Alfred P. Sloan Fellowship, an ACM SIGGRAPHSignificant New Researcher Award, a Presidential Early Career Award forScientists and Engineers (PECASE), an SPIE Early Career Achievement Award, aTerman Fellowship, an Okawa Research Grant, the Electronic Imaging Scientistof the Year 2017 Award, an Alain Fournier Ph.D. Dissertation Award, and a LavalVirtual Award as well as Best Paper and Demo Awards at ICCP 2011, 2014, and2016 and at ICIP 2016.

H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School ofEngineering. He joined Stanford University as a professor of electrical engineeringin September 2004. From 1988 to 2004, he was with the IBM T.J. Watson ResearchCenter. At IBM, he held various positions from research staff member to managerand senior manager. While he was a senior manager, he had the responsibility ofshaping and executing IBM’s strategy on nanoscale science and technology as wellas exploratory silicon devices and semiconductor technologies. His research aims attranslating discoveries in science into practical technologies. His works havecontributed to advancements in nanoscale science and technology, semiconductor

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technology, solid-state devices, and electronic imaging. His present research coversa broad range of topics including carbon electronics, 2D-layered materials, wirelessimplantable biosensors, directed self-assembly, device modeling, brain-inspiredcomputing, non-volatile memory, and monolithic 3D integration. He is a fellowof the IEEE. He served as the editor-in-chief of the IEEE Transactions onNanotechnology (2005–2006), subcommittee chair of the ISSCC (2003–2004),general chair of the IEDM (2007), and is currently the chair of the IEEE ExecutiveCommittee of the Symposia of VLSI Technology and Circuits. He is the facultydirector of the Stanford Non-Volatile Memory Technology Research Initiative(NMTRI) and is the founding faculty co-director of the Stanford SystemXAlliance—an industrial affiliate program focused on building systems.

Yutaka Yamada received the B.E. and M.E. degrees from Keio University,Yokohama, Japan, in 2003 and 2005, respectively. He joined Toshiba Corporation,Kawasaki, Japan, in 2005. He was involved in the research and development ofreconfigurable processors and image processing accelerators. Since 2017, He iscurrently working as a research engineer in the Research and Development Center,Toshiba Electronic Devices and Storage Corporation, Kawasaki, Japan. His currentresearch interests include the area of image recognition accelerators, image signalprocessors and system architecture for automotive SoCs. He is a member of IEEEand IEICE.

Ms. Xin Yu was born in Zhangjiakou, China, in 1995. She has received the B.S.degree in communication engineering from Hebei University of Technology,Tianjin, China, in 2017 and received the M.S. degree in information and com-munication engineering from Tianjin University, Tianjin, China, in 2020. From2017 to 2020, she was a postgraduate at School of Microelectronics, TianjinUniversity, China. Her research interests include image and video acquisition andreproduction, image and video codec. As of March 2020, she will work as asoftware engineer at Huawei Technologies Co., Ltd.

Yaqi Zhang is a Ph.D. candidate in the electrical engineering department atStanford University. She received a B.S. in electrical engineering from DukeUniversity. Her research has been focusing on the architectural design of andcompilation to reconfigurable hardware accelerators. Specifically, she has workedon an on-chip network design that improves the scalability of the accelerator. Shealso worked on compilation techniques that enhance programming abstraction andenhances the utilization and composability of reconfigurable architectures.

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