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TI space products portfolio update December 2016 Hot links: Products and references: http://ti.com/space Space and High-reliability Learning Center Space Components Guide

TI space products portfolio update - TI training and … space products portfolio update December 2016 Hot links: Products and references: Space and High-reliability Learning Center

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TI space products portfolio update

December 2016

Hot links:

Products and references: http://ti.com/space

Space and High-reliability Learning Center

Space Components Guide

Agenda

• Solutions for a variety of space applications

– High Speed Signal Chain

– Precision Signal Chain

– FPGA Power

• Space products portfolio highlights

• New space product highlights

– TPS7H3301-SP: 3 Amp Source-Sink DDR Termination Regulator w/ Built-in VREF

– ADS1282-SP: High Resolution Delta Sigma ADC w/PGA for Space Sensing

• Power solution for RTG4™ FPGA with proper sequencing

2

DSP

High Speed ADC

Space High Speed Signal Chain (available today)

Clock Jitter Cleaner

CLK

FPGA CLK

LO

RF IF

ADC

CLK

ADC

LV

DS

Ou

tpu

ts

High Speed Amp

High Speed DAC

RF

FPGA

DDR DDR Complex Mixer

Optional

High Speed DAC

LO

DDR Term

Memory Power

Signal Chain Power

Low Noise LDOs

FPGA/Processor Power

High Power Density DC/DC

Converter

TPS50601-SP 1.6-6.3 VIN, 6 A monolithic POL

Peak Efficiency: 95% (VOUT = 3.3 V)

Integrated 55-mΩ/50-mΩ MOSFETs

ADC12D1600QML-SP 12-Bit, Single or Dual, 3200/1600/800

MSPS RF Sampling ADC

Available Low Sampling Power Saving

Mode (LSPSM)

CDCM7005-SP 3.3-V High Performance Rad-Tolerant

Class V, Clock Synchronizer And Jitter

Cleaner

THS4511-SP Rad-Tolerant Class V, Wideband, Fully

Differential Amplifier

5 V Power Supply Current: 39.2 mA

LVDS

LVDS

LVDS

DAC5670-SP 14-Bit, 2.4 GSPS DAC

On-Chip 1.2-V Reference

Selectable 2× Interpolation With

Fs / 2 Mixing

SMV320C6727B-SP 32- and 64-Bit 250-MHz Floating-Point,

Rad-tolerant DSPs

TPS7H1101-SP 1.5 -7V Input, 3 Amp, Ultra Low

Dropout Regulator

TPS7A4501-SP Wide Vin Low-Dropout Voltage

Regulator

TPS7H3301-SP 3 Amp Sink/Source DDR Termination

Regulator w/ Built-in VREF

IF

High Speed Amp

Space Thermocouple Data Acquisition (available today)

LDO

EXT REF

Precision ADC

ADC

Seri

al

SP

I

REF

DOUT

MU

X

REF

AVDD

AVSS

+5V

LDO

DVDD

+5V

+3.3V

+4.5V

AINP1

AINN1

PGA

TPS7H1101-SP 1.5-7 VIN, 3A LDO

PSRR: >45 dB at 1 kHz

Low Noise: 20.33 µVRMS

TPS7H1101-SP 1.5-7 VIN, 3A LDO

PSRR: >45 dB at 1 kHz

Low Noise: 20.33 µVRMS

ADS1282-SP High Resolution Delta-Sigma ADC w/PGA for

Space Sensing

124-dB SNR @ 1 kSPS

High Accuracy: THD: –102 dB, INL: 0.5 ppm

TH1 +

VH1

-

Thermocouple

Cu

rren

t

Tra

ns

mit

ter

IRET

FPGA

IR2

IR1

RL

LM4050QML-SP 23 ppm/°C Drift, Low-noise, Precision Shunt

Voltage Reference

Rad-Tolerant FPGA

Space FPGA Power Solution (available today)

TPS7H3301-SP

TPS7H3301-SP

VTT(1)

VTT_REF(1)

VTT(2)

VTT_REF(2)

5 VDC Supply

DDR Power

TPS50601-SP

TPS7H1101-SP

TPS50601-SP

TPS50601-SP

TPS7H1101-SP

TPS50601-SP

TPS50601-SP

SERDES PLL banks

2.5V @ 5A

DDRIO0/9 –

1.5V @ 5A

TPS50601-SP 1.6-6.3 VIN, 6 A monolithic POL

Peak Efficiency: 95% (VOUT = 3.3 V)

Integrated 55-mΩ/50-mΩ MOSFETs

VDDIOx – 3.3/2.5/1.8/1.5/1.2V @ 2A

FMC HPC 1

VDDIOx – 3.3/2.5/1.8/1.5/1.2V @ 2A

FMC HPC 2

SERDES VDDIO

1.2V @ 1.5A

SERDES PLL banks

2.5V @ 5A

VPP & VDDPLL – 3.3V @ 1A

TPS7H3301-SP 3A DDR Termination Regulator

Meets DDR, DDR2, DDR3, LPDDR3,

and DDR4 JEDEC specifications

10mA Buffered VTTREF

VDD Core – 1.2V @ 10A TPS7H1101-SP 1.5-7 VIN, 3A LDO

PSRR: >45 dB at 1 kHz

Low Noise: 20.33 µVRMS

+/- 1.25% Accuracy over Line, Load,

and Temp TPS50601-SP

Power Data Converter Amplifiers Interface/Clocking Embedded Processing

SMV320C6727B-SP 32/64-Bit Floating-Point Digital Signal Processor

SMJ320C6701-SP 32-Bit Floating-Point

Digital Signal Processor

Space Products Portfolio Highlights

TPS50601-SP Current-Mode

Point-Of-Load DC-DC Converter

TPS7H1101-SP 1.5 -7V Input, 3 Amp,

Ultra Low Dropout Regulator

TPS7A4501-SP 2.3-20V Input Low Dropout Voltage

Regulator

TPS7H3301-SP

3A Source-Sink DDR Termination Regulator

ADC12D1600QML-SP 12-bit, 3.2 GSPS RF ADC

ADS5474-SP 14-bit, 400 MSPS ADC

DAC5670-SP 14-bit, 2.4 GSPS DAC

THS4511-SP Differential Amplifier

1.1 GHz BW

LMP2012QML-SP Dual, Precision

Rail-to-Rail Output Op-Amp

LM139AQML-SP Low Power, Low Offset

Voltage Quad Ch. Comparator

SN55LVDS31/2-SP 3.3V Quad LVDS Driver/Receiver

TLK2711-SP 2.5 Gbps SerDes

Transceiver

ADS1282-SP 24/32 Bit Precision ADC

w/integrated PGA & 2 channel MUX

Click on each product for more info

See TI’s entire space product portfolio at:

www.ti.com/space

Le

gacy P

rod

uc

ts

Recen

tly R

ele

ased

For more information on TI’s space portfolio roadmap, please reach out to your local sales representative

Space Product Highlights

TPS7H3301-SP 3Amp Source-Sink DDR Termination Regulator w/ Built-in VREF

Available Today!

Features

• Control Input Voltage: 2.5 and 3.3 V

• VLDO input down to 0.8 V

• Precision Accuracy

• Power Good Output

• 10mA Buffered VTTREF

• Source/Sink VTT voltage output with droop compensation

• Enable Input

• 16 pin CFP (HKR)

• Stable with ceramic output capacitance

• -55° to 125° C operation

NEW Application Notes

• Radiation Evaluation of the TPS7H3301-SP Linear Regulator for Double Data Rate (DDR) Applications

• External Soft-Start Circuit for TPS7H3301-SP Power-Up Sequencing Applications

Radiation Performance

• Total Dose (TID) Tolerance > 100 krad(Si)

• SEL, SEB and SEGR Immune to LET = 65 MeV*mg/cm2

• SEU Immune to LET = 65 MeV*mg/cm2

Benefits

• 5962R1422801VXC RHA 100 krad qualified

• Meets DDR, DDR2, DDR3, LPDDR3, and DDR4 JEDEC Specifications

• Lower cost and size than competing discrete design enabling very small form factor designs

• System protection with current limit

• Controlled turn-on and monitored output regulation

• Power savings through separate LDO input

Functional Block Diagram

www.ti.com/product/TPS7H33011-SP

Complete DDR Power Solution TPS7H3301-SP and TPS50601-SP

Customer Needs

• Due to high launch costs for satellites space customers always want to reduce the size of their payload while maintaining optimal power efficiency

• DDR memory designs with active termination require the generation of multiple power rails (VDDQ, VTT, and VTTREF)

• Noise on active termination rail can directly affect signal integrity of DDR communication interface

• In order to function reliably in orbit radiation performance must meet standard program requirements for TID, SEL, and SEE.

• European and Asian customers prefer and sometimes require export free product (EAR99)

• QMLV and RHA certified products for space applications

Optimal Performance Solution (Switcher + Linear)

Benefits

• TPS50601-SP (Switcher for VDDQ)

– Smallest pin count rad hard POL solution on the market by 40%

– Ideal pin placement for compact PCB routing

• TPS7H3301-SP (Linear for VTT and VTTREF)

– Only linear rad hard DDR termination LDO on the market

– Separate low vin input for improved power efficiency

– Low Noise solution to minimize any communication errors

• Total Package

– Smallest DDR Power solution on the market by over 50%

– EAR99 solution for easy export to Europe and Asia

– QMLV and RHA certified products to minimize any customer risk

Peak Efficiency (Switcher) + Low Dropout, Low Noise (Linear Regulator)

Available Today!

ADS1282-SP High Resolution Delta Sigma ADC w/PGA for Space Sensing

Features

• Very High Resolution: – 130dB SNR (250SPS, G = 1) – 125dB SNR (250SPS, G = 16)

• Ultra Linear – THD= -102dB, INL = 0.5ppm

• Two-Channel Input MUX

• Low Power Consumption: 25mW (high-res); 10µW (standby)

• Flexible Digital Filter: – Filter Type: Sinc, FIR, or IIR – Response: Linear or Minimum Phase – FIR Data Rate: 250-4000SPS

• Operating temperature -55 to 125°C

• Packaged in Thermally Enhanced CFP Package

Applications

Benefits

• Allows user to better resolve low level signals found especially in the fields of satellite sensors

• Offers minimal distortion making it an ideal device to convert signals for frequency domain analysis and post-processing

• Low power consumption reduces overall power budget, decreasing costs while increasing efficiency

• Selectable digital filter assures a flexible design that will meet the requirements of the most demanding applications

• QMLV/RHA Qualified 5962L1423101VXC

• Orbital observation Systems (e.g. Satellite, Shuttles, Space Stations, launchers)

• Satellite Sensing

• Space Scientific Instrumentation

Radiation Performance

• TID = 50kRad(Si) RHA • SEL Immune to LET 40MeV • SEU Characterized up to 40MeV

4th order

∆Σ

Mod.

Programmable

Digital Filter

& Calibration

SPI PGA

MUX

In1

In2

AVDD VREF

AVSS DGND

DVDD

Over-Range

Mod. Out

CLK

SYNC

PWDN

RESET

ADS1282-SP

Serial

Interface

I/O

1 to 64

3

Available Today!

www.ti.com/product/ADS1282-SP

Power Solution for RTG4™ FPGA

RTG4™ Power Requirements Power Sequence

– No power-up or power-down sequence required if

FPGA is held in reset until VPP and VDDPLL reach

their minimum recommended level.

– If device not in reset, then

• VPP and VDDPLL must NOT be the last supply

to ramp up and it must reach its minimum

recommended level before the last supply (VDD

or VDDIx) starts ramping up

• SERDES_VDDAIO and VDD must power up at

the same time

Core VDD = 1.2 V

Iq = 400 mA

RTG4™ Power Sequencing Implementation using Microsemi® EVM

RTG4™ Power Sequencing Implementation using Microsemi® EVM cont.

Replaced 12 V wall

adapter with 6 V

1 2 3 4

NOT the last

supply to ramp up

Power up at the

same time

RTG4™ Power Sequencing Implementation using Microsemi® EVM cont.

Thank you!

For additional information on any of these products please reach out to

your local sales representative.

Hot links:

Products and references: http://ti.com/space

Space and High-reliability Learning Center

Space Components Guide