TM L - 1 PROPRIETARY Copyright © 1996-2005 CoWare, Inc. All rights reserved. Tasks: Build the directory structure Import the blocks Combine the encapsulations

TML - 1

PROPRIETARYCopyright © 1996-2005 CoWare, Inc. All rights reserved.

Tasks:• Build the directory structure• Import the blocks• Combine the encapsulations• Save the library• Edit and test the build script

Exercise 11 – Building a LibraryThe purpose of this exercise is to build a block with multiple encapsulations. Once created, you will save it as a library. As you build the library, you will capture and edit a script to automate the building of later versions.

You are to build the displayLib library

The result will be the display library containing two encapsulations and a protocol

TML - 2


Build the directory structure 1. Login and cd to directory “trainClass/library”

2. Create the directory structure. % mkdir displayLib % mkdir displayLib/include % mkdir displayLib/src

3. cd to the working directory % cd displayLib

4. Copy the display block source files from the peripherals library. % cp ../peripherals/include/display*.* include % cp ../peripherals/src/display*.* src

Working directory

Copy the display block source and header files from the peripherals library to the appropriate directory

trainClass/

peripherals/

library/

BuildAuxLib.tcl

AuxiliaryLib.xml

displayLib/auxiliary/

include/

src/

BuildPeriphLib.tcl

PeripheralsLib.xml

include/

src/

include/

src/

TML - 3


Import the Blocks 1. Start the Platform Creator Tool (in the trainClass/library/displayLib directory) % pct

You will see a new project with a workspace (SYSTEM_LIBRARY) containing only default protocols

// 請特別注意開啟 pct 時所在的目錄。因為未來儲存資料和進行模擬時，為了計畫

的可攜性，資料目錄的設定都採用相對路徑。

2. Begin recording your commands In the Details window, select the Console tab. Enter the following command: > start_log BuildDisplayLib.tcl Press the Return key.

3. Open the AMBA Bus library: (We need the TLM bus protocols to import the TLM display block)

From the Platform Creator Menus, select Library->Open… (The Open Library… dialog appears) 在出現的樹狀圖上選擇 $(COWAREHOME)/IP/AMBA_BL and click the Open button (The AMBA bus library appears in the Library Drawer) 4. Import the display TLM block. From the Platform Creator Menus, select Library->Import SystemC Modules… (The Import… dialog appears) Click on the Add button and navigate to the displayLib/src directory. Select the display_APB_TLM.cpp file and click on the OK button. Click on the Include Paths tab. Click the Add button and add the following directories: …/displayLib/include

Note: Platform Creator automatically includes all include paths from all open bus libraries. It means that it is not necessary to explicitly include

…/<install_dir>/IP/AMBA_BL/SystemC/include directory. Click on the OK button. (The block is imported)

TML - 4


5. Import the display Verilog block. (using the menu dialogs) From the Platform Creator Menus, select Library Import HDL… (The Import HDL… dialog appears) Set: Language to Verilog Module Name to display_APB_Vlog Library Name to myLib Click on the Add button in the Files field and add displayLib/src/display_APB.v Click on the Proxy Configuration tab. Set: Output File Name to src/display_APB_Vlog.h // 此即所謂 proxy module 。注意相對路徑。 SystemC Module Name to display_APB_Vlog Vector Port Mapping to sc_uint Scalar Port Mapping to bool Port Mapping to Position Based Compile Source to on // 記得這個選項一定要勾選 Click on the OK button. (The block is imported… Skip to the next task)

Combine the Encapsulations 1. In the Library Drawer, Drag and drop the display_APB_Vlog block onto the display_APB_TLM block.

// 是把 display_APB_Vlog 拉進 display_APB_TLM ，順序不要弄錯2. Rename the system block Select block display_APB_TLM Right click and select Rename from the popup menu. Edit the name to display_APB

3. Add a clock port to the system block Select block display_APB in the SYSTEM_LIBRARY Select the Block Editor tab in the Details window. (bottom window) Place the cursor over the din port and Right click to popup the menu. Select Add from the Ports menu and name it clk.

TML - 5


4. Set the clock and din port parameters In the Details window, click on the Parameter Editor tab, expand the clk port.

(bottom window) Under the Value column, edit the following parameters: Set MasterSlaveness to slave. Category to Clock. Protocol to CLOCK. Expand the din port. Set AddressingMode to 4 Bytes.

5. Map the Verilog encapsulation ports to the protocol pins In the Details window, click on the Block Editor tab. In the Encapsulation field, select display_APB_Vlog. Under the Mapped To column, click on each pin and select the appropriate

encapsulation pin to map the System Block port from the multi-selection menu.

6. Map the clk port Select port clk in the left pane. Set Protocol to CLOCK (if needed) Click on the clk.pin under the Mapped To column and select the appropriate mapping. (When completed, all encapsulation ports should indicate completed mapping by a red check mark.)

Save as a Library // 首先先在 SYSTEM_LIBRARY 點選 AMBA_BL ，接著按滑鼠右鍵選 close 。 1. Select the File Save System Library as… menu selection. In the Save Library dialog window Navigate to the displayLib directory. Enter displayLib as the Library Name. Enter displayLib as the File Name. Click the Save button.

TML - 6


2. Stop the recording of commands. In the Details window, select the Console tab. Enter the following command: > end_log Press the Return key.

3. Quit Platform Creator. Select the File Exit menu selection// 注意：如果這個 library 有什麼參數需要修改，請在 pct 內以 File->Open 方式開

啟，否則以 Library->Open->Browse 方式開啟將無法作任何編輯修改。

Edit and test the build script 1. In an xterm window, edit the displayLib/BuildDisplayLib.tcl file. Examine the contents. Unneeded or duplicate commands can be deleted. Compare your script file with a sample solution at:

library/.displayLib/BuildDisplayLib.tcl Notice the “dot” in the displayLib directory name.

It is a hidden directory. Edit the commands to make them relative to the library working directory. Use the COWAREHOME environment variable when necessary.

2. Test the build script. Execute the script from the command line as: % pcsh ::pct> source BuildDisplayLib.tcl ::pct> quit

Or graphically by % pct And selecting the Tools->Execute Script command.

Correct as needed.

3. Open as a library. Start Platform Creator: % pct Open your new library. Select the Library Open… command. Drag and drop an instance of the display_APB block onto the editing window. Place the cursor over the block and right click to pop up the menu. Can you select the different encapsulations?

4. Close Platform Creator.

---End of Lab Exercise 11---

TM

關於 Excise 11 ，你還必須知道…

1. Encapsulation 到底在做什麼？以 displayLib 為例， displayLib.xml 其實是一個 ”外皮” ，裏面可以包含多個不同抽象層次的 implementations ，但它們都以同一個介面和外界溝通。在本例中，一開始 displayLib_TLM 及 displayLib_Vlog 為兩個獨立模組。由於 displayLib 必須接到 TLM APB Bus ，因此必須將 displayLib_Vlog 整合進 displayLib_TLM 的外皮內，原本 displayLib_Vlog 中各個 APB 的訊號接腳必須以 port mapping 方式對應到 din 這個 TLM port 上。

L - 7PROPRIETARYCopyright © 1996-2005 CoWare, Inc. All rights reserved.

displayLib_TLM(SystemC)

din(TLM)

displayLib_Vlog(Verilog)各種

APB signal pins

clk

displayLib_TLM(SystemC)

din(TLM)

displayLib_Vlog(Verilog)

clk

TML - 8


2. 我只想把 Verilog 程式碼包裝成 PA library 模組…

先觀察 display_APB_TLM.h 的內容#include "systemc.h"#include "AMBA/AMBA.h"

class display_APB_TLM : public sc_module {public: AMBA::APBTarget_inslave_port<1, 32> din; // Ports

SC_HAS_PROCESS(display_APB_TLM);

display_APB_TLM(sc_module_name name) // Constructor : sc_module(name), din("din"), temp(0) { SC_METHOD(printValue); sensitive << din.getReceiveWriteDataTrfEventFinder(); dont_initialize();

SC_METHOD(sendEoT); sensitive << din.getSendEotTrfEventFinder(); dont_initialize(); } void printValue(); // Processes void sendEoT();

private: int temp;};

及 display_APB_TLM.c 的內容

#include "display_APB_TLM.h"

void display_APB_TLM::printValue(void) { din.getWriteDataTrf(); temp = din.WriteDataTrf->getWriteData(); cout << " Data = " << temp << endl;}

void display_APB_TLM::sendEoT(void){ din.getEotTrf(); din.sendEotTrf();}

我們可以寫一個純粹宣告 TLM port 的 display_APB_TLM 模組，在display_APB_TLM.h 內不宣告 constructor 及 processes ，也不實做 display_APB_TLM.c 的內容。當 import 進這種 SystemC 程式碼，我們就得到一個只含 TLM port 的空模組，再依 Exercise 11 的作法將 Verilog 模組和空的 TLM 模組整合即可。

TML - 9


3. 關於 proxy 內的路徑設定

我們在 import HDL 步驟時儲存了一個 displayLib/src/displayLib_Vlog.h 檔案，此即為 proxy ，是 SystemC 和 Verilog 溝通的介面。

#include "systemc.h"

SC_HDL_MODULE( display_APB_Vlog) { sc_in<bool> clk; sc_in<sc_uint<1> > PADDR; sc_in<bool> PENABLE; sc_in<bool> PSEL; sc_in<sc_uint<32> > PWDATA;

std::string hpg_log_lib; std::string hpg_module_name; sc_pvector<std::string* > hpg_vlog_src;

std::string libraryName() { return hpg_log_lib; }

std::string moduleName() { return hpg_module_name; }

cwr_hdlLangType hdl_language_type() { return sc_hdl_module::cwr_verilog; }

sc_pvector<std::string* >& verilogSourceFileList() { return hpg_vlog_src; }

display_APB_Vlog(sc_module_name name, const char* hdlSrcPath="") : sc_hdl_module(name), hpg_log_lib("myLib"), hpg_module_name("display_APB_Vlog") , clk("clk"), PADDR("PADDR"), PENABLE("PENABLE"), PSEL("PSEL"), PWDATA("PWDATA") {

addHDLSource( hpg_vlog_src, hdlSrcPath, "/users/staff/DSD/wdchien/trainClass/library/displayLib/src/display_APB.v");

請注意這裏。這裏的檔案位置都是以絕對路徑標示，但是為了計畫移植到其他電腦的方便性，必須手動改成相對路徑。要注意的是相對路徑的起始點為 “執行模擬所在的目錄”（即 Exercise 14 裏的 trainClass/platform/top 目錄），而非 displayLib.xml 所在目錄或 displayLib_Vlog.h 所在目錄。也就是說路徑要改為../../library/displayLib/src/display_APB.v

} void addHDLSource( sc_pvector<std::string* >& fileList, const char* hdlSrcPath, const char* fileName ) { std::string* tmpStr = NULL; tmpStr = new std::string(hdlSrcPath); if(tmpStr->length() != 0) { *tmpStr += "/"; } *tmpStr += fileName; fileList.push_back(tmpStr); }};

TML - 10


ROM

ARM926

Instruction

din

Display

stub

RAM

APB

mySoftware.cAHB

Data

Tasks:• Examine the working directory• Build platform

- Place blocks- Complete connections- Create memory map- Check system- Export system

• Make application software• Build and run simulation

Exercise 14 - Building a Platform with the ARM926

The purpose of this exercise is to acquire a first experience in using Platform Creator to create a platform. Once created, you will build and run a simulation.

clock

resetdTCMiTCM

Block diagram of platform

A short loop that writes to the

Display block Memory location (size)

0x0(0x100000)

0x400 0000(0x100000)

0xc000 0000(0x2)

20 / 32

20 / 32

1 / 32

32 / 32

32 / 32

AddrBits / DataBits

TML - 11


Examine the working directory 1. Login and cd to directory “platform”

2. List the contents of platform. % ls

3. Examine any files or directories of interest. A brief description is given below.

4. cd to the working directory % cd platform/top

Working directory

software/

obj/

bin/

mySoftware.c

defines.h

startup.s

stacks.c

Makefile

mySoftware.axf

scatter.scf

symbols.dat

trainClass/

peripherals/

library/ platform/

Auxiliary and Peripheral block libraries -

clock, memory, display

Scripts for building a system

Software source to run as appliction on

the platform

top/scripts/

auxiliary/

BuildPeriphLib.tcl

PeripheralsLib.xml

include/

src/

blocks_ARM926.tcl

blocks_ARM7.tcl

connect_ARM7.tcl

connect_ARM926.tcl

memMap_ARM7.tcl

memMap_ARM926.tcl

ARM926/

BuildAuxLib.tcl

AuxiliaryLib.xml

include/

src/

blocks_LTRISC.tcl

connect_LTRISC.tcl

memMap_LTRISC.tcl

TML - 12


Note: The next three sections on Placing Blocks, Completing Connections, and Creating the Memory Map contain detailed instructions and tips for doing these operations in the GUI. If you prefer doing it by script, simply execute the corresponding script in the platform/scripts directory using the Tools Execute Script… menu selection and skip to the next task. The Connections script sets the ARM debugger constructor argument to select the RealView Debugger. If you want the command line debugger, see step 10 under the Complete Connections section.

Place the Blocks 1. Start the Platform Creator Tool ( 在 trainClass/platform 目錄 ) % pct

You will see a new project with a workspace (SYSTEM_LIBRARY) containing only default protocols

2. Open the ARM926 PSP library: From the Platform Creator Menus, select Library Open… (The Open Library… dialog appears) 在出現的樹狀圖上選擇 $(COWAREHOME)/IP/ARM926EJS_AHB_PSP and click the Open button (The ARM926 PSP library appears in the Library Drawer) 3. Place an instance of the ARM926 processor model in the editor window. In the Library Drawer, Select: ARM926EJS_AHB_Model and drag and drop to the editor window (Notice that the block also appears in your work space, System Library, of the Library Drawer)

4. Edit the name of the ARM926 instance Select the ARM926 instance in the editor window Click on the Parameters Editor tab in the Details area (bottom panel). Change the Name field value to i_ARM926 and press the Enter key.

5. Place an instance of ARM926EJS_AHB_Stub in the editor window. Change the Name field value to i_ARM926_Stub and press the Enter key.

6. Place the tightly coupled memory bridges. In the Library Drawer, Select: ARM926EJS_TCM_Bridge and place two instances in the editor window just below the ARM926.

TML - 13


7. Place the tightly coupled memory blocks. In the Library Drawer, Select: ARM926EJS_TCM_Memory and place two instances in the editor window below the TCM bridges. Change the names to i_ITCM and i_DTCM

8. Close the ARM926 PSP library. In the Library Drawer, place the mouse over the library name and right click to open

the pop-up menu. Select close from the pop-up menu.

9. Open the ARM CoProcessor library: From the Platform Creator Menus, select Library Open… (The Open Library… dialog appears) 在出現的樹狀圖上選擇 $(COWAREHOME)/IP/ARM_COPROC and click the Open button (The ARM CoProcessor library appears in the Library Drawer) 10. Place an instance of the ARM CoProcessor in the editor window. In the Library Drawer, Select: ARM_COPROC_Model and drag and drop to the editor window.

11. Close the ARM_COPROC library.

12. Open the AMBA Bus library: From the Platform Creator Menus, select Library Open… (The Open Library… dialog appears) 在出現的樹狀圖上選擇 $(COWAREHOME)/IP/AMBA_BL and click the Open button (The AMBA Bus library appears in the Library Drawer)

TML - 14


13. Place instances of the AHB and APB bus nodes in the editor window. In the Library Drawer, Select: AHB and drag and drop to the editor window. Repeat and place the APB bus node.

14. Close the AMBA Bus library.

15. Open the peripheral and auxiliary libraries From the Platform Creator Menus, select Library Open Browse (The Open Library… dialog appears) Navigate to: …/trainClass/library/peripherals Select: PeripheralsLib.xml and Click the Open button. Repeat the library open command and Navigate to: …/trainClass/library/auxiliary Open: AuxiliaryLib.xml

16. Place instances of the following blocks in the editor window. Clock Reset tie_High display_APB_TLM

17. Place two instances of: memory_AHB_TLM Name one i_ROM and the other i_RAM.

18. Minimize the peripheral libraries. It is not necessary, but reduces the visual clutter. Click on the triangle icon in front of the library name.

TML - 15


Complete Connections 1. Display port titles (if not displayed) Select the Edit Preferences… form. On the left side under the Name column Expand to All preferences Diagram Appearance Port Title. On the right under the Value column Click on the Port Title value field and select true from the options Click the Close button

2. Make port titles visible Repeatedly Select: Diagram Zoom In until the port titles appear legible. (Or optionally, use the zoom tool )

3. Open the Diagram Navigator Window. Click on the Show Diagram Navigator icon Experiment by moving around the diagram using the Navigator window.

4. Connect all clock signals. Select port clk on block i_Clock. While holding down the Shift key, select port CLK on the ARM 926 block and port clk on the AHB node and port clk on the APB node. With the cursor still over the last clk port, click the right mouse button and select Connect from the pop up menu.

5. Connect all Reset signals. In similar fashion, connect: port rst of block i_Reset port nHRESET of the ARM926 block and ports named reset of the AHB and APB nodes.

6. Hide the clock and reset wires. Right click anywhere in the editor window that is not over an object and

select Hide under the Clock/Reset Connections section of the pop up menu.

Use the Navigator window as necessary.

TML - 16


7. Complete the remaining connections. Select the Connection Tool. Click on port IAHB of the i_ARM926 block and then click on the i_AHB node. Now connect port DAHB of the i_ARM926 block to the i_AHB node. In similar fashion, make the following connections:

From i_ARM926 ITCM_DATA DATA_IN of i_ARM926EJS_TCM_Bridge “ ” DTCM_DATA DATA_IN of i_ARM926EJS_TCM_Bridge_1 “ “ ITCM_SIZE SIZE of i_ITCM “ “ DTCM_SIZE SIZE of i_DTCM

From i_ARM926EJS_TCM_Bridge DATA_OUT DATA of i_ITCM From i_ARM926EJS_TCM_Bridge_1 DATA_OUT DATA of i_DTCM

From i_ARM926 BIGENDINIT BIGENDINIT of i_ARM926_Stub “ “ CFGBIGEND CFGBIGEND of i_ARM926_Stub “ “ INITRAM INITRAM of i_ARM926_Stub “ “ STANDBYWFI STANDBYWFI of i_ARM926_Stub “ “ VINITHI VINITHI of i_ARM926_Stub

“ “ DTCM_DMA DTCM_DMA of i_ARM926_Stub “ “ ITCM_DMA ITCM_DMA of i_ARM926_Stub

From i_ARM926 nIRQ and “ “ nFIQ and “ “ DHCLKEN and “ “ IHCLKEN p_tie1 of i_tie_High

From i_ARM926 COPROC COPROC of i_ARM_COPROC_Model

From node i_AHB p_AHB of block i_ROM “ ” p_AHB of block i_RAM

From node i_AHB node i_APB

From node i_APB din of block i_Display

TML - 17


8. Set the priority for multiple masters connected to node i_AHB. Click on the Parameter Editor tab in the Details area (bottom panel).

Using the selection tool, select the port on node i_AHB that is connected to port IAHB of the ARM block. Expand Extra Parameters in the Details window. Check the default_master value. Set the value to true if needed. (the priority should be 0) Select the port on node i_AHB that is connected to port DAHB of the ARM block. Check the default_master value. Set the value to false if needed. Change the priority on the AHB port connected to DAHB to 1.

9. Set the Constructor Arguments on the Clock and Reset blocks. In the graphic editing window, select block i_Clock. In the Details window, select the Parameter Editor tab. Expand Constructor Arguments in the Name column. Change the division value to 4. In similar fashion, set the _ticks constructor argument for block i_Reset to 37.

10. Set the ARM debugger constructor argument. In the graphic editing window, select block i_ARM926. In the Details window, select the Parameter Editor tab. Expand Constructor Arguments in the Details window. Depending on which ARM debugger you will use, set debugger to one of the following: rvd for the RealView Debugger (GUI based) or axd for the ARM Extended Debugger (GUI based) or // 以上兩種 debugger 必須安裝之後才能使用 armsd for the ARM Symbolic Debugger (Command Line based) or xarmsd for the Extended ARM Symbolic Debugger (CLI in separate xterm) Press the Enter key.

11. Check the connections. Select Check Connections Make any needed corrections.

12. Save the current state of your project. Select File Save As… and enter myProject.xml as the name. (Use File Open to open saved project files and continue with the editing)

recommended

default

TML - 18


Create the Memory Map 1. Add initiators to the memory map table Click on the Memory MapTable tab in the Details area (bottom panel). Select port IAHB of the ARM block in the editor window and Right click to pop up the menu and Select Add to Memory Map Table

In similar fashion, add initiators: port DAHB of the ARM block node i_APB (Notice that the APB node is also added as a target) port ITCM_DATA of the ARM block port DTCM_DATA of the ARM block

2. Add the targets to the memory map table In similar fashion, add targets by selecting the target port and selecting from the pop up menu. Add the following targets port p_AHB of the i_ROM block port p_AHB of the i_RAM block port DATA of the i_ITCM block port DATA of the i_DTCM block port din of the i_Display block

This is the memory map you are to configure: (Steps are on the next page)

0x0

0x400 0000

0xC000 0000

RAM

ROM

APB

Byte addressable

Byte addressable

Word addressable Display 0x0

AHB MapAPB Map

TML - 19


3. Mark cells that are gray in color as unreachable by the initiator. Click on each corresponding gray cell and with the right mouse button pop up a menu. Select Remove Link from the menu.

4. Add addresses to the remaining cells of the memory map table as shown above. Double Click on a cell in the memory map table. Enter the address and press the Enter key.

5. Check the memory map. Select Check Check Memory Map Make any needed corrections.

IAHB DAHB i_APB ITCM_DATA DTCM_DATA

i_APB 0xc000 0000 0xc000 0000

i_ROM/p_AHB 0x0 0x0

i_RAM/p_AHB 0x400 0000 0x400 0000

i_Display/din 0x0

i_ITCM/DATA 0x0

i_DTCM/DATA 0x0

You must complete the table to look similar to the following:

Each cell represents the address at which the initiator can reach the corresponding target

Initiators

Targets Mark gray cells as unreachable

TML - 20


Check the System 1. You are now ready to make all checks on the system. Select Check Check System Warnings may be ignored, but errors must be corrected before proceeding.

Export the System 1. Select Export Export Design. Export Directory 項目選擇 Browse ，建立子目錄 trainClass/platform/top 並選擇之

。 Press the Export button.

2. Examine the exported files. In an xterm window, go to the platform/top directory List the contents. Examine the following new files:

CwrModule_HARDWARE_i_AHB.cpp CwrModule_HARDWARE_i_AHB.h CwrModule_HARDWARE_ i_AHB.xml CwrModule_HARDWARE_i_APB.cpp CwrModule_HARDWARE_i_APB.h CwrModule_HARDWARE_ i_APB.xml

HARDWARE.cpp HARDWARE.h

mem_map

sim.build sim.fof sim.tcl

The hardware platform is now built. The next step is to build the software application that will runon the platform.

// 在 PA V2006.1 之後，上述各 sim.* 內之參數設定都改存至 top/cwr/v2006.1.project 檔案內。

The bus models generated from the AMBA bus library by the Bus Handler

Top-level SC_MODULE and sc_main functions exported by Platform Creator

Memory architecture for use in running a simulation

Scripts for building the simulation by System Verifier

TML - 21


Note: If you do not have a license to develop ARM software (ARM compiler, assembler and linker), then skip to step 2 where you can continue with pre-built software that CoWare supplies. Build the Application Software 1. If you have an ARM software development license, you can build the application. Otherwise skip to step 2. Change to the platform/software/ARM926 directory Source the ARM ADS environment setup script if needed. % source <install_path>/ADS_1.2/env_linux.csh Run the ‘make’ program % make clean % make all

% cd ../../../top

If you are using the RealView Debugger, skip to the next page.If you are using the Command Line debugger, do the following steps.

Build and run the Simulation 1. From the platform/top directory, Start System Verifier. % scsh

2. Source the simulation build script. ::scsh> source sim.tcl (It takes a few minutes)

3. After the simulation builds, Set the memory map and symbol table file names. ::scsh> set_maf mem_map ::scsh>set_sym_file ../software/ARM926/bin/symbols.dat

4. Start the simulation. ::scsh> run // 3 、 4 兩步驟可以用 ::scsh>source sim_run.tcl 一次完成

5. At the ARM prompt in the ARM window, enter the following commands i_ARM926: load ../software/ARM926/bin/mySoftware.axf i_ARM926: go (The program displays the count in the xterm window) i_ARM926: quit

6. Quit System Verifier ::scsh> quit

This only needs to be done the first time as the value is kept in the platform/top/.cwrSimParams file.

TML - 22


Build and run the Simulation with RealView debugger 1. From the top directory, Start System Verifier. % scsh

2. Source the simulation build script. ::scsh> source sim.tcl (It takes a few minutes)

3. After the simulation builds, Set the memory map and symbol table file names. ::scsh> set_maf mem_map ::scsh> set_sym_file ../software/ARM926/bin/symbols.dat

4. Start the simulation. ::scsh> run

5. In another shell start RealView Debugger.% rvdebug (The debugger window appears.)

6. Connect the debugger to the simulation.In RVDEBUG window click Click to Connect to a Target (The Connection Control window appears)In Connection Control window select the simulation you want to connect to.

i_ARM926 will be part of the description name. Note: The Connection Control window displays a list of all possible targets you canconnect the debugger to. To be able to connect to the ConvergenSC simulation youhave to first setup the connection broker to allow it as described on page L-5.

7. Load the Image.In RVDEBUG window click Click to Load Image to a Target (The Load File to Target window appears)In Load File to Target window navigate to the directory ../software/ARM926/bin/containing the image mySoftware.axf.Select the image.Click OK. (The image is loaded and the source code is displayed)

8. Start execution.In RVDEBUG window click toolbar button to start execution. (The program displays the count in the xterm window in which the scsh has been started)

9. Quit RealView debugger. Select File Exit from RVDEBUG main menu.

10. Quit System Verifier ::scsh> quit


This only needs to be done the first time as the value is kept in the platform/top/.cwrSimParams file.

TML - 23



1. 如何編譯 ARM 程式？首先必須準備一套 ARM Developer’s Suite (ADS) 或是 RealView Developer’s Suite (RVDS) ， CIC 並沒有提供這套軟體，你必須向代理商智原科技洽詢。

2. 如何使用 AXD 或 RVD 為除錯環境？在建立 platform 時，假如要以 axd 或 rvd 為軟體除錯環境，除了要在處理器模組的 Constructor Arguments 進行設定，在事前就要進行環境設定工作。詳細步驟記載於 $(COWAREHOME)/IP/ARM926EJS_AHB_PSP/Documentation/IP_ARM926EJS_AHB_PSP.pdf 檔案內。 AXD 是 ADS 1.2 的除錯環境，目前已知無法在 Linux RH8 以上的 Linux 作業系統操作，未來 CoWare 不再提供 PA 的 Solaris 版本之後， PA 和 AXD 將不可能共同操作。

3. 軟體如何在虛擬平台執行 I/O ？請觀察 Exercise 14 的 ARM 程式

mySoftware.c 的內容#include “defines.h”extern void InterruptEnable(void);extern __irq void p_nIRQ_ISR (void) { ; } // stub off the IRQextern __irq void p_nFIQ_ISR (void) { ; } // stub off the FIQvoid fun1(void) { int i; for (i=0; i < 20; i++){

myDevice = i; } return;}void fun2(void) { int i; for (i=20; i > 0; i--){

myDevice = i; } return;}int main(void) { InterruptEnable(); fun1(); fun2(); return 0;}

define.h 的內容#define myDevice (*((volatile unsigned int *)0xc0000000))

TML - 24


要注意的是，程式並沒有呼叫 printf() 之類的低階 I/O 函式，而是透過 define.h ，將資料寫往特定記憶體位址（即 i_Display 模組）。要在程式內進行 I/O 動作，系統內必須要有對應功能的虛擬模組（ display 模組、 file I/O 模組等等），並且軟體部分也透過 retarget 取代 printf() 等 I/O 函式的功能，這些部分都必須自行撰寫。在不得已的情況下，程式可以直接呼叫 file I/O 函式以存取工作站檔案系統，但是這樣將無法準確分析 bus流量或 cycle count 之類的系統效能。

4. 這個系統的 clock rate 是多少？打開 trainClass/library/auxiliary/include/clockreset.h ，觀察 clock 的宣告。

SC_MODULE(Clock){ public: sc_out<bool> clk;

SC_HAS_PROCESS(Clock);

Clock(sc_module_name name, int division) : sc_module(name), clk("clk"), clk_intern(sc_gen_unique_name(name), division * 2.0, SC_NS) { SC_METHOD(do_it) sensitive << clk_intern; } private : sc_clock clk_intern; void do_it();};

Clock cycle 的長度是 division * 2.0 ，單位為 SC_NS 。所以 division 參數為 “半週期”，設為 4 即表示頻率是 125MHz 。

TML - 25


Exercise 23 – Platform AnalysisThe purpose of this lab exercise is to familiarize yourself with the System Designer analysis capability to generate and view analysis data.

Tasks:- Build System (scripts provided)- Build simulation- Enable analysis and start the simulation- Configure analysis and view settings- Run cosimulation- Perform post processing

ROM

ARM926

Instruction

din

Display

stub

RAM

APB

mySoftware.cAHB

Data

clock

resetdTCMiTCM



Display block Memory location (size)

0x0(0x100000)

0x400 0000(0x100000)

0xc000 0000(0x2)

20 / 32

20 / 32

1 / 32

32 / 32

32 / 32

AddrBits / DataBits

TML - 26


Build the simulation 1. Start System Verifier % scsh

2. Build the simulation ::scsh> source sim.tcl

3. Set the analysis GUI flag on ::scsh> analysis_config_gui on

4. Start the simulation ::scsh> source sim_run.tcl

接著會出現 Analysis 設定視窗

Steps

Enable and configure files 1. Enable analysis by clicking the check box

2. Add files mem_map and symbols.dat GUI: Click the File setup button Click the Browse… button and add mem_map to the memory architecture file section // 這個選項是預設值 Click the Add… button and add symbols.dat to the Software Symbol Info files section Click the OK button

Export the system 1. 同於 Exercise 14 但在 Select Export Export Design 步驟時，除了設定 Export Directory 項目外，還要加上以下設定勾選 Run Settings Enable Analysis Press the Export button.

TML - 27


Configure Analysis Views 1. Select analysis views for data collection GUI: Click the Configuration button

2. Enable global and bus views as described below GUI: Expand the View Tree as needed. Click the check box to enable the following: Top/AMBA Global Analysis/transaction trace Top/i_AHB/bus contention trace Top/i_AHB/transaction trace Top/i_APB/transaction trace

The result should look like this

TML - 28


3. Enable software and memory views as described below GUI: Scroll the View Tree and locate the i_ARM926 group Expand the View Tree as needed. Click the check boxes to enable the views as shown in the picture below.

Select these

TML - 29


4. Configure the Function Group Load view settings GUI: Select Function Group Load.

Selecting a view causes its settings to appear here

GUI: One at a time, double-click on each of the three View Settings and configure as shown on the next page

TML - 30


Sample interval(100ns is good to start)

Start & stop limit

Functions to traceConfigure view settings continued…

Double-click these to bring up settings forms

Scroll down and enable fun1, fun2 and main in this form

Set as displayed in forms

TML - 31


Arm Debugger Window

In the Views tree window:2. Select a view and click Display Click and drag your cursor across the display to zoom in for more detail.

3. Examine several views.

4. Select multiple views to display such as: Function Group Load Function Group Trace and Function Group Load Function Trace

5. Close and exit the Analysis program.

6. Close the Analysis Gui window

7. Quit scsh

Complete the simulation and collect data 1. Close all forms by clicking the OK button

1. Continue the simulation GUI: Click the Continue button

2. Start the ISS simulation i_ARM926: load mySoftware.axf i_ARM926: go (output data is displayed in xterm) i_ARM926: quit

Perform Post Processing 1. Start the postprocessing program ::scsh> sdviewer


TML - 32



1. 關於 simbols.dat 的建立在建立 mySoftware.axf 時，必須同時建立 symbol table 以提供處理器模組建立各種軟體相關的統計與分析。請參照 trainClass/platform/software/ARM926/Makefile內的下列設定 1. armlink 的參數包括 – symbols –map –list sym.tmp 2. 利用 nawk/awk 公用程式及 createSymbols.awk ，將 sym.tmp 改寫成 symbols.dat $(BINDIR)/symbols.dat: $(BINDIR)/$(MYSOFTWARE).axf

if [ "$(COWAREHT)" = "solaris" ] ; then \nawk -f createSymbols.awk $(BINDIR)/sym.tmp > $(BINDIR)/symbols.dat; \elif [ "$(COWAREHT)" = "linux" ] ; then \awk -f createSymbols.awk $(BINDIR)/sym.tmp > $(BINDIR)/symbols.dat; \else \echo "COWAREHT is not set properly.";\fi\rm $(BINDIR)/sym.tmp

2. 我在測試自己的平台和軟體時，為什麼和處理器相關的分析都呈灰色無法讀取？當建立自己的軟體時，可以沿用範例中的 createSymbols.awk 檔案建立自己的 symbols.dat ，但是 createSymbols.awk 中有一段關於處理器模組名稱的設定必須要手動修改（ Line 155~157 ）

#HARDCODED corename (cpu) for now print “Corename$$ HARDWARE.i_ARM926“ 這裏要改成自己平台內處理器模組 print “” 的名稱

TML - 33


Exercise 24 – HDL CosimulationIn this exercise you will use Platform Creator to build the ARM926 system. The system will be built with the library containing TLM and Verilog encapsulations of the display block. You will select the Verilog encapsulation, build the system, the simulation, and perform the cosimulation.

Tasks:- Build system (scripts provided)- Configure environment and scripts- Build and run cosimulatin

Verilog encapsulation

Memory location (size)

ROM

ARM926

Instruction

din

Display

stub

RAM

APB

mySoftware.cAHB

Data

clock

resetdTCMiTCM



Display block

0x0(0x100000)

0x400 0000(0x100000)

0xc000 0000(0x2)

20 / 32

20 / 32

1 / 32

32 / 32

32 / 32

AddrBits / DataBits

TML - 34


1. 同於 Exercise 14 但在 Select Export Export Design 步驟時，除了設定 Export Directory 項目外，還要在 HDL/Co-Sim Settings 加上以下設定 HDL Library Map myLib=‘myLib’ HDL Simulator ncsim Verilog Compile Options -message –status （可有可無） HDL Elab Options -message -status -timescale 1ns/1ns (-timescale 參數可寫在 Verilog 程式 top module 所在的檔案開頭 ) HDL Simulator Interactive ( 需要在 NCSIM 觀察訊號就必須勾選 ) Press the Export button.

Export the system

Steps

Build the system 1. 平台的建立同 Exercise 14 ，但是 i_Display 模組選擇在 Exercise 11 建立的模組。在 pct 內 Library Open Browse ，選擇 trainClass/library/displayLib/displayLib.xml 2. 點選 i_Display 模組，按滑鼠右鍵選 Encapsulationsdisplay_APB_Vlog (Verilog) 3. 將 i_Display 的 din 接上 APB ， clk 接上 i_Clock 的 clk 。 4. 設定 din 的 memory map 值。 5. 檢查 din 和其在 APB 上的接點，各參數是否一致。以下圖為例，兩者 Addressing Mode 設定即不一致，依 din 的設定調整。

TML - 35


1. 首先要設定環境參數 setenv NC_INSTALLED_AT {NCSIM 安裝目錄 } 以及其他的 NCSIM 環境參數2. Start scsh: % scsh

3. Build cosimulation: ::scsh> source sim.tcl ::scsh> source sim_run.tcl 會出現 NCSIM 視窗，設定待觀察訊號之後按 “ Run” ::scsh> Please enter c to continue ::scsh> c

i_ARM926: load mySoftware.axf i_ARM926: go

(output data is displayed in xterm)i_ARM926: quit

執行結果會出現在 NCSIM 的 Console 內

4. 關閉 NCSIM 視窗5. Exit scsh: ::scsh> quit


Build and run cosimulation

Arm Debugger

Prompt from scsh

TML - 36


memory_AHB_TLM.h

#include "systemc.h"#include "AMBA/AMBA.h"#include "cwrSdiapi.h"

SC_MODULE(memory_AHB_TLM) { AMBA::AHBLiteTarget_inoutslave_port<20, 32> p_AHB; //port 宣告 cwrDevId mDeviceId; SC_HAS_PROCESS(memory_AHB_TLM); memory_AHB_TLM(sc_module_name name_, // constructor 宣告

const int _nr_of_wait_states) : sc_module(name_), p_AHB("p_AHB"), nr_of_wait_states(_nr_of_wait_states) { SC_METHOD(receiveWriteData); // sensitivity list 宣告 sensitive << p_AHB.getReceiveWriteDataTrfEventFinder(); dont_initialize(); SC_METHOD(sendReadData); sensitive << p_AHB.getSendReadDataTrfEventFinder(); dont_initialize(); SC_METHOD(sendEoT); sensitive << p_AHB.getSendEotTrfEventFinder(); dont_initialize(); mDeviceId = cwrSdiInit(name()); } //memory_AHB_TLM() ~memory_AHB_TLM() { } //~memory_AHB_TLM() void receiveWriteData(); //process 宣告

void sendEoT();

void sendReadData(); int nr_of_wait_states; }; //SC_MODULE(memory_AHB_TLM)

TML - 37


memory_AHB_TLM.c

#include <iomanip.h>#include "memory_AHB_TLM.h"

void memory_AHB_TLM::receiveWriteData() {

p_AHB.getWriteDataTrf();

unsigned int address = p_AHB.WriteDataTrf->getAddrTrf()->getAddress(); unsigned int accessSize = p_AHB.WriteDataTrf->getAddrTrf()->getAccessSize(); unsigned int data = p_AHB.WriteDataTrf->getWriteData(); bool priv = (p_AHB.WriteDataTrf->getAddrTrf()->getProtectionType() == AMBA::tlmPrivileged); bool opcode = (p_AHB.WriteDataTrf->getAddrTrf()->getKind() == AMBA::tlmOpcode);

cwrMas mas; switch (accessSize) { case 32 : mas = cwrMas32; break; case 16 : mas = cwrMas16; break; case 8 : mas = cwrMas08; break; default: cout << "***** ERROR: WRONG ACCESSSIZE" << endl; sc_stop(); break; } //switch cwrMem64 data64 = data; cwrSdiWrite(mDeviceId, (cwrMem64)address, mas, cwrLitend, &data64); #ifdef DEBUGAhbMemory cout << "####### SLAVE["; cout << name(); cout << "]: WR: ADDRESS = " << hex << setw(8) << address << dec; cout << ": SIZE = " << setw(2) << accessSize; cout << ": DATA = " << hex << setw(8) << data; cout << ": " << (priv ? "PRIV" : "USER"); cout << ": " << (opcode ? "OPC" : "NOR"); cout << endl; #endif

} //memory_AHB_TLM::receiveWriteData()

TML - 38


void memory_AHB_TLM::sendReadData() {

p_AHB.getReadDataTrf();

unsigned int address = p_AHB.ReadDataTrf->getAddrTrf()->getAddress(); unsigned int accessSize = p_AHB.ReadDataTrf->getAddrTrf()->getAccessSize(); bool priv = (p_AHB.ReadDataTrf->getAddrTrf()->getProtectionType() == AMBA::tlmPrivileged); bool opcode = (p_AHB.ReadDataTrf->getAddrTrf()->getKind() == AMBA::tlmOpcode);

cwrMas mas; switch (accessSize) { case 32 : mas = cwrMas32; break; case 16 : mas = cwrMas16; break; case 8 : mas = cwrMas08; break; default: cout << "***** ERROR: WRONG ACCESSSIZE" << endl; sc_stop(); break; } //switch cwrMem64 data64; cwrSdiRead(mDeviceId, (cwrMem64)address, mas, cwrLitend, &data64); unsigned int data = data64; p_AHB.ReadDataTrf->setReadData(data); p_AHB.sendReadDataTrf(); #ifdef DEBUGAhbMemory cout << "####### SLAVE["; cout << name(); cout << "]: RD: ADDRESS = " << hex << setw(8) << address << dec; cout << ": SIZE = " << setw(2) << accessSize; cout << ": DATA = " << hex << setw(8) << data; cout << ": " << (priv ? "PRIV" : "USER"); cout << ": " << (opcode ? "OPC" : "NOR"); cout << endl;#endif } //memory_AHB_TLM::sendReadData()

void memory_AHB_TLM::sendEoT () { p_AHB.sendDelayedEotTrf(nr_of_wait_states);} //memory_AHB_TLM::sendEoT()

TML - 39


Makefile

.SILENT:

MYSOFTWARE = mySoftware

ENDIAN = liARMBINDIR = $(ARMHOME)/$(COWAREHT)/bin

ARMCC = $(ARMBINDIR)/armcc -$(ENDIAN) -apcs /inter -g+ARMASM = $(ARMBINDIR)/armasm -$(ENDIAN) -apcs /interARMLINK = $(ARMBINDIR)/armlink -symbols -map -scatter scatter.scf -libpath $(ARMHOME)/common/lib -Debug

OBJDIR = ./objBINDIR = ./bin

OBJS = \$(OBJDIR)/software.o \$(OBJDIR)/stacks.o \$(OBJDIR)/startup.o

SRCS = \$(MYSOFTWARE).c \stacks.c \startup.s

all: $(BINDIR)/$(MYSOFTWARE).axf $(BINDIR)/symbols.dat

clean:\rm -rf $(OBJDIR)/*\rm -rf $(BINDIR)/*

$(BINDIR)/$(MYSOFTWARE).axf: \

$(OBJS)$(ARMLINK) -list sym.tmp -o $@ $(OBJS)

$(OBJDIR)/software.o: $(MYSOFTWARE).c$(ARMCC) -o $@ -c $(MYSOFTWARE).c -g

$(OBJDIR)/stacks.o: stacks.c$(ARMCC) -o $@ -c stacks.c -g

$(OBJDIR)/startup.o: startup.s$(ARMASM) -predefine "ENABLE_DTCM SETL {FALSE}" -predefine "ENABLE_ITCM SETL

{FALSE}" -o $@ $?

$(BINDIR)/symbols.dat: $(BINDIR)/$(MYSOFTWARE).axfif [ "$(COWAREHT)" = "solaris" ] ; then \nawk -f createSymbols.awk $(BINDIR)/sym.tmp > $(BINDIR)/symbols.dat; \elif [ "$(COWAREHT)" = "linux" ] ; then \awk -f createSymbols.awk $(BINDIR)/sym.tmp > $(BINDIR)/symbols.dat; \else \echo "COWAREHT is not set properly.";\fi\rm $(BINDIR)/sym.tmpecho "Done."

TML - 40


scatter.scf

LD_PLATF 0x00000000 0x10000{ EX_INT_ROM 0x00000000 0x10000 { startup.o(C_STARTUP_CODE, +FIRST) *(+RO) } EX_DATA 0x04000000 0x10000 { * (+RW,+ZI) startup.o (C_HEAP, +LAST) } }

Documents

TM L - 1 PROPRIETARY Copyright © 1996-2005 CoWare, Inc. All rights reserved. Tasks: Build the directory structure Import the blocks Combine the encapsulations