TMS32010 Evaluation Module Controller
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EUT Report 86-E-162 ISBN 90-6144-162-5 ISSN 0167-9708
October 1986
EINDHOVEN UNIVERSITY OF TECHNOLOGY
Department of Mechanical Engineering
EUT Report 86-E-162 ISBN 90-6144-162-5 ISSN 0167-9708
Coden: TEUEDE
Meer, A.C.P. van
TMS32010 Evaluation Module Controller / door A.C.P. van Meer. -
Eindhoven: University of Technology. - Fig., tab. - (Eindhoven
University of Technology research reports / Department of
Electrical Engineering, ISSN 0167-9708; 86-E-162) Met lit. opg.,
reg. ISBN 90-6144-162-5 SISO 365.3 UDC 681.3.066 NUGI 854 Trefw.:
TMS32010.
TMS32010 EVALUATION MODULE CONTROLLER. A.C.P. van Meer.
SAMENVATTI NB
In dit rapport .ordt een manier beschreven .aarmee op zeer handzame
en efficiente .ijze de Evaluation Module EVM32010 voor de Digitale
Signaalprocessor TMS32010 van Texas Instruments kan worden bediend.
Hierbij is uitgegaan van een Apple lie host computer, die met
behulp van een seriele interface en een controleprogramma in 6502
Assembler-taal, de EVM32010 bedient.
ABSTRACT
This ~eport describes a procedure with which it is possible to
control in a very handy and efficient .ay the Evaluation Module
EVM32010 for the Digital Signal Processor TMS32010 of Texas
Instruments. Starting-point was an Apple lie host computer, which
serves the EVM32010 with the help of a serial interface and a
control program In 6502 Assembler language.
Meer, A.C.P. van TMS32010 EVALUATION MODULE CONTROLLER. In Dutch.
Department of Electrical Engineering, Eindhoven University of
Technology (Netherlands), 1986. EUT Report 86-E-162
Address of the author:
Broup Electronic Natworks and Systems for Signal Processing,
Departmant of Electrical Engineering, Eindhoven University of
Technology, P.O. 80x 513 5600 M8 EINDHOVEN The Netherlands
-1-
Inhoud.
Listing van een BASIC stuurprogramma. 5
Beschrijving van het programma. 7
Blokschema van het controleprogramma. 8
Slokschema van de Escape-mode. 9
Geraadpleegde literatuu r • 10
Listing van het assembl~r-programma. 11
Adreslijst van gebruikte symbol en. 30
Datasheets van de ACIA 6551. (*) 34
(*) Met dank aan de firma Rockwell voor de vriendelijke toestemming
am deze datasheets af te drukken.
-2-
TMS32010
Inleiding.
De TM532010 van Texas Instruments is een snelle 32-bits digitale
signaalprocessor. T.I. heeft voor het ontwikkelen van programmatuur
op deze processor een Evaluation Module, die moet worden gestuurd
met een terminal en die als opslagoediu. een cassette recorder
gebruikt. Zie voor het gebruik van de EVM de handleiding [11. Om
deze EVM zo hand.aam mogelijk te gebruiken is een kop peling tot
stand gebracht met een computer, die als in telligente terminal is
geschakeld en die tevens functio neert als opslagmedium. Ais
computer is gebruikt een Apple lIe [21 met een seriele interface
(de z.g. super serial card [3]). De combinatie van Apple lIe, super
serial card en het hierna beschreven controleprogramma vormt de
TMS32010 Evaluation Module Controller.
De Communicatie.
De communicatie verloopt vol gens RS-232 in full duplex mode. De
Apple lIe is daarvoor uitgebreid met een RS-232 uitgang. De super
serial card, die deze interfacing verzorgt is op gebouwd rond het
i.c. 6551, epn Asynchrone Communicatie Interface Adapter. Om twee
redenen is echter geen gebruik gemaakt van de inge bouwde input-
en outputroutines van de super serial card zel f. Ten eerste omdat
het met deze card niet mogelijk bleek de maximale
communicatie-snelheid van de EVM, nl. 19200 Baud, te bereiken. Ten
tweede omdat de handshaking met de EVM niet overeenkomt met datgene
.at is opgegeven in de hand leiding [11. Er is echter wei gebruik
gemaakt van het op deze card aanwezige i.c. 6551. Door het direct
aansturen van de 6551 met routines die zijn geschreven in assembler
op de 6502 microprocessor is het mogelijk communicatie te bedrijven
op 19200 Baud.
-3-
Gabruik van hat programma.
Het controleprogramma is een programma dat is geschreven in
assembler voor de 6502 microprocessor [41. Het ver,orgt de
communicatie van de Apple lIe met de EVM32010 via een 6551 ACIA op
19200 Baud, en organiseert tevens een aantal andere zaken. Zie voor
gegevens van de ACIA 6551 de bijgevoegde data-sheets [51.
Het controleprogramma heeft de volgende mogelijkheden.
1. Terminal mode,
a. AIle toetsinformatie Mordt direkt overgezonden naar de
EVM.
b. AIle van de EVM ontvangen karakters gaan naar de display.
2. Escape mode
a. De ontvangen karakters kunnen worden opgeslagen in het
buffer.
b. Een reeks karakters kan worden uitgezonden vanuit het
buffer.
c. De antvangen karakters kunnen al of niet worden geprint.
d. De inhoud van het buffer kan worden opgeslagen in een file op
disk.
e. Het buffer kan worden gel aden vanuit een file op disk.
f. De inhoud van het buffer kan worden gemodificeerd.
g. Do inhoud van het buffer kan worden geprint.
h. Er kan een help-list met de commando's worden getoond.
-4-
Het programma werkt onder operating systeem DOS 3.3 [6). Het kan
oak vanuit een hogere taal worden aangeroepen als subprogramma,
waarbij dan de volgende CALL's kunnen wor den uitgevoerd.
CALL Warm_entry CALL lnit CALL Open_inbuf CALL Clos inbuf CALL
Open_otbuf CALL Clos otbuf CALL Clr _e"iflg CALL Set_exiflg CALL
WisJeglnr CALL Wis_linefd CALL Wis_commen CALL Print_help CALL
Prt_buffer CALL Save_buff CALL Load buff - CALL Print_on CALL Print
off
Start het programma inclusief volledige initialisatie. Start het
programma zander initialisatie. Initialiseer het programma. Open
het buffer voor input. Sluit het buffer voor input. Open het buffer
voor output. Close het buffer voor output. Wis exit-vlag. Zet
exit-vlag. Wis de regelnu_mers in het buffer. Wis de linefeeds in
het buffer. Wis het commentaar in het buffer. Print de help-list.
Print de inhoud van het buffer. Save de inhoud van het buffer op
disk. Laad de inhoud van het buffer van disk. Zet de printer aan.
Zet de printer uit.
Hierbij kunnen de volgende variabelen extern worden gelezen of
gesc:hreven.
Edt_time CR-time Buffer _beg Buffer _end Buff er l,st
Timeout voor het verlaten van het programma. Timeout na een
Carriage Return. Begin,dres van de bufferruimte. Eindadres van de
bufferruimte. Laatst gebrui~te bufferadres.
Dit houdt in dat men b.v. vanuit BASIC het buffer kan vol
schrijven met opdrachten voor de EVH, men kan de bufferout put
activeren en naar de warm entry springen. Als men vooraf ook de
'exit-vlag zet wordt na een bepaalde tiaeout automa tisch het
controleprogramma weer verlaten en vervolgt het BASIC programma
[7). Als voorbeeld van een BASIC besturingsprograa.a wordt hierna
de listing gegeven van programma EVH B.l.
-5-
Listing van Ben BASIC stuurprogramma.
100 REM PROGRAMMA EVM 8.1 110 REM
*'*f*'*"'*'****"'***************** 120 HIMEM:12288:REM BUFFER
BEGINT OP $3000 130 GOSUB290:REM HAAL GEGEVENS 140 GOSUB590:REM
LAAD FILES 150 H=CHR$(4) 160 PRINTD$'PR#3' 170 CALLE3:REM
INITIALIZE 180 CALLE8:REM RESET EXITFLAG 190 CALLE2:REM WARM ENTRY
200 REM DISK 1/0 210 ONERRGOT0830 220 PRINT 230 INPUT'Save or Load
data? ';A$ 240 IFA$='L'ORA$='S'THENINPUT'Filename ? ";NS 250
IFA$='L'THENGOSUB700 260 IFA$='S'THENGOSUB770 270 GOTOl80 280 END
290 REM GEGEVENS 300 REM CALLS : 310 El=38397:REM COLD ENTRY 320
E2=38394:REM WARM ENTRY 330 E3=38391:REM INITIALIZE 340
E4=38388:REM SET INPUTBUFFER 350 E5=38385:REM RESET INPUTBUFFER 360
E6=38382:REM SET OUTPUT BUFFER 370 E7=38379:REM RESET OUTPUT BUFFER
380 E8=3B376:REM RESET EXITFLA6 390 E9=38373:REM SET EXITFLAG 400
EO=38370:REM WIS REGELNUMMERS 410 FI=38367:REM WIS LINE FEED 420
F2=38364:REM PRINT HELP LIST 430 F3=38361:REM PRINT BUFFER 440
F4=38358:REM SAVE BUFFER 450 F5=38355:REM lOAD BUFFER 460
F6=38352:REM WIS COMMENTAAR 470 F7=38349:REM SET PRINTER ON 480
F8=38346:REM SET PRINTER OFF 490 F9=38343:REM 500 FO=38340:REM 510
REM DATA : 520 GI=38338:REM EXIT DELAY 530 G2=38336:REM DELAY AFTER
CR 540 63=38334:REM BUFFER EINDADRES 550 64=38332:REM BUFFER
BEGINADRES 560 G5=38330:REM LAATST 6EBRUIKTE BUFFERADRES 570
PI$='BESTURING T8.I.CODE':REM NAAM VAN CONTROlE PROG 580 RETURN 590
REM LOAD CONTROLE FILE 600 PRINTCHR$(13);CHR$(4);'BLOAD';PI$ 610
RETURN
620 REM LAAD OUTPUTBUFFER 630 REM VOORBEELD-ROUTINE
-6-
-7-
Beschrijving van hat controleprogramma.
Het controleprogramma is geschreven in 6502 assembler voor de Apple
lie. De abject-code begint op adres $8E41 en eindigt op $95FF juist
voor het begin van DOS 3.3. Het buffer beslaat de geheugenruimte
tussen $3000 en S8E40. Het programma heeft een cold-start op S8E41,
en is opgebouwd als een Ius van routines die al of niet warden
uitgevoerd. In deze Ius wordt gekeken of er een toets is ingedrukt,
of de output vanuit het buffer aktief is en of er een karakter is
ontvangen, terwijl er tevens een timer wordt bijgehouden. Indien
een aktie wordt geconstateerd .ordt deze uitgevoerd en wordt de Ius
vervolgd. Dit alles is te zien in het eerste blokschema. Indien de
ESC-toets wordt ingedrukt komt het pro gramma in een andere mode,
waarin het indrukken van een toets een specifieke funktie kan
uitvoeren. Deze funkties zijn :
A Zet de printer adn. a Zet de printer uit. C Sluit het buffer voor
input. o Sluit het buffer voor output. H Toon de help-list. I Open
het buffer voor input. L Laad een file van disk in het buffer. o
Open het buffer voor output. P Print de inhoud van het buffer. Q
Verlaat het controleprogramma. S Save een file uit het buffer naar
disk. V Wis het extra commentaar in het buffer. W Wis de
regelnummers in het buffer. X Wis linefeeds in het buffer. Z
Verlaat de ESC-mode.
Op de volgende bladzijden is in de vorm van een uitgebreid
blokschema het verloop van het programma te volgen. Op het tweede
blokschema is in detail de Escape-mode te zien. Verder is de
assembler-listing van het programma gegeven met de bijbehorende
verklaringen en een lijst met ad res sen van de gebruikte symbolen.
De beide blokschema's geven samen met de asse.bler-listing een
volledig inzicht in het programma.
Blokschema van het EVM 32010 Controls-programma.
c oW e."*,,
f-+-I Ge • key r2!:- Ge.l ~\A.ffel"" -C,\.Ult' ~ G ... AClA c.l,.,
'" JY'\i lio..L; 2.e. 1<01 char Tinte .... c.\,Cl."
j Y\i t. ACIA fk<1 exit it ",o~ oe.l:ve. CI,.", AtlA :J..,c..
time..
"'Rc~f!,.t £.;\(l49 --+- E'I(;~ if 'l'\ot 0fe.., - t.x.il i~ '1'\0
chQ'I'". r+- tlls f.llQ.~ -i.'I'M.'
~C.5e..t. :1"1 .. ··1. CI-I~.k ke.j £X'ii if li"Me.olol..l Se<
.h.d,;, 7 COYlb' C ..... .,.~.,.
1(e."l O~lb.\ 'fe., ESC 'Reset b~eolAt te '" 'Pr-;",i; -HeLp 1f Ob~
.. 1.'v< : ,,; 1. G .. , c\' ..
'1?e.et CI( ·L<I5~ ;)( .. c~ltse : E." Jnc. Db"" p:>O, ....
te., ('heck C~(lr.
5.l CI( .... Sor :J( CR: ~t.,l J.P'.I. X b.rr ... .,piJ : 11 XO'F:
1)',pl.) © C.heek. 80 GoL. \)isplo.:I " 'Re'!>d Ov.\\:)lAr Cloy-
O~\b.f
G .. , ~SC·",,,,,.·k'j e~o.," J! ~ON: b,spI'1 [Q] \.u;. if 0, ..
O.l~"\.
I ~e5e.\:. Ti"",cr t+- CI-t«k ESt· .,..Ie. ChteK ChD..,( r,cc,ive.
~ .. o doll\'"
t= t;~~d ~ C\""f
Jf CR: c,,",
$d. t.i .... ollt 'j).,.. ;",.t. C~", \'v/lr..., eO'ltr,1
I"'~o~s,,'l. ~Q.f. ~to" J.pb.l 'Ali' loT,Lf,ff.2'CR
t '"'l'" t .. • .. d 'Re~l:.or~ Cursc>1'C\.tu-
1)i~p \0.::1 C.h~, "rQ'I\",",i~ e,\o,o.r. 'Jf p,;.ter ON :
-- ESC -+ 1'<", eho.r
JI J'pb.f. cI.ud: f'it t Sict, 0\,., ;. b..ff<' I ~sd.
,;"'''
EVM 31010 Co"hoLler- 'Pr0!l~"-'" J'I'It. J"p~"'f. poi"'t~r + Jf J
•• b.f f .ll:
'Beep
r- ,est e: )( i t Ie.'S-\.. E <;lflA~
Ye .. +. E I('i. tiY\o\~o"'t Jr f,;, :
1?esd J"'F blAt'. 1?~st'.~ oun·l. 1?esel: ;-.. ;*- ~l(lo.9
t .. ·" E.ND
Blokschema van de ESC-mode van het Controle-programma.
C~Ie:Ck ESC. - ,"",ode f ~ --1. EtlD of ESC. - h\ode.. _I
'Rel.u.rl"l to COl'\l, .... oll<2. ... '?roj<O:O"'"
v---,.-----I X Iv" C \, ~CI< L.e f .... r--~O" •• ::J·r·~I,·H,·
~ t.ro.s~ L;f\~~e.ti ERASe;
c Clo" J.p\,.fr ... Sd po; ",*.ers Rn<-< C~: ~C\",.
J'p.tb.H,· f-- Sd wLf-1' I., Gd c\,a.reo.ct.e..- ..,LN C'Q.se. CR.,
Lf,5~~.fF
Ie" ["d ,h.r, T.f~t cO .......... ,C~C1..- ">"
~I VJ Op •• O,,-w.tb.H .. ~ 'E-rtl\~ L"~Vlt.4_\'~r 1'esl CR / C R
-VI.~ ~N I Set 0.< •• + poi.ur 1 Close. J. p b.li .. T ed C1"Q~e
_o""c. '->- Chuk l ; "'E'VI .......... 6er r---
S •• WLf,~I.~ hod::f AH ... C~: D cl~c OIA\:p!,ltbu.~~~ Set wlH-H.g
£rClS~ t';5 ...... e
A t-L Arter r'3"" : Se-l P~;.te. ON Eras-t.. CO ..... ""'1.~"'t
f-->- Er~~ -1. Speu . .t..
~<;et '1'ri..cer OFF C.lo .. 'J. p_ \'"l'~ .. Sok WL F.!' 1'9 ~
C h LC k Co ..... ...., e.V\t. I----
p Sel WeM- fl ... A~te. CI<:
'1',;". ~~\fe'
r-+- ~ £""Qj e. dlOo"- hq:oo /1.".;;
Ct .... J.p- \,-H" L o"d. 'B.ff e. I- So.v~ ~ ..... ++e.,.. 1-+
£ra:<t. chOIr ..t-U:r '''<'' ~-l 'Po;"te..- C.lose. 1 ••
,".,f •. Close. J.p _ \,.H" <;e\:. '?V'il'lt(.r OW <;.1 6.rt
... b'9'. 'f; )( P.,.H~e.- 1.<, i.
'Pl"'il'l.t e.hAr. Loo:d. f,,·o- disc: f'i" 'B"'HereO\cl ,. .. ~
e~d .1 \'.~~ .. file " ..
,
~ +l~LI' I---- Q
-->----{ Set. E'd· F lo.g I-- 2 -+-j 'Do .al\';.9 1+ Clo.~ J"p.
".If,.- 1)\ ... pICl~ CO .... "' .. 'u'loiS
ot~ .. ," ""rQ.'II~_;t. c\'Q.r.
I (LJ ,
[IJ TMS32010 Evalution Module User's Guide Texas Instruments,
1985.
[2J Apple II, Reference Manual Apple Computer Inc. , 1982.
[3] Super Serial Card, Installation and Operating Manual Apple
Computer Inc. , 1981.
[4J MCS6500 Microcomputer Family, Programming Manual MOS Technology
Inc. , 1976.
[5] Rockwell Data book, Semiconductor Products Division Rockwell
International Corporation, March 1984.
[6] Apple II, DOS User's Manual Apple Computer Inc. , 1983.
[7] Applesoft BASIC Programmer's Reference Manual Apple Computer
Inc. , 1983.
-11-
3000- 8E41-
0084- 0088- 008A- OOBC- OOBD- 0091- 0093- 0095- 009A- 009B- OOAQ-
002A- OODF-
COCB COCS COC9- COC9- COCA COCB-
1010 • 1015 * VERSIE T8 1020 '* 1025
*-------------------------------- 1030 * 1035 * PROGRAMMA VOOR
BESTURING VAN 1040 • 1045 * DE KOPPEllNG VAN DE TMS320 EVM 1050 *
1055 * MET DE APPLE )( MBV ACIA 6551. 1060 * 1065 * 1070 * HARRIE
VAN MEER 10-SEP-19S6 1075 * 10S0 *--------------------------------
1085 • 1090 * 1095 • 1100
'11 05
$3E41 $3E41 $SE41 BESTURING T8.CODE
1110 .-------------------------------- 1115 BUFC) .EQ $3000 BEGIN
BUFFER RUIMTE 1120 SUFI .EO • EINDE BUFFER RUIMTE 1125
*-------------------------------- 1130 EOT .EO $84 DOS COMMANDO
1135 BS .EQ S88 BACK SPACE 1140 IF .EQ $BA LINE FEED 1145 FF .EQ
$SC FORM FEED 1150 CR .EO SBD CARIAGE RETURN 1155 XON .EO $91 XON
1160 XOFF .EQ $93 XOFF 1165 BACK .EO $95 CURSOR BACK 1170 SUB . EO
$9A SUB 1175 ESC .EO $9B ESCAPE llBO SPC .EO $AO SPACE I1B5 STER
.EO $2A • 1190 ULiNE .EO SDF 1195 • 1200
.-------------------------------- 1205 • 1210 •••••• 6551 REGISTERS
•••••• 1215 • 1220 .-------------------------------- 1225 • 1230
TRMREG .EO 1235 RECREG .EO 1240 RESREG . EO 1245 STAREG .EO
fCOCS $COCS $COC9 $COC9
1265 .-------------------------------- 1270 • 1275 •••••• COMMAND
REGISTER ••••••
-12-
0000- 0002- 0008- 0000- 0000- OOOA-
OOOF- 0010- 0020- 0080- OOBF-
COOO- C010- FDED- F941- FBDD- FCA8- 0427- C182- AA60-
8E41- 20 SA SE 8E44- 20 AI 91 8E47- 20 34 SF 8E4A- 90 24 8E4C- 20
43 SF 8E4F- 90 2A 8E51- 20 C9 8E 8E54- 90 09 8E56- 20 6D 91 SE59-
20 81 91 8E5C- 90 E9
1285 f-------------------------------- 1290 * 1295 DTRCON .EQ $00
DTR LOW / RECEIVER DISABLED 1300 IRQEN .EO $02 IRO DISABLED 1305
TRMCON .EQ $08 TRM ENABLED 1310 ECHOC .EO $00 NO ECHO 1315 PARCON
.EO $00 NO PARITY 1320 INICOM .EO DTRCON+IRQEN+TRMCON+ECHOC+PARCON
1325 f
1330 1-------------------------------- 1335 f
1340 fffff' CONTROL REGISTER f"f" 1345 , 1350
f-------------------------------- 1355 f
1360 BAUD .EO $OF 19200 8AUD 1365 CLOCK .EO $II) INTERNE KLOK 1370
WORDL .EQ $20 7 BITS
.1375 STOPS .EO $80 2 STOPBITS 1380 INICON .EO
BAUD+CLOCK+WORDL+STOPB 1385 f
1390 1-------------------------------- 1395 * 1400 fffff<
MONITOR ROUTINES «<,<, 1405 , 1410
f-------------------------------- 1415 t
1420 KBD .EO $COOO KEYBOARD 1425 KBDSTR .EO iC010 KEYBOARD STROBE
1430 COUT .EO iFDED PRINT CHAR 1435 PRNTAX .EQ $F941 PRINT A,X HEX
1440 BEEP .EO $FBDD BEEP 1445 WAIT .EO $FCA8 DELAY 1450 RBOVEN .EO
$427 PLAATS RECHTSBOVEN 1455 PROUT .EO $C1B2 PRINTER ADRES 1460
BLENG .EO $AA60 LENGTE BIN FILE 1465 , 1470
*-------------------------------- 1475 <
1480 f«<'< START •• f<ff 1485 < 1490
*-------------------------------- 1495 <
1500 TC JSR INIT TERMINAL COLD ENTRY 1505 TW JSR RESTI M WARM ENTRY
1510 . 1 JSR GETKEY 1515 BCC .3 BRANCH IF KEY 1520 .6 JSR GETBUF
1525 BCC .4 BRANCH IF BUFCHAR 1530 .2 JSR RECCHR
OP SCHERM
1535 BCC .7 BRANCH IF CHAR RECEIVED 1540 .8 JSR TIME INC TIME 1545
JSR TSTEXI TEST EX IT 1550 BCC • 1 GO ON
-13-
EVM 32010 TERMINAL 8E5E- 60 1555 RTS EX IT BE5F- 20 57 90 1560 .7
JSR TSTREC TEST RECEIVED CHAR 8E62- BO F2 1565 BCS .8 BRANCH IF NO
CHAR 8E64- 20 EE 90 1570 JSR PRTCHR PRINT CHR 8E67- 20 FA 8E 1575
JSR SToeHR STORE CHAR IN INPBUF BE6A- 20 AI 91 15BO JSR REST 1M
RESET TI ME 8E6D- 4C 56 BE 1585 JMP .8 60 ON 8E70- 20 B8 8F 1590 .3
JSR TSTKEY TEST KEY CHAR 8E73- BO D7 1595 BCS .6 BRANCH IF NO CHAR
BE75- 20 BC BE 1600 JSR TRMCHR ZEND KEYCHAR BE7B- 4C 4C BE 1605 JMP
.6 60 ON BElB- 20 43 90 1610 .4 JSR TSTBUF TEST BUFCHAR BE7E- BO DI
1615 BCS .2 BRANCH IF NO CHAR BEBO- 20 BC BE 1620 JSR TRMCHR ZEND
BUFCHAR 8E83- 20 AI 91 1625 JSR RESTIM RESET TI ME 8E86- 4C 51 8E
1630 JMP .2 GO ON 8E99- 60 1635 .5 RTS EXIT
1640 • 1645 *-------------------------------- 1650 •
'1655 ••• , •• PROCEDURES •••••• 1660 • 1665
*-------------------------------- 1670 •
. 8E8A- A9 SF 1675 INIT LDA .INICON INITIALIZE ACIA 8E8C- 80 CB CO
1680 STA CONREG 9E8F- A9 OA 1685 LDA tINICOM 8E91- aD CA CO 1690
STA COMREG 8E94- 20 7F 90 1695 JSR RESEXI CLEAR FLAGS 8E97- 20 8B
90 1700 JSR RESIBU 8E9A- 20 AF 90 1705 JSR RESOBU 8E9D- 20 ID 93
1710 JSR HELP 8EAO- A9 00 1715 LDA #0 BEA2- 8D 19 91 1720 STA
CRLAST 8EA5- 8D AF 95 1725 STA PRTMO PRINTER OFF 8EA8- A9 DF 1730
LDA .ULINE SET CURSOR 8EAA- 8D 60 91 1735 STA CURSOR 8EAD- A2 01
1740 LDX #1 8EAF- AD 54 AA 1745 LDA $AA54 8EB2- C9 FD 1750 CMP UFD
8EB4- FO 02 1755 BEQ .1 40 COL 8EB6- A2 00 1760 LDX #0 BO COL 8E88-
8E BO 95 1765 · 1 STX SCRN40 8EBB- 60 1770 RTS
1775 *-------------------------------- 8EBC- 48 1780 TRMCHR PHA
ZEND EEN CHAR 8EBD- AD C9 CO 1785 · 1 LDA STAREG 8ECO- 29 10 1790
AND 1$10 8EC2- FO F9 1795 BEQ . I WAIT FOR TRMREG EMPTY 8EC4- 68
IBOO PLA 8EC5- 8D C8 CO 1805 STA TRMREG 8EC8- 60 1810 RTS
1815 1-------------------------------- 8EC9- AD C9 CO 1820 RECCHR
LDA STAREG ONTVANG EEN CHAR 8ECC- 29 08 1825 AND UOB
-14-
EVM 32010 TERMINAL 8ECE- DO 23 1830 BNE 7
.0 BRANCH IF RECREG FULL BEDO- AD CA CO IB35 LOA COMREG 8E03- 09 01
1840 ORA HOI BED5- 80 CA CO IB45 SrA COM REG MAAK DTR HOOG 8EDB- A9
04 1850 LDA ~4
8EDA- 20 AB FC 1855 JSR WAIT WACHT 105 US 8EOO- AD CA CO 1860 LDA
COMREG 8EEO- 29 FE 1865 AND UFE 8EE2- 80 CA CO 1970 STA COMREG MAAK
OTR LAAG BEE5- AO 00 1875 LOY 1$00 9EE7- AD C9 CO 1880 0 LOA STAREG
.. 8EEA- 29 08 lBB5 AND HOB 8EEC- DO 05 1890 BNE 7 . ~, GA VERDER
ALS RECREG FULL BEEE- C8 1895 INY 8EEF- DO F6 1900 BNE .2 TEST
NOGEENS RECREG FULL BEF1- 38 1905 SEC SEEN DATA IN RECREG 8EF2- 60
1910 RTS NO CHAR I CARRY=1
. 8EF3- AD C8 CO 1915 .3 LOA RECREG HAAL CHAR 8EF6- 09 80 1920 ORA
U80 BEF8- 18 1925 CLC WEL CHAR I CARRY=Q 8EF9- 60 19;30 RTS
1935 *-------------------------------- 8EFA- 48 1940 STOCHR PHA
STORE CHAR IN BUFFER 8EFB- AD E7 95 1945 LDA IBUOPN 8EFE- DO 02
1950 ENE STORE3 BRANCH IF BUFFER OPEN 9FOO- 68 1955 PLA 8F01- 60
1960 RTS BF02- 68 1965 STORE} PLA 8F04- 1970 IBUPNT .EQ HI INPUT
BUFFER-POINTER 8F03- 80 BC 95 1975 STA BUFFER DATA NAAR
BUFFER(IEUPNT) 8F06- EE 04 8F 1980 INC IBUPNT 8F09- DO 09 1985 ENE
TEsn 8FOB- EE 05 8F 1990 INC IBUPNT+l 8FOE- AD 05 8F 1995 LOA
IBUPNT+l 8FII- 80 BB 95 2000 STA BUFLST+I 8F14- AO 04 8F 2005 TEST3
LOA IEUPNT TEST BUFFER VOL BFI7- 80 BA 95 2010 STA BUFLST BF1A- CO
BE 95 2015 CMP BUFEND 8F1D- DO 14 2020 BNE EX IT3 8F1F- AD 05 SF
2025 LOA lBUPNT+1 BF22- CD 8F 95 2030 CMP BUFEND+l BF25- 30 OC 2035
BMI EXIT3 BF27- 20 DO FB 2040 VOL3 JSR BEEP BUFFER VOL 8F2A- 20 DD
FB 2045 JSR BEEP 8F2D- 20 79 90 2050 JSR SETEXI SET EX IT FLAG
8F30- 20 8B 90 2055 JSR RESIBU RESET INPBUF 8F33- 60 2060 EX 1T3
RTS
2065 *-------------------------------- 8F34- 2C 00 CO 2070 BETKEY
BIT KBD HAAL TOETS OP 8F37- 10 08 2075 BPL NOKEY BEEN TOETS 8F39-
AD 00 CO 2080 LDA KBD HAAL TOETS 8F3C- 2C 10 CO 2085 BIT KBDSTR CLR
KEY STROEE BF3F- 18 2090 CLC WEL TOETS I CARRY=O 8F40- 60 2095 RTS
8F41- 38 2100 NOKEY SEC GEEN TOETS I CARRY=I
-15-
EVM 32010 TERMINAL 8F42- 60 2105 RTS
2110 *-------------------------------- 8F43- AD BB 95 2115 GET8UF
LOA OBUFLG GET DUTPUTBUFFER CHAR 8F46- FO 05 2120 BEQ EX IT5 BF4B-
AD 89 95 2125 LOA DBUOPN BF4B- DO 02 2130 BNE DBDPEN BRANCH IF
BUFFER OPEN 8F4D- 38 2135 EX IT5 SEC NO CHAR BF4E- 60 2140 RTS
8F4F- AD B2 95 2145 DBDPEN LOA TIMEH 8F52- CD 84 95 2150 CMP TMOUTH
TEST TIMEOUT BF55- 90 F6 2155 8CC EX IT5 EX IT IN TIMEOUT 8F57- AD
81 95 2160 LDA TIMEL 8F5A- CD 83 95 2165 CMP TMDUTL 8F5D- 90 EE
2170 BCC EXIT5 8F5F- A9 00 2175 GDDN4 LOA #0 8F61- A2 00 2180 LDX
#0 8F63- 20 AA 9\ 2185 JSR SEHNO SET TIMEOUT 0 8F67- 2190 OBUPNT
.EQ HI DUTPUTBUFFER-POINTER 8F66- AD BC 95 2195 LOA BUFFER HAAL
BUFFER(DBUPNT) 8F69- 48 2200 PHA 8F6A- EE 67 8F 2205 INC OBUPNT
8F6D- DO 03 2210 BNE TEST4 BF6F- EE 68 8F 2215 INC DBUPNT+1 8F72-
AD 67 8F 2220 TEST4 LDA OBUPNT TEST BUFFER LEEG 8F75- CD BA 95 2225
CMP BUFLST 8F78- DO OB 2230 BNE EXIT4 8F7A- AD 68 8F 2235 LDA
OBUPNT+I 8F7D- CD BB 95 2240 CMP BUFLST+I BFBO- 30 03 2245 BMI
EXIT4 8F82- 20 AF 90 2250 LEEG4 JSR RESOBU RESET OUTBUF 8F85- 68
2255 EX lT4 PLA 8F86- 18 2260 CLC 8F87- 60 2265 RTS
2270 *-------------------------------- 8F88- C9 9B 2275 TSTKEY CMP
#ESC TEST KEY 8FBA- FO 12 2280 BEQ ESCI BRANCH ON ESC 8F8C- 2C B8
95 2285 BIT OBUFLG 8F8F- DO 06 2290 BNE EXI EXIT ON OBU ACTIEF
8F91- C9 80 2295 CMP #CR 8F93- FO 04 2300 BEQ CRI BRANCH ON CR
8F95- 18 2305 ClC ENABLE SEND BF96- 60 2310 RTS 8F97- 38 2315 EXI
SEC DISABLE SEND 8F98- 60 2320 RTS 8F99- 20 C4 90 2325 CR1 JSR
STAIBU START INPBUF 8F9C- 18 2330 CLC ENABLE SEND 8F9D- 60 2335 RTS
8F9E- A9 2A 2340 ESCI LDA #STER ESC-PROMPT = • 8FAO- 20 ED FD 2345
JSR COUT 8FA3- 20 34 8F 2350 . 1 JSR GETKEY 8FA6- BO FB 2355 BCS .1
WACHT OP KEY 8FA8- 48 2360 PHA BFA9- A9 88 2365 LDA ISS WIS • 8FAB-
20 ED FD 2370 JSR COUT 8FAE- 68 2375 PLA
-16-
EVM 32010 TERMINAL BFAF- C9 Dl 23BO QI eMP UDI ASCII Q
8F81- DO 06 2385 SNE I 1 8F83- 20 79 90 2390 JSR SETEX I SET EX IT
FLAB 8F86- 4C 3F 90 2395 JMP EXO 8FB9- C9 C9 2400 I 1 CMP UC9 ASCII
I 8FBB- DO 06 2405 ENE Cl 8FBD- 20 85 90 2410 JSR SET! BU SET
INPUTBUFFER BFCO- 4C 3F 90 2415 JMP EXO 8FC3- C9 C3 2420 CI CMP UC3
ASCII C 8FC5- DO 06 2425 BNE 01 8FC7- 20 8B 90 2430 JSR RESIBU
RESET INPBUF 8FCA- 4C 3F 90 2435 JMP EXO 8FCD- C9 CF 2440 01 CMP
UCF ASCII 0 8FCF- DO 06 2445 SNE 01 8FD1- 20 AO 90 2450 JSR SETOBU
SET OUTPUTBUFFER 8FD4- 4C 3F 90 2455 JIIP EXO 8FD7- C9 C4 2460 01
CMP UC4 ASCI I 0 BFD9- DO 06 2465 SNE WI 8FDB- 20 AF 90 2470 JSR
RESOBU RESET OUTBUF 8FDE- 4C 3F 90 2475 JMP EXO 8FEI- C9 D7 2480 WI
CMP UD7 ASCII W 8FE3- DO 06 2485 BNE Xl BFE5- 20 98 92 2490 JSR
WISNUM WIS RE6ELNUMMERS 8FEB- 4C 3F 90 2495 JMP EXO BFEB- C9 DB
2500 Xl CMP UDB ASCII X BFED- DO 06 2505 BNE HI BFEF- 20 66 92 2510
JSR WISLF WIS LF 8FF2- 4C 3F 90 2515 JMP EXO 8FF5- C9 CB 2520 HI
CI'IP UC8 ASCII H 8FF7- DO 06 2525 BNE PI 8FF9- 20 1 D 93 2530 JSR
HELP PRINT HELP BFFC- 4C 3F 90 2535 JIIP EXO 8FFF- C9 DO 2540 PI
CI'IP UDO ASCII P 9001- DO 06 2545 BNE AI 9003- 20 F2 94 2550 JSR
PRTBUF PRINT BUFFER 9006- 4C 3F 90 2555 JMP EXO 9009- C9 Cl 2560 AI
CMP UCI ASCII A 9008- DO 06 2565 BNE BI 9000- 20 61 91 2570 JSR
PRTON SET PRINTER ON 9010- 4C 3F 90 2575 JIfP EXO 9013- C9 C2 25BO
BI CMP UC2 ASC I I B 9015- DO 06 25B5 BNE L1 9017- 20 67 91 2590
JSR PRTOF SET PRINTER OFF 901A- 4C 3F 90 2595 JMP EXO 9010- C9 CC
2600 L1 CMP UCC ASCII L 901F- DO 06 2605 BNE SI 9021- 20 6F 95 2610
JSR LDBUF LOAD BUFFER 9024- 4C 3F 90 2615 JIfP EXO 9027- C9 03 2620
51 CMP UD3 ASC II S 9029- DO 06 2625 BNE VI 9028- 20 26 95 2630 JSR
SAVBUF SAVE BUFFER 902E- 4C 3F 90 2635 JMP EXO 9031- C9 06 2640 VI
CI'IP UD6 ASC II V 9033- DO 06 2645 SNE ZI 9035- 20 03 92 2650 JSR
WISCOM WIS COi'IMENTAAR
-17-
EVM 32010 TERMINAL 9038- 4C 3F 90 2655 JMP EXO 903B- C9 DA 2660 ZI
CMP UDA ASC I I Z 9030- DO 02 2665 BNE EX2 903F- 38 2670 EXO SEC
DISABLE SEND 9040- 60 2675 RTS 9041- 18 2680 EX2 CLC ENABLE SEND
9042- 60 2685 RTS
2690 *-------------------------------- 9043- 48 2695 TSTBUF PHA
TEST OUTPUT BUFFER CHAR 9044- C9 80 2700 CMP #CR 9046- DO OC 2705
BNE CR2 BRANCH ON NO CR 9048- AD CO 95 2710 LDA CRTML SET CR- TI
MEOUT 904B- AE CI 95 2715 LDX CRTMH 904E- 20 AA 91 2720 JSR SETTNO
9051- 20 C4 90 2725 JSR STAIBU START INPBUF 9054- 68 2730 CR2 PLA
9055- 18 2735 CLC ENABLE SEND 9056- 60 2740 RTS
2745 *-------------------------------- 9057- 48 2750 TSTREC PHA
TEST RECEIVED CHAR 9058- C9 93 2755 CMP #XOFF 905A- FO 07 2760 SEQ
XFI 905C- C9 91 2765 CMP #XON 905E- FO OE 2770 BEQ XNI 9060- 68
2775 PLA 9061- 18 2780 CLC ENABLE RECEIVE 9062- 60 2785 RTS 9063-
20 BE 90 2790 XFI JSR CLSOBU CLOSE OUTBUF 9066- A9 43 2795 LOA U43
ASCII INV C 9068- 80 26 04 2800 STA RBOVEN-I 9068- 68 2805 PLA
906C- 38 2810 SEC DISABLE RECEIVE 9060- 60 2815 RTS 906E- 20 B8 90
2820 XNI JSR OPNOBU OPEN OUTBUF 9071- A9 4F 2825 LOA U4F ASCII INV
0 9073- BD 26 04 2830 STA RBOVEN-I 9076- 68 2835 PLA 9077- 38 2840
SEC DISABLE RECEIVE 9078- 60 2845 RTS
2850 *-------------------------------- 9079- A9 01 2855 SETEXI LOA
#1 SET EX IT FLAG 9078- 8D 85 95 2860 STA EXIFlG 907E- 60 2865
RTS
2870 *-------------------------------- 907F- A9 00 2875 RESEXI LOA
#0 RESET EX IT FLAG 9081- 8D B5 95 2880 STA EXIFLG 9084- 60 2885
RTS
2890 *-------------------------------- 9085- A9 01 2895 SETIBU LDA
#1 SET INPUT BUFFER 9087- 8D 86 95 2900 STA IBUFlG 908A- 60 2905
RTS
2910 *-------------------------------- 908B- A9 00 2915 RESIBU LDA
#0 RESET INPUT BUFFER 908D- 8D B6 95 2920 STA IBUFlG 9090- 80 B7 95
2925 STA IBUOPN
-18-
EVM 32010 TERMINAL 9093- 60 2930 RTS
2935 *-------------------------------- 9094- A9 01 2940 OPNIBU LOA
#1 OPEN INPUTBUFFER 9096- 80 B7 95 2945 STA IBUOPN 9099- 60 2950
RTS
2955 *-------------------------------- 909A- A9 00 2960 CLSIBU LOA
#0 CLOSE INPUTBUFFER 909C- 80 B7 95 2965 STA IBUOPN 909F- 60 2970
RTS
2975 *-------------------------------- 90AO- 20 8B 90 2980 SETOBU
JSR RESIBU SET OUTPUT BUFFER 90A3- A9 01 2985 LOA #l 90A5- 8D B8 95
2990 STA OBUFLG 90A8- 80 B9 95 2995 STA OBUOPN 90AB- 20 El 90 3000
JSR STAOBU 90AE- 60 3005 RTS
3010 *-------------------------------- 90AF- A9 00 3015 RESOBU LDA
#0 RESET OUTPUT BUFFER 90Bl- 8D B8 95 3020 STA OBUFL~
90B4- 8D B9 95 3025 STA OBUOPN 90B7- 60 3030 RTS
3035 *-------------------------------- 90B8- A9 01 ·3040 OPNOBU LDA
II OPEN OUTPUTBUFFER 90BA- 8D B9 95 3045 STA OBUOPN 90BD- 60 3050
RTS
3055 *-------------------------------- 90BE- A9 00 3060 CLSOBU LDA
10 CLOSE OUTPUT BUFFER 90CO- 8D 89 95 3065 STA OBUOPN 90C3- 60 3070
RTS
3075 f-------------------------------- 90C4- 48 3080 STAIBU PHA
START INPUrBUFFER 90C5- AD B6 95 3085 LDA IBUFLG BIJ CR OUT 90C8-
FO 15 3090 BEQ STAIBO BRANCH IF BUFFER NOT ACTIVE 90CA- 20 94 90
3095 JSR OPNIBU 90CD- AD BC 95 3100 LDA BUFFER SET 8UFFER
STARTADRES 90DO- 8D 04 8F 3105 STA IBUPNT 9003- 80 BA 95 3110 STA
BUFLST 9006- AD BD 95 3115 LDA BUFFER+l 90D9- 8D 05 BF 3120 STA
IBUPNT+l 90DC- 8D BB 95 3125 STA BUFLST+l 90DF- 68 3130 STAIBO PLA
90EO- 60 3135 RTS
3140 *-------------------------------- 90El- AD BC 95 3145 STAOBU
LDA BUFFER START OUTPUTBUFFER 90E4- 80 67 BF 3150 STA OBUPNT SET
BUFFER STARTADRES 90E7- AD BD 95 3155 LOA BUFFER+l 90EA- BD 6B 8F
3160 STA OBUPNT+l 90ED- 60 3165 RTS
3170 f-------------------------------- 90EE- 48 3175 PRTCHR PHA
PRINT CHAR 90EF- C9 84 31BO CMP IEOT ONDERDRUK EOT 90Fl- FO 16 3185
BEQ . 1 90F3- C9 8A 3190 CMP ILF ONDERDRUK LF 90F5- FO 12 3195 BEQ
. I 9t)F7- [9 8C 3200 CMP IFF ONOERORUK FF
-19-
EVM 32010 TERMINAL 90F9- FO OE 3205 BEQ · 1 90FB- C9 80 3210 CMP
#CR ONDERDRUK 2. CR 90FD- FO OC 3215 BEQ .2 90FF- 48 3220 PHA 9100-
A9 00 3225 LOA DO 9102- 80 19 91 3230 STA CRLAST 9105- 68 3235 PLA
9106- 20 lA 91 3240 • JSR PRTCH2 • 0
9109- 68 3245 · 1 PLA 910A- 60 3250 RTS 910B- AD 19 91 3255 0
• < LOA CRLAST LAST CHAR CR' 910E- DO F9 3260 BNE · 1 9110- A9
01 3265 LOA II 9112- 80 19 91 3270 STA CRLAST 9115- A9 80 3275 LOA
ICR 9117- 00 EO 3280 BNE .3 9119- 00 3285 CRLAST .OA 10 LAST CHAR =
CR
3290 *-------------------------------- 911A- 48 3295 PRTCH2 PHA
PRINT SUB 911B- 48 3300 PHA 911C- AC BO 95 3305 LOY SCRN40 qqF- FO
12 3310 BEQ • 1 40 COL / 80 COL 9121- A4 24 3315 LOY $24 RESTORE
CURSOR CHAR 9123- AD 5F 91 3320 LOA CURSC 9126- 91 28 3325 STA
($28), Y 9128- 68 3330 PLA 9129- 20 EO FO 3335 JSR COUT PRINT CHAR
912C- A4 24 3340 LOY $24 STORE CURSOR CHAR 912E- 81 28 3345 LOA
($28) ,Y 9130- 4C 46 91 3350 JMP .2 9133- AC 7B 05 3355 · 1 LOY
$578 80 COL 9136- AD 5F 91 3360 LOA CURSC 9139- 20 F2 CE 3365 JSR
$CEF2 913C- 68 3370 PLA 913D- 20 ED FO 3375 JSR COUT PRINT CHAR
9140- AC 7B 05 3380 LOY $578 9143- 20 01 CF 3385 JSR $CF01 9146- 80
5F 91 3390 .2 STA CURSC 9149- 68 3395 PLA 914A- AE AF 95 3400 LOX
PRTMO PRINTER ON ? 9140- FO OF 3405 BEQ .3 914F- 29 7F 3410 AND U7F
WIS BIT 7 9151- 20 82 C1 3415 JSR PROUT CHAR NAAR PRINTER 9154- AD
19 91 3420 LOA CRLAST 9157- FO 05 3425 BEQ .3 9159- A9 8A 3430 LOA
ILF SEND EXTRA LF 9158- 20 82 C1 3435 JSR PROUT 915E- 60 3440 .3
RTS 915F- AO 3445 CURSC .DA UAO CURSOR CHAR 9160- OF 3450 CURSOR
.DA UDF CURSOR SYMBOOL
3455 *-------------------------------- 9161- A9 01 3460 PRTON LDA
II SET PR I NTER ON 9163- 80 AF 95 3465 STA PRTMO 9166- 60 3470
RTS
3475 *--------------------------------
-20-
EVM 32010 TERMINAL 9167- A9 00 3480 PRTOF LDA #0 SET PRINTER OFF
9169- 80 AF 95 3485 STA PRTMO 916C- 60 3490 RTS
.~
918A- AD 5F 91 3555 LDA CURSC 9180- 91 28 3560 .2 STA ($28l,Y 91SF-
60 3565 RTS 9190- AC 78 05 3570 , · ~ LDY $578 CURSOR 80 COL 9193-
AD 60 91 3575 LDA CURSOR 91%- 2C Bl 95 3580 BIT TIMEL 9199- 50 03
3585 avc .4 919B- AD 5F 91 3590 LOA CURSC 919E- 4C F2 CE 3595 .4
JMP $CEF2
3600 f-------------------------------- 91Al- A9 00 3605 RESTIM LDA
10 RESET TIME 91A3- 8D 81 95 3610 STA TIMEL 91A6- 8D B2 95 3615 STA
TIHEH 91A9- 60 3620 RTS
3625 *-------------------------------- 9IAA- 80 B3 95 3630 SETTMO
STA TMOUTL SET TIMEOUT 9IAD- 8E B4 95 3635 STX TMOUTH 9180- 60 3640
RTS
3645 *-------------------------------- 9181- AD 85 95 3650 TSTEXI
LDA EXIFL6 TEST EXIT FLAG 91B4- DO 02 3655 BNE .2 91B6- 18 3660 · 1
CLC NO EX IT 91B7- 60 3665 RTS 9188- AD 82 95 3670 .2 LOA TIMEH
TEST EX IT TIME 91B8- CD C3 95 3675 CHP EX ITHH 918E- 90 F6 3680
BCC · 1 BRANCH IN TIME 9ICO- AD 81 95 3685 LDA TlMEL 91C3- CD C2 95
3690 CMP EX ITML 91C6- 90 EE 3695 BCC · 1 91C8- 20 88 90 3700 JSR
RESI8U RESET INBUF 91CB- 20 AF 90 3705 JSR RESOBU RESET OUTBUF
91CE- 20 7F 90 3710 JSR RESEXI RESET EX ITFLAG 91Dl- 38 3715 SEC
OUT OF EX IT TIME 9102- 60 3720 RTS
3725 f-------------------------------- 91D3- 8A 3730 WISSEN TXA WIS
REGELNUMMERS 9104- 48 3735 PHA IN OUTBUF 91D5- AD Be 95 3740 LDA
BUFFER 91D8- 8D F2 91 3745 STA LPOINT 9IDB- 8D 46 92 3750 STA
SPOINT
-21-
EVM 32010 TERMINAL 9IDE- AD BD 95 3755 LOA BUFFER+I 91EI- SO F3 91
3760 STA LPOINT+I SET LOAD POINTER 91E4- SO 47 92 3765 STA SPOINHI
SET SAVE POINTER 91E7- A9 01 3770 LOA ~I
91E9- SO 64 92 3775 STA CRFLA6 SET CRFLA6 9IEC- A9 00 3780 LOA
~O
9IEE- 80 65 92 3785 STA LASTCH 91F2- 3790 LPOINT .EQ *+1 91FI- AE
BC 95 3795 WISI LDX BUFFER LOAD BUFFER(LPOINT) 91F4- EE F2 91 3800
INC LPOINT INC LOAD POINTER 91F7- DO 03 3805 BNE .2 91F9- EE F3 91
3810 INC LPOINT+I 9IFC- AD F2 91 3815 .2 LDA LPOINT EINDE BUFFER?
9IFF- CD BA 95 3820 CMP BUFLST 9202- DO OD 3825 BNE .3 9204- AD F3
91 3S30 LDA LPOINT+I 9207- CD BB 95 3835 CMP BUFLST+I 920A- 30 05
3840 BMI .3 920C- A9 01 3845 LDA II 920E- 80 65 92 3850 STA LASTCH
SET LAST CHAR 9211- AD 64 92 3855 • LDA CRFLA6 .0
q214- DO OC 3860 BNE WIS3 BRANCH ON CRFLA6 9216- EO 80 3865 CPX OCR
CRFLA6 IS CLEARED 9218- DO 05 3870 BNE WIS2 921A- A9 01 3875 LOA II
CR : SET CRFLA6 92IC- 80 64 92 3880 STA CRFLA6 921F- 4C 45 92 3885
WIS2 JMP WiS5 SAVE CHAR 9222- AD 7D 92 3890 WIS3 LOA WLFFLG CRFLA6
IS SET 9225- FO OS 3895 BEQ . I 9227- 20 7E 92 3900 JSR WLF 922A-
80 24 3905 BCS WiS6 922C- AD AF 92 3910 . I LDA WLNFLG 922F- FO 05
3915 BEQ .2 9231- 20 BO 92 3920 JSR WLN 9234- BO IA 3925 BCS WIS6
9236- AD E4 92 3930 .2 LDA WCMFLG 9239- FO 05 3935 BEQ .3 923B- 20
E5 92 3940 JSR WCM 923E- BO 10 3945 BCS WISb 9240- A9 00 3950 .3
LOA to 9242- 8D 64 92 3955 STA CRFLA6 9246- 3960 SPOINT • EQ *+1
9245- 8E 46 92 3965 WIS5 STX SPOINT SAVE CHAR 9248- EE 46 92 3970
INC SPOINT 924B- DO 03 3975 BNE WiS6 9240- EE 47 92 3980 INC
SPOINT+I 9250- AD 65 92 3985 WIS6 LOA LASTCH 9253- FO 9C 3990 BEQ
WISI 9255- AD 46 92 3995 LDA SPOINT LAATSTE CHAR 9258- 80 BA 95
4000 STA BUFLST 925B- AD 47 92 4005 LOA SPOINT+I 925E- 8D BB 95
4010 STA BUFLST+I 9261- 68 4015 PLA 9262- AA 4020 TAX 9263- 60 4025
RTS EXIT
-22-
EVM 32010 TERMINAL 9264- 00 4030 CRFLAG .OA #0 CRFLAG (;1 NA
CR-CHAR) 9265- 00 4035 LASTCH .OA #0 LAATSTE CHAR (I;TRUE)
4040 *-------------------------------- 9266- 20 8B 90 4045 WISLF
JSR RESIBU WIS LF IN BUFFER 9269- A9 01 4050 LOA #1 926B- BO 70 92
4055 STA WLFFLG 926E- A9 00 4060 LOA #0 9270- 8D AF 92 4065 STA
WLNFLG 9273- BO E4 92 4070 STA WCMFLG 9276- BD 02 93 4075 STA
COMFLG 9279- 20 D3 91 40BO JSR WISSEN 927C- 60 4085 RTS 9270- 00
4090 WLFFLG .OA to WIS LF (! ;TRUE)
4095 *-------------------------------- 927E- EO 80 4100 WLF CPX tCR
WIS LF 9280- FO 17 4105 BEQ WLFI SUBROUTI HE 9282- EO 8A 4110 CPX
#LF 9284- FO 13 4115 BEQ WLFI 9286- EO BC 4120 CPX tFF 92B8- FO OF
4125 BEQ WLFI 92BA- EO 9A 4130 CPX tSUB 92BC- FO OB 4135 BEQ WLFI
928E- EO BE 4140 r,PX USE ASCII > 9290- DO 05 4145 BNE . I 9292-
A9 01 4150 LOA II SET COMFLG 9294- BD 02 93 4155 STA CONFLG 9297-
18 4160 . I CLC NIET WISSEN 929B- 60 4165 RTS 9299- 3B 4170 WLFI
SEC WEL WISSEN 929A- 60 4175 RTS
41BO *-------------------------------- 929B- 20 BB 90 41B5 WISNUM
JSR RESIBU WIS REGElNUMMERS IN BUFFER 929E- A9 01 4190 lDA II 92AO-
BD 70 92 4195 STA WLFFLG 92A3- BO AF 92 4200 STA WlNFLG 92A6- A9 00
4205 LOA 10 92AB- BO E4 92 4210 STA WCMFlG 92AB- 20 03 91 4215 JSR
WISSEN 92AE- 60 4220 RTS 92AF- 00 4225 WLNFlG .OA to WIS lINENUM
(l;TRUE)
4230 *-------------------------------- 92BO- EO BO 4235 WLN CPX UBC
WI S II NENUMBER 9282- 30 04 4240 BMI . I SUBROUTINE 92B4- EO BA
4245 CPX UBA 92B6- 30 13 4250 8MI WLN3 8RANCH ON CIJFER 92BB- AD 02
92 4255 . I LOA NUMFLG 928B- FO OC 4260 BEQ WLN2 92BO- A9 00 4265
LOA 10 928F- BO 02 92 4270 STA NUMFlG RESET NUMFlG 92C2- BO 64 92
4275 STA CRFLA6 RESET CRFLAG 92C5- EO AO 42BO CPX ISPC SPC ? 92C7-
FO 07 4285 BEQ WLNI 92C9- 18 4290 WlN2 ClC NIET WISSEN 92CA- 60
4295 RTS 92C8- A9 01 4300 WLN3 lOA II SET NUMFlG
-23-
EVM 32010 TERMINAL 92CD- 8D D2 92 4305 STA NUMFLG 92DO- 38 4310
WLNI SEC WEL WISSEN 92D 1- 60 4315 RTS 92D2- 00 4320 NUMFLG .DA #0
NUMFLAG ( I=NUMBER)
4325 *-------------------------------- 92D3- 20 66 92 4330 WISCOM
JSR WISLF WIS COMMENT IN BUFFER 92D6- A9 01 4335 LOA #1 92D8- 8D E4
92 4340 STA WCMFLG 920B- A9 00 4345 LDA #0 92DO- 80 7D 92 4350 STA
WLFFLG 92EO- 20 D3 91 4355 JSR WISSEN 92E3- 60 4360 RTS 92E4- 00
4365 WCMFLG .DA #0 WIS COMM (1 =TRUE)
4370 *-------------------------------- 92E5- AD 02 93 4375 WCM LOA
COMFLG WIS COM SUBROUTINE 92E8- DO 00 4380 BNE " .. 92EA- EO BC
4385 CPX uac ASCII (
92EC- DO 07 4390 SNE . I 92EE- A9 01 4395 LOA #1 SET COMFLG 92FO-
8D 02 93 4400 STA COMFLG 92F3- 38 4405 SEC WEL WISSEN 9~::-4- 60
4410 RTS 92F5- 18 4415 . I CLC NIET WISSEN 92F6- 60 4420 RTS 92F7-
EO BE 4425 .2 CPX UBE ASCII > 92F9- DO 05 4430 BNE .3 92FB- A9
00 4435 LOA #0 CLEAR COMFLG 92FO- 80 02 93 4440 STA COMFLG 9300- 38
4445 .3 SEC WEL NISSEN 9301- 60 4450 RTS 9302- 00 4455 COMFLG .OA
40 COMMENT FLAG ( I=COMM)
4460 *-------------------------------- 9303- 80 OA 93 4465 PRTAB
STA PTPTR PRINT TABEL 9306- 8E 08 93 4470 STX PTPTR+I SET AORES
POINTER 930A- 4475 PTPTR .EQ HI AORES POINTER 9309- AD OA 93 4480
PTI LOA PTPTR 930C- 10 OE 4485 BPL PTEXT BRANCH ON NEG CHAR 930E-
20 ED FD 4490 JSR COUT PRINT CHAR 9311- EE OA 93 4495 INC PTPTR
9314- DO 03 4500 BNE . I 9316- EE OB 93 4505 INC PTPTR+I 9319- 4C
09 93 4510 . I JMP PTI 931C- 60 4515 PTEXT RlS
4520 1-------------------------------- 931D- 20 8B 90 4525 HELP JSR
RESIBU PRINT HELP LIST 9320- A9 28 4530 LOA #HELPT 9322- A2 93 4535
LOX IHELPT 9324- 20 03 93 4540 JSR PRTAB PRINT TABEL 9327- 60 4545
RTS 9328- 80 80 4550 HELPl .HS 8080
932A- AA AA AO 9320- C3 CF CE 9330- 04 02 CF 9333- CC CC C~
-24-
EVM 32010 TERMINAL 9336- D2 AO C3 9339- CF CD CD 933C- C 1 CE C4
933F- CF A7 03 9342- AO AO AA 9345- AA 4560 .AS -1** CONTROLLER
COMMANDO'S **1 9346- BD BD 4565 . HS BDBD CR/CR 934B- C5 D3 C3
9348- AO C1 AO 934E- BD AO DA 9351- C5 04 AO 9354- 00 02 C9 9357-
CE 04 C5 935A- D2 AO C1 9350- C1 CE 4570 .AS -/ESC A = lET PRINTER
AANI 935F- BO 4575 .HS BD 9360- C5 D3 C3 9363- AO C2 AO 9366- 8D AO
DA 9369- C5 D4 AO 936C- DO D2 C9 93bF- CE D4 C5 9372- D2 AO D5
9375- C9 D4 45ao .AS -/ESC 8 = lET PRINTER un I 9377- BD 4585 .HS
BD n78- C5 D3 C3 9378- AO C3 AO 937E- DD AO D3 9381- CC D5 C9 93a4-
D4 AO C9 93a7- CE DO 05 93BA- D4 C2 D5 93BD- C6 C6 C5 9390- D2 4590
. AS -I ESC C = SLUIT INPUTBUFFERI 9391- BO 4595 .HS aD 9392- C5 D3
C3 9395- AO C4 AO 939a- DD AO D3 9398- CC 05 C9 939E- D4 AO CF
93AI- D5 D4 DO 93A4- D5 D4 C2 93A7- 05 C6 C6 93AA- C5 D2 4600 .AS
-/ESC 0 = SLUIT OUTPUTBUFFERI 93AC- BO 4605 .HS 80 93AD- C5 D3 C3
93BO- AO ca AO 9383- BD AO C4 9386- C5 OA C5 9389- AO ca C5 938C-
CC DO AO 93BF- CC C9 D3 93C2- D4 4610 .AS -/ESC H = DElE HELP LIST
I 93C3- BO 4615 .HS aD 93C4- C5 03 C3
,. " .r· ,":"
-25-
EVM 32010 TERMINAL 93C7- AO C9 AO 93CA- SO AO CF 93CO- DO C5 CE
9300- AO C9 CE 9303- DO D5 04 93D6- C2 D5 C6 9309- C6 C5 D2 4620 ·
AS -/ESC I = OPEN INPUTBUFFERI 93DC- 8D 4625 .HS 8D 93DD- C5 D3 C3
93EO- AO CC AO 93E3- BO AO CC 93E6- CI CI C4 93E9- AO C6 C9 93EC-
CC C5 AO 93EF- 06 Cl CE 93F2- AO C4 C9 93F5- D3 CB AO 93F8- CE CI
Cl 93FB- D2 AO C2 93FE- 05 C6 C6 9401- C5 02 4630 · AS -/ESC L =
LAAD FILE VAN OISK NAAR BUFFER I 9403- 80 4635 · HS 8D 9404- C5 D3
C3 9407- AO CF AO 940A- BD AO CF 940D- DO C5 CE 9410- AO CF D5
9413- 04 DO 05 9416- D4 C2 D5 9419- C6 C6 C5 941C- 02 4640 .AS
-/ESC 0 = OPEN OUTPUTBUFFERI 9410- 80 4645 .HS BO 941E- C5 D3 C3
9421- AO DO AO 9424- SD AO DO 9427- D2 C9 CE 942A- D4 AO C2 942D-
D5 C6 C6 9430- C5 D2 4650 .AS -/ESC P = PRINT BUFFERI 9432- 8;)
4655 • HS 80 9433- C5 D3 C3 9436- AO Dl AO 9439- BD AO Db 943C- C5
D2 CC 943F- C I C 1 D4 9442- AO C4 C9 9445- D4 AO DO 9448- D2 CF C7
944B- D2 C1 CD 944E- CD C1 4660 .AS -/ESC Q = VERLAAT DIT
PROGRAMMAI 9450- 8D 4665 .HS BD 9451- C5 D3 C3 9454- AO D3 AO 9457-
SD AO D3 945A- C1 06 C5
-26-
EVM 32010 TERMINAL 945D- AO C6 C9 9460- CC C5 AO 9463- D6 CI CE
9466- AO C2 D5 9469- C6 C6 C5 946C- D2 AO CE 946F- CI CI D2 9472-
AO C4 C9 9475- D3 CD 4670 .AS -/ESC S = SAVE FILE VAN BUFFER NAAR
DISKI 9477- aD 4675 .HS 8D 9478- C5 D3 C3 947B- AO D6 AO 947E- BD
AO D7 9481- C9 D3 AO 94B4- C3 CF CD 94B7- CD C5 CE 94BA- D4 CI CI
94BD- D2 AO C9 9490- CE AO C2 9493- D5 C6 C6 9496- C5 D2 46BO .AS
-/ESC V = WIS COMMENTAAR IN BUFFERI 949B- aD 46a5 · HS aD 9499- C5
D3 C2 949C- AO D7 AO 949F- BD AO D7 94A2- C9 D3 AO 94A5- D2 C5 C7
94AB- C5 CC CE 94AB- D5 CD CD 94AE- C5 D2 D3 94BI- AO C9 CE 9484-
AO C2 D5 9487- Cb Cb C5 948A- D2 4690 .AS -/ESB W = WIS
RE6ELNUMMERS IN BUFFER I 94B8- BD 4695 .HS BD 948C- C5 D3 C3 94BF-
AO DB AO 94C2- 8D AO D7 94C5- C9 D3 AO 94CB- CC C6 AO 94CB- C9 CE
AO 94CE- C2 D5 C6 94DI- C6 C5 D2 4700 .AS -/ESC X = WIS LF IN
BUFFERI 94D4- BD 4705 • HS 8D 94D5- C5 D3 C3 94D8- Ao DA AO 94DB-
DD AO Db 94DE- C5 D2 CC 94EI- C 1 C 1 D4 94E4- AO C5 D3 94E7- C3 CI
DO 94EA- C5 AO CD 94ED- CF C4 C5 4710 • AS -/ESC Z = VERLAAT ESCAPE
MODEl 94FO- 8D 00 4715 .HS 8DOO
-27-
EVM 32010 TERMINAL 4725 *--------------------------------
94F2- 20 8S 90 4730 PRTBUF JSR RESIBU PRINT BUFFER 94F5- AD BC 95
4735 LDA BUFFER 94FB- 8D 05 95 4740 STA PRTPNT SET BEGINADRES 94FB-
AD BD 95 4745 LDA BUFFER+I 94FE- 8D 06 95 4750 STA PRTPNT+I 9501-
20 61 91 4755 JSR PRTON SET PRINTER ON 9505- 4760 PRTPNT .EO *+1
PRINT POINTER 9504- AD BC 95 4765 PRTl LDA BUFFER 9507- 20 EE 90
4770 JSR PRTCHR PRINT CHAR 950A- EE 05 95 4775 INC PRTPNT 950D- DO
03 4780 SNE . I 950F- EE 06 95 4785 INC PRTPNT+I 9512- AD 05 95
4790 . I LDA PRTPNT BUFFER EINDE ? 9515- CD BA 95 4795 CMP BUFLST
9518- DO EA 4800 BNE PRTl 951A- AD 06 95 4805 LDA PRTPNT+I 951D- CD
BS 95 4810 CMP BUFLST+I 9520- 30 E2 4815 BMI PRTI 9522- 20 67 91
4820 JSR PRTOF SET PRINTER OFF 9525- 60 4825 RTS KLAAR
4830 *-------------------------------- 9526- 20 8B 90 4835 SAVBUF
JSR RESIBU SAVE BUFFER 9529- A9 57 4840 LDA #SAVET I 952B- A2 95
4845 LDX ISAVETl 952D- 20 03 93 4850 JSR PRTAB PRINT TABEL 9530- AD
BD 95 4855 LDA BUFFER+I 9533- AE BC 95 4860 LDX BUFFER 9536- 20 41
F9 4865 JSR PRNTAX 9539- A9 6B 4870 LDA #SAVET2 953B- A2 95 4875
LDX ISAVET2 953D- 20 03 93 4880 JSR PRTAB 9540- 38 4885 SEC 9541-
AD SA 95 4890 LOA BUFLST 9544- ED BC 95 4895 SBC BUFFER 9547- AA
4900 TAX 9548- AD BB 95 4905 LDA BUFLST+I 9548- ED BD 95 4910 SBC
BUFFER+I 954E- 20 41 F9 4915 JSR PRNTAX 9551- A9 8D 4920 LDA OCR
9553- 20 EE 90 4925 JSR PRTCHR 9556- 60 4930 RTS 9557- 8D 84 4935
SAVETl .HS 8D84 CR EOT 9559- C2 D3 CI 955C- D6 C5 AO 955F- C6 C9 CC
9562- C5 AE D4 9565- CD D3 AC 9568- C 1 A4 20 4940 .AT -/SSAVE
FILE.T~S,A$ I 956B- AC CC A4 956E- 20 4945 SAVET2 .AT -/,L$ I
4950 *-------------------------------- 956F- 20 8B 90 4955 LDBUF
JSR RESIBU LOAD BUFFER 9572- A9 9B 4960 LOA #LOADTl 9574- A2 95
4965 LOX ILOADTI
-28-
EVM 32010 TERMINAL 9576- 20 03 93 4970 9579- AD ED 95 4975 957C- AE
BC 95 49BO 957F- 20 41 F9 49B5 95B2- A9 8D 4990 95B4- 20 EE 90 4995
95B7- IB 5000 9588- AD BC 95 5005 958B- 6D 60 AA 5010 958E- 8D SA
95 5015 9591- AD BD 95 5020 9594- 6D 61 AA 5025 9597- BD BB 95
5030
JSR PRTAB LDA BUFFER+1 LDX BUFFER JSR PRNTAX LDA #CR JSR PRTCHR CLC
LDA BUFFER ADC ELENG STA BUFlST lDA BUFFER+1 ADC BlENG+1 STA
BUFLST+I
959A- 60 5035 RTS 959B- BD B4 5040 lOADTI . HS BDB4 CR EDT 959D- C2
CC CF 95AO- CI C4 AO 95A3- C6 C9 CC 95A6- C5 AE D4 95A9- CD D3 AC
95AC- CI A4 20 5045 .AT -/BlOAD FILE.TMS,A$ I
95AF- 00 95BO- 00 9581- 00 95B2- 00 95B3- 00 95B4- 00 95B5- 00
9586- 00 95B7- 00 95B8- 00 95B9- 00 95BA- 00 30 95BC- 00 30 95BE-
41 BE 95CO- 10 95CI- 00 95C2- 00 95C3- 02
5050 .-------------------------------- 5055 • 5060
.-------------------------------- 5065 • 5070 •••••• DATA ••••••
5075 • 5080 *-------------------------------- 5085 • 5090 PRTMO .DA
*0 PRINTMODE (I=ON) 5095 SCRN40 .DA *0 40 COlOMS FLAG 5100 TIMEl
.DA to TIME LAAG 5105 TIMEH .DA 10 TIME HOOG 5110 TMOUTL .DA 10
TIMEOUT LAAG 5115 TMOUTH .DA *0 TIMEOUT HOOG 5120 EXIFlG .DA *0
EXIT FLAG (I=EXIT) 5125 IBUFLG .DA to INPUTBUFFER FLAG (I=ACTIEF)
5130 IBUOPN .DA *0 INPUTBUFFER FLAG (I=OPEN) 5135 OBUFLG .DA 40
OUTPUTBUFFER FLAG (I=ACTIEF) 5140 OBUOPN .DA #0 OUTPUTBUFFER FLAG
(I=OPEN) 5145 BUFLST .DA BUFO LAATST GEBRUIKTE BUFFERADRES 5150
BUFFER .DA BUFO BUFFER BEGINADRES 5155 BUFEND .DA SUFI BUFFER
EINDADRES 5160 CRTML .DA 116 CARR RETURN TIME 5165 CRTMH .DA to
5170 EXITML .DA 10 EXIT TIME 5175 EXITMH .DA *2 51BO • 5185
.-------------------------------- 5190 • 5195 •••••• ENTRIES
III'"
5200 • 5205 *-------------------------------- 5210 •
-29-
EVM 32010 TERMINAL 95C7- 4C 00 00 5220 ENTRI9 JMP 0 95CA- 4C 67 91
5225 ENTRI8 JMP PRTOF SET PRINTER OFF 95CD- 4C 61 91 5230 ENTRI7
JMP PRTON SET PRINTER ON 95DO- 4C 03 92 5235 ENTRI6 JMP WISCDM WIS
COMMENTAAR 9503- 4C 6F 95 5240 ENTRI5 JMP LDBUF LAAO BUFFER 9506-
4C 26 95 5245 ENTRI4 JMP SAVBUF SAVE BUFFER 95D9- 4C F2 94 5250
ENTR13 JMP PRTBUF PRINT BUFFER 95DC- 4C 10 93 5255 ENTR12 JMP HELP
PRINT HELP LIST 950F- 4C 66 92 5260 ENTR11 JMP WISLF WIS LINE FEED
95E2- 4C 9B 92 5265 ENTRIO JMP WISNUM WIS REGELNUMMERS 95E5- 4C 79
90 5270 ENTR09 JMP SETEXI SET EX IT FLAG 95E8- 4C 7F 90 5275 ENTR08
JMP RESEXI RESET EX IT FLAG 95EB- 4C AF 90 5280 ENTR07 JMP RESOBU
RESET OUTBUF 95EE- 4C AO 90 5285 ENTR06 JMP SETOBU SET OUTBUF 95FI-
4C 88 90 5290 ENTR05 JMP RESIBU RESET INPBUF 95F4- 4C 85 90 5295
ENTR04 JMP SETIBU SET I NPBUF 95F7- 4C BA 8E 5300 ENTR03 JMP INIT
INITIALIZE 95FA- 4C 44 BE 5305 ENTR02 JMP TW WARM ENTRY 95FD- 4C 41
8E 5310 ENTR01 JMP TC COLD ENTRY
5315 *--------------------------------
oono ERRORS IN ASSEMBLY
9009- AI 9013- BI 0095- BACK OOOF- BAUD FBDD- BEEP AA60- BLENG
0088- BS 3000- BUFO 8E41- BUFI 95BE- BUFEND 95BC- BUFFER 95BA-
BUFLST 8FC3- CI 0010- CLOCK 909A- CLSIBU 90BE- CLSOBU 9302- COMFLG
COCA- COMREG COCB- CONRES FDED- COUT 008D- CR 8F99- CRI 9054- CR2
9264- CRFLAS 9119- CRLAST 9SCI- CRTMH 9SCO- CRTML 9ISF- CURSC 9160-
CURSOR 8FD7- DI 0000- DTRCON 0000- ECHOC 95FD- ENTROI 9SFA- ENTR02
9SF7- ENTR03 9SF4- ENTR04 95FI- ENTROS 9SEE- ENTR06 9SEB- ENTR07
95E8- ENTR08 9SE5- ENTR09 9SE2- ENTRIO 95DF- ENTRII 9SDC- ENTR12
9SD9- ENTRI3 95D6- ENTRI4 95D3- ENTRI5 95DO- ENTR16 95CD- ENTRI7
95CA- ENTRI8 9SC7- ENTRI9 95C4- ENTR20 0084- EDT 0098- ESC
-30-
Adressen van de gebruikte symbolen.
===================================
8F9E- ESCI .01=BFA3 903F- EXO 8F97- EXI 9041- 02 95B5- EXIFL6 8F33-
EX I T3 8F85- EXIT4 8F4D- EX IT5 95C3- EX ITMH 95C2- EX ITML (l08C-
FF 8F43- GETBUF 8F34- 6ETKEY 8F5F- GOON4 BFF5- HI 931D- HELP 9328-
HELPT BFB9- 11 95B6- IBUFlG 95B7- IBUOPN 8F04- IBUPNT OOOA- INICOM
OOBF- INICON 8E8A- INIT .OI=8EB8 0002- IRQEN COOO- KBD COI0- KBDSTR
901D- 1I 9265- lASTCH 956F- lDBUF 8F82- lEE64 008A- LF 959B- lOADTl
91F2- lPOINT 8F41- NOKEY 92D2- NUMFLG 8FCD- »1 8F4F- OBOPEN 95B8-
OBUFLG 9589- OBUOPN 8F67- OBUPNT 9094- OPNIBU 90BB- OPNOBU BFFF- PI
0000- PARCON F941- PRNTAX C182- PROUT 9504- PRTI .01=9512 9303-
PRTAB 94F2- PRTBUF 911A- PRTCH2
- 31-
-32-
.01=9133, .02=9146, .03=915E 90EE- PRTCHR .03=9106, .01=9109,
.02=910B 95AF- PRTMO 9167- PRTOF 9161- PRTON 9505- PRTPNT 9309- PTl
.01=9319 931C- PTEXT 930A- PTPTR BFAF- 01 0427- RBOVEN 8EC9- RECCHR
.02=8EE7, .03=8EF3 COC8- RECREG 907F- RESEXI 908B- RESIBU 90AF-
RESOBU COC9- RESREG 91Al- RESTIM 9Q27- SI 9526- SAVBUF 9557- SAVET
1 9568- SAVET2 95BO- SCRN40 9079- SETEXI 9085- SETIBU 90AO- SETOBU
91AA- SETTMO OOAO- SPC 9246- SPOINT 90DF- STAIBO 90C4- STAIBU 90El-
STAOBU COC9- STAREG 002A- STER 8EFA- SToeHR 0080- STOPB 8F02-
STORE3 009A- SUB 8E41- TC 8F14- TEsn 8F72- TEST4 916D- TIME
.01=917B, .02=91BD, .03=9190, .Q4=919E 95B2- TIMEH 95BI- TIMEL
95B4-TMOUTH 95B3- TMOUTL BEBC- TRMCHR .01=8EBD
0008- TRMCON COC8- TRMREG 9043- TSTBUF 91BI- TSTEXI .01=9IB6,
.02=9188 8F88- TSTKEY 9057- TSTREC 8E44- TW
-33-
.01=8E47, .06=8E4C, .02=8E5I, .08=8E56
. 07=8E5F, . 03=8E70, . 04=8E78, .05=8E89 OODF- ULINE 9031- VI
8F27- VOL3 8FEI- WI FCA8- WA IT 92E5- WCM .0 I =92F5, . 02=92F7,
.03=9300 92E4- WCMFLG 91Fl- WISI ,02=9IFC, .03=9211 921F- WIS2
9222- WIS3 .0 I =922C, .02=9236, .03=9240 9245- WIS5 9250- WIS6
92D3- WISCOM 9266- WISLF 9298- WISNUM 91D3- WISSEN 927E- WLF
.01=9297 9299- WLFI 927D- WLFFL6 9280- WLN .01=9288 92DO- WLNI
92C9- WLN2 92C8- WLN3 92AF- WLNFLG 0020- WORDL 8FE8- XI 9063- XFl
906E- XNI 0093- XOFF 0091- XON 9038- ZI
-34-
R6551
DESCRIPTION The Rockwell A6551 Asynct'r"onous CommuniCaliorls
Interface Adapter (ACtA) provides an easily implemented. program
COl
trolled interface between a-bit microprocessor-based systems and
serial communication data sets and modems.
The ACtA has an Internal baud rale generator. ThiS feature elim
inates the need lor mulllple component support CIrCUIts, a cryslal
being the only other part required. The Transmitter baud rate can
be selected under program control 10 be either 1 01 15 dif ferent
rates from 50 to 19.200 baud. or al'h61imes an external clock rale.
The ReceIver baud rate may be selected under pro gram control to
be either the Transmitter rate. or at '1'6 limes the external clock
rate. The ACtA has programmable word lengths of 5. 6, 7, or 8 bits:
even, odd, or no parity: 1, 1 Vl. or 2 stop bits.
The ACtA is designed lor maximum programmed control from the
microprocessor (MPU), to simplify hardware implementa tion. Three
separate registers permit the MPU to easily select the R655"s
operating modes and data Checking parameters and determine
operaticrlal status.
The Command Register controls parity. receiWH echo mode,
transmitter interrupt control, the state 01 the Ri"S line, receiver
Interrupt control, and the stale of the DTR line.
The Control Register controls the number of stop bits. word length,
receiver clock source, and baud rate
The Status Register IndICates the states of the IRQ. DSR, and DCD
lines. Transmlner and Receiver Data Registers. and Overrun.
Framing, and Parity Error conditIOns
The Transmitter and Receiver Data Registers are used lor tem
porary dala storage by the ACIA Transmit and Receiver
Circuits.
ORDERING INFORMATION
Temperature Range (T L to T ... ): Blank .. O"C to + nrc
E .. -4O"C to "'"85'C
Package. C = CeramIC P = Plastic
DocwnemNo. ~IN90
• Full duplex operation with buffered receiver and
transmitter
• Data set/modem oontrol functions
• Internal baud rate generator with 15 programmable baud rales (50
to 19,200)
• Program-selectable internally or extemally controlled receiver
rate
• Programmable word lengths, number of stop bils, and parity bit
generation and detection
• Programmable interrupt control
• Two chip selects • 2 or 1 MHz operation
• 5.0 Vdc =. 5°'0 supply requirements
• 28-pin plastic or ceramic DIP
• Full TTL compatibility
IIE§ • 2. 07
R,c • 24 DO
>CTU • 23 DI
Flgunt 1. R8551 ACiA PIn ConfIgurdon
Product o-tIplion 0nI0r No. 214 Aev.2._ t ....
-35-
Fagure 2. ACIA Internal OrganlHtlon
FUNCTIONAL DESCRIPTION " block diagram of the ACIA is presented in
Figure 2 follOwed I:ly a description 01 each furctional element of
the device.
DATA BUS BUFFERS
n. Dala Bus Buffer interfaces the system data Unes to the ntemaI
data bus. The Data Bus Buffer is bi-directional. When It'e PJW line
is high and the c~ is selected, the Data Bus Buffer passes the data
from the system data Unes to the ACIA internal IjQ bus. When the
RiW line is low and the chip is selected, the Data Bus Buffer
writes the data from the internal data bus to the system dala
bus.
NTERRUPT LOGIC
The Interrupllogir; will cause the IRQ hne to the microprocessor to
go Ic.w when conditions are met that require the attention 01 lhe
microprocessor. The conditions which can cause an inter rupt w~1
set bit 7 and the appropriate bit 01 bits 3 through 6 in !he Status
Register, if enabled. Bits 5 and 6 correspond to the Data carrier
Detect (OeD) logic and the Data Set Ready (DSR) lOgIC. Bits 3 and 4
correspond to the Receiver Data Register full hi the Transmitter
Data Register empty conditions. These con cMions can cause an
interrupt request if enabled by the Com mand Register.
VOCONTROL
The va Control Logic controls the se~tion of intemal registers 1'1
preparation for a data transfer on the internal data bus and Ihe
direction of the transfer to or from the register.
The registers are selected by the Receiver Select (RSt, RSO) and
ReaG-'Write (AIW) lines as described later in Table 1.
TIMING ANa CONTROL
The Timing and Control logic controls the liming 01 data trans
fers on the internal data bus and the registers. the Data Bus
Burter, and the microprocessor data bus, and the hardware reset
features.
TIming is controlled by the system ~2 clock input. The Chip will
perform data transfers to or from the microcomputer data bus dunng
the;2 high period when selected.
All registers will be initialized by the Timing and Control logic
when the Reset (RES) line goes low. See the individual register
description for the state 01 the registers following a hardware
reset.
TRANSMITTER AND RECEIVER DATA REGISTERS
These registers are used as lempOfClIY data storage lor the ACIA
Transmit and Receive Circuits. Both the Transmitter and Receiver
are selected by a Register Select 0 (RSO) and Register Select 1
(RS1) low condition. The Read/Write (WW) line deter mines which
actually uses the internal data bus; the Transmitter Data Register
is write only and the Receiver Data Register is read only.
Bit 0 is the first bit to be transmitted from the Transmitter Data
Register (least signifICant bit first). The higher order bits
follow in oreler. Unused bits in this register are "don't
care".
The Receiver Data Register hOlds the first received data bit in bit
0 (least significant bit first). Unused high-order bits are "0".
Parity bits are not contained in the Receiver Data Register. They
are stripped off alter being used for parity checking.
-36-
STATUS REGISTER
The Status Register indicates the slate of interrupt condillons and
other non-Interrupt status lines. The Interrupt conditions are the
Data Set Ready, Data Carner Detect. Transmitter Data Reg Ister
Empty and ReceIVer oala Register Full as reported in bits 6 through
3, respectively. If any of these bits are set. the Inter rupt
(IRQ) indicator (bl' 7) IS also set. Overrun. Framing Error. and
Panty Error are also reported (bits 2 through 0
respectively).
7 • 5 • , 2
Bit 7 Interrupt (IRQ) 0 No interrupt
Interrupt has occurred
Bit 6 Data Set Ready (OSA) 0 BSR low (ready)
r::rnJt high (not ready)
Bit 5 Data Carrier Detect (oCD) 0 ocn low (detected)
DCO high (not detected)
Empty
Full
Overrun has occurred .. , Framing Error' 0 No framtng error
Framing error defected
Parity error detected
Reset tnitlaUzation
o
PO
Parity Error (Bit 0). Framing Error (Bit 1). and Overrun (2)
None of these bits causes a processor interrupt to occur. but they
are normally checked at the time the Receiver Data Aeg ister is
read so that the validity of the data can be verified. These bits
are self clearing (I.e., they are automatically cleared after a
read of the Receiver Data Register).
Receiver Data Register Full (Bit 3)
This bit goes to a 1 when the ACtA transfers data from the Receiver
Shift Register to the Receiver Data Register, and goes to a 0 (is
cleared) when the processor reads the Receiver Data Register.
Transmitter Data Register Empty (Btl 4)
ThiS bit goes to a 1 when the ACtA transfers data from the
Transrmtter Data Register to the Transmitter Shift Register, and
goes to a 0 (IS cleared) when the processor writes new data onto
the Transmitter Data Register.
Data Carrier Deleet (B" 5) and Data Set Ready (B" 6) These bits
reflect the levels of the DCD and DSR inputs to the ACIA. A 0
indicates a low level (true condition) and a 1 indica!es a hlQh
level (false). Whenever either of these inputs change state, an
immediate processor interrupt (IAQ) occurs, unless bit 1 of the
Command Register (lAD) is set to a 1 to disable IRO. When the
interrupt occurs, the status bits indicate the lewis of the Inputs
immediately after the change of state occurred. Sub sequent level
changes will not affect the status bits until the Status RegISter
is interrogated by the proceSSOf. At that time. another interrupt
will immediately occur and the status t::cts reflect the new input
levels. These bits are not automatically cleared (or reset) by an
intemal operation.
Interrupt (BH 7)
ThiS bit goes to a 1 whenever an interrupt condition occurs and
goes to a 0 (is cleared) when the Status Register is react
-37-
CONTROL REGISTER
... Control Register selects the desired baud rale, frequency
I£U'OI. word length, and the number of stop bits.
.. 7 o
Bill 8-5
.... ,..
.! 1- 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0
• • 3 2
Stop Bh Number (SBN) 1 Stop bit 2 Stop bits 11;: Stop bits For Wl
'" 5 and no parity 1 Stop bit For WL '" a and parity
Word Length (WL) No. Bits
B 7 6 5
Receive' Clock Source (ReS) External receiver clock Baud rale _led
Baud Rote (SBR)
1. o Baud 0 o tax Extemal Clock 0 1 50
0 75 1 1 109.92 0 0 134.58 0 1 150
0 300 1 1 600 0 0 1200 0 1 1 BOO 1 0 2400 1 1 3600 0 0 4800 0
7200
U 9600 19,200
Program reMt
Selected Baud Rate (Bits 0, 1, 2, 3)
These bits select the Transmitter baud rate, which can be at 1/'6
an external clock rate or one of 15 other rates controlled by the
internal baud rate generator.
If the Receiver clock uses the same baud rate as the transmitter,
then Axe becomes an output and can be ..Ised to slave other
circuits to the ACIA. Figure 3 shows the Transmitter and Receiver
layout.
~~~-rR'D
Receiver Clock Source (Btl 4)
This bit controls the clock source to the Receiver. A 0 causes the
Receiver to operate at a baud rate of iii, an external clock. A t
causes the Receiver 10 operate al the same baud nne as is selected
for the transmitter.
Word length (BHa 5, 6)
These bits determine the word length 10 be used (5. 6. 7 or 8
bits).
Stop BH Number (BH 7)
This bII determines the number 01 slop bits used. A 0 always
indicates one stop bit. A 1 indICates 1'h stop bits if the word
length is 5 with no parity selected, 1 stop bit if the word length
is 8 with parity selected, or 2 stop bits in an other
configurations.
-38-
COMMAND REGISTER
Bits 7-6
o
Odd parity transmitted/received Even parity transmrtted/recelved
Mark parity bit transmitted Panty check disabled Space parity bit
transmitted Panty check disabled
ParHy Mode Enabled (PME) Parity mode disabled No parity bit
generated Parity check disabled Parity mode enabled
Receiver Echo Mode (REM) Recei .... er normal mode Recel .... er
echo mode bits 2 and 3 Must be zero for rece ..... er echo mode.
ATS will be low.
Transmitter Interrupt Control (TIC)
RTS '" High. transmit Interrupt disabled RTS = Low. transmit
interrupt enabled RTS = Low. transrnlt Interrupt disabled ATS =
Low. transmit Interrupt disabled
transmit break on TxD
Interrupt Reque.t Disabled (IRD) IRQ enabled IRQ disabled
BU 0 Data Terminal Ready (D..!!!!. o Data termma! not ready (OTA
high)
Data terminal ready (OTR low)
Reset Initialization
Data Terminal Ready (Bit 0)
ThIS bit enables all selected Interrupts and controls the state of
the Data Terminal Ready (Om) line. A 0 indicates the micro
computer system is not ready by setting the OTA line high. A 1
indicates the microcomputer system is ready by setting the DTA line
low.
Receiver Interrupt Control (Bh 1)
This bit disables the Receiver from generating an interrupt when
set 10 a ,. The Receiver interrupt is enabled when this bit is set
to aO and BitOiS set to a 1.
Transmitter Interrupt Control (Blta 2, 3)
These bits control the state of the Ready to Send (RTS) line- and
the Transmitter interrupt.
Receiver Echo Mode (Bn 4)
A 1 enables the Receiver Echo Mode and a 0 enables the Receiver
Echo Mode. When bit 4 is a 1, bits 2 and 3 must be O. In the
Receiver Echo Mode, the Transmitter returns each transmissicn
received by the Receiver delayed by one-haH bit time.
Parity Mode Enable (Bn 5)
This bit enables parity bit generation and checking. A 0 disables
parity bit generation by the Transmitter and parity bit chectl:ing
by the Receiver. A 1 bit enables generation and checking of parity
bits.
Parity Mode Control (Bna 8, 7)
These bits determine !he type of parity generated by the Trans
miner, (even, odd, mark or space) and the type of parity check done
by the Receiver (even. odd, or no check).
-39-
A8551 Asynchronous Communications Intarface Adapter (ACIA)
INTERFACE SIGNALS Ftg\n 4 stows the ACtA interlace signals
associated with the IftCfOPtOC8SSOF and the modem.
I=A I ........ iii I~MUPTI
"" EJ OM ... ... .. , ~ I~'MXI ... 1:=t":1
"" ... 1:=.1
WCROPROCESSORINTERFACE
.oO
DlKlIlg system initialization a Iowan the RES input causes a
"IartIwar9 reset to occur, Upon reset, the Command Register l.'lCI
the Control Register are cleared (all bits set to 0)_ The Slatus
Reg~N is cleared with the exception of the indications o! Data Set
Ready_!l.nd Oma Carrier Detect, whi::h are externally controlled by
the ~ and i5Ct5lifles, and the transmitter Empty 0It whICh is set.
~ must be held low for one 12 clock cycle b a reset k>
occur.
Input Clock (f2) fhe IIlPYI clock is the system ~2 clock and clOcks
all data trans Itrs between the system microprocessor and the
ACtA.
AeodlWrlta IR,w) T~ fl.'\\! Input, generated by the microproceSSOf
controls the 00rec11On 01 data lransfers. A high on the AlW pin
allows the :lIOCelSOr to read the data supplied by the ACtA. a low
allows a "TIle 10 the ACtA.
Interrupt Roqueot QRQ)
The ~ pin is an interrupt output from the interrupt control logic.
It -IS an open drain output, permitting several devices to be con
nected to the common m microprocessor input, Normally a high level,
IRQ goes low when an interrupt occurs.
Dot. BUI (DO-07)
The eight data line (00-07) pins transfer data between the pro
cessor and the ACtA. These lines are bi-direclional and are nor
mally high-impedance except during Read cycles when the ACIA is
selected .
Chip Selocte (CSO, f!i)
The two Chip select inputs are nonnally connected to the pro
cessor address lines either difectly or through decoders_ The ACIA
is selected when csa is high and ~ is low. When the ACtA is
selected, the internal registers are addressed in accor dance with
the register select lines (R$O, AS1).
Regl .... SelOCIl (RSO, RS1)
The two register selecl lines are normally connected to the
pr0-
cessor address lines 10 allow the proceSSOl" to select the various
ACIA internal registers. Table 1 shows the internal register select
coding.
Tlble 1 ACIA Regl .... SetectIon
RegIst8r 0I*"1Itton IISI AS. R/W = Low RIW=HIg.
L L Write Transmil Data Read Aeoei'¥ef Reg"'" Data Register
L H Programmed Reset Read Status (Data is "Don't -care")
H L Write Command Read Command Register -,
H H Write Control Read Control Reg- -
Only the Command and Control registers can both be read and
written. The programmed Reset operation does not cause any dala
transfer, but is used to clear bits 4 through 0 in the Com mand
register and bit 2 in the Status Register, The Control Reg ister
is unchanged by a programmed Reset, n srould be noted that the
PfQ9rammed Reset is lUightly differenl from the hard ware Reset
(m); refer to th8 register description.
-40-
ACIAIMOOEM INTERFACE
Crystal Pins (XTLI, XTLO)
These pins are normally directly connected to the external crystal
(1.8432 MHz) to denve the various baud rates. Alter natively. an
externally generated clock can dnve the XTU pin. in whICh case 1he
XTLO pin must Iloal. XTU is the input pin for the transmit
clock.
Tran!NTIit Data (TxO)
The TxD output line translers serial nonreturn-to-Zero (NRZ) data
to the modem. The least signifICant bit (lSB) of the Transmit Data
Register IS the first data bll transmitted and the rate of data
transmisSion is determined by the baud rate selected or under
control of an external clock. This selectIOn IS made by program
ming the Control Register.
Receive Data (RxD)
The AxD Input line transfers senal NRZ data Into the ACtA from the
modem. lSB IlfSI. The receiver data rate IS either the pro grammed
baud rate or under the contrOl of an externally gen erated
receiver clock. The selectIOn IS made by programming the Control
Register.
Receive Clock (RxC)
The R:o:C IS a bl-dlrectlOnal prn which is erther the receiver
16:0: clock Input or the receiver 16x clack output. The latter mode
results " the Internal baud rate generator IS selected for receiver
data clocking.
Request to Send (RTS)
The R'rn output pin controls the modem from the processor. The
state 01 the ATS pin IS determined by the contents of the Command
Register.
Cle.r to Send (CTS)
The CTS input pin controls the transmitter operatIOn. The enable
state is with CfS low. The transmitter is automatically disabled if
CTS is hIgh.
O.to Tormlnal Ready (DfII)
ThIS output pin indicates the status of the ACtA to the modem. A
low on 5TA indICates the ACIA is enabled, a high indicates it is
disabled. The processor controls this pin via bit 0 of the Command
Register.
Dahl Set Ready (~)
The DSA input pin indicates to the ACIA the status 01 the modem. A
low indicates the "ready" state and a high, "not ready."
o.t. C .... 1er Dstect (i5ClI)
The DeD mput pin indICates to the ACtA the status of the carrler
detect output 01 the modem. A low indicates that the modem carner
SlQnal is present and a high, thai it is not.
TRANSMITTER AND RECEIVER OPERATION
Continuous Data Tranamlt
In the normal operating mode, the interrupt request output (IRO)
Signals when the ACtA is ready to accept the next data word 10 be
transmitted. This interruPt occurs at the beginning of the Start
Bit. When the processor reads the Status Register of the ACtA. the
interrupt is cleared.
The processor must then identify that the Transmit Data Reg Ister
is ready to be loaded and must then load it with the next data
word. This must occur before the end of the Stop Bit, other wise a
continuous "MARK" will be transmitted. Figure 5 shows the
contrnuous Data Transmit timing relationship.
CH""U.~+l
Llll l
ContinuOUS Oat. Receive
$lmrlar to the Continuous Data Tra~if case, the normal OOIIratiol'1
01 this mode is to assert IRQ when the ACtA has -ecerved a full
data word. This occurs al about 9/1$ point through !I'e StoP Bit.
The processor must read the Status Aegister and
read the data word before thB next interrupt, oth&rw'lse the
Overrun condition occurs. Figure 6 shows the continuous Oal8
Receive Timing Relationship.
Flgur.8. Continuous Oat_ Receive
Tr.nllTllt Data Register Not Loaded by Processor
~ the processor is unable to load the Transmit Data Register in
,...., allocated lime, then the TxD line goes to the "MARK" con
,j~oon unlillhe data is loaded. IRQ interrupts continue to occur at
the same rale as previOusly, except no data is transmitted.
I
"'AOS STATUS "'(!;IITE"
IPH(AAUf'TS CO",TI",UE AT CHAIIACT!A A ... U. EVIN THOUGH ",0 OA'A
IS '"ANIIoIITtUI
When the processor finally loads new data, a Start Bit 1mr1"18-
diately occurs, the data word transmission is started, and another
interrupt is initiated, signaling tor the next data word. Ftgure 7
shows the timing relationship tor this mode of operation.
\ wonN PAOCESSOA fIN ... LL V lO ... DS "'EW O ... t ....
TAANSM1SSIO"'ST"'ATS MMIOIAT!lY "",0 IHTEAAU'T OCCUIIS.
IIOfOIC"TING TRANSMIT O"T"" AEG,STU, EMPTY
Agure 7. r,.namtt Data. Register Not Loaded by Proceuor
Eindhoven University of Technology Research Reports ~artment of
Electrical En9inee~
ISSN 0167-9708 Coden: TEUEDE
(138) NLcola, V.F. ~NGLE SERVER QUEUE WITH MIXED TYPES OF
INTERRUPTIONS: Application to the modelling of checkpointing and
recovery in a transactional system. EUT Report 83-E-138. 1983. ISBN
90-6144-138-2
(139) Arts, J.G.A. and W.F.H. Merck TWO-DIMENSIONAL MHO BOUNDARY
LAYERS IN ARGON-CESIUM PLASMAS. EUT Report 83-E-139. 1983. ISBN
90-6144-139-0
(140) Willems, F.M.J. COMPUTATION OF THE WYNER-ZIV RATE-DISTORTION
FUNCTION. EUT Report 83-E-140. 1983. ISBN 90-6144-140-4
(141) Heuvel, W.M.C. van den and J.E. Daalder, M.J.H. Boone, L.A.H.
Wilmes INTERRUPTION OF A DRY-TYPE TRANSFORMER IN NO-LOAD BY A
VACUUM CIRCUIT-BREAKER. EUT Report 83-E-141. 1983. ISBN
90-6144-141-2
(142) Fronczak, J. DATA COMMUNICATIONS IN THE MOBILE RADIO CRANNEL.
EUT Report 83-E-142. 1983. ISBN 90-6144-142-0
(143) Stevens, K.P.J. en M.P.M. van Loon BEN MULTlFUNCTIONELE
IjO-80UWSTEEN. EUT Report 84-E-143. 1984. ISBN 90-6144-143-9
(144) Diik, J. and A.P. Verlijsdonk, J.C. Arnbak DIGITAL
TRANSMISSION EXPERIMENTS WITH THE ORBITAL TEST SATELLITE. EUT
Report 84-E-144. 1984. ISBN 90-6144-144-7
(145) ~, M.J.H. van MINIMALISATIE VAN PROGRAMMABLE LOGIC ARRAYS.
tOT Report 84-E-145. 19B4. ISBN 90-6144-145-5
(146) ~, J.C. en P.M.C.M. van den Eijnden TOESTAND-TOEWIJZING IN
SEQUENTltLE CIRCUITS. BUT Report 85-E-146. 1985. ISBN
90-6144-146-3
(147) Rozendaa1, L.T. en M.P.J. ~, P.M.C,M. van den Eijnden DE
REALISATIE VAN BEN MULTIFUNCTIONELE I/O-CONTROLLER MET BEHULP VAN
EEN GATE-ARRAY. EUT Report 85-E-147. 1985. ISBN 90-6144-147-1
(148) Eijnden, P.M.C.M. van den A COURSE ON FIELD PROGRAMMABLE
LOGIC. EUT Report 85-E-146. 1985. ISBN 90-6144-148-X
(149) Beeckman, P.A. MILLIMETER-WAVE ANTENNA MEASUREMENTS WITH THE
HP8510 NETWORK ANALYZER. EUT Report 85-E-149. 1985. ISBN
90-6144-149-8
(150) Meer, A.C.P. van EXAMENRESULTATEN IN CONTEXT MBA. EUT Report
65-E-150. 1985. ISBN 90-6144-150-1
(151) S. and W.H.C. van den Heuve1 CURRENT INTERRUPTION I~W-VOLTAGE
FUSE WITH ABLATING WALLS.
EUT Report 85-E-151. 1985. ISBN 90-6144-151-X
(152) Stefanov, B. and L. Zarkova, A. Veefkind DEVIATION FROM LOCAL
THERMODYNAMIC EQUILIBRIUM IN A CESIUM-SEEDED ARGON PLASMA. EUT
Report 85-E-152. 1985. ISBN 90-6144-152-8
(153) Hof, P.M.J. Van den and P.H.M. JanSsen SO-ME ASYMPTOTIC
PROPERTIES OF HULTIVARIABLE MODELS IDENTIFIED BY EQUATION ERROR
TECHNIQUES. EUT Report 85-E-153. 1985. ISBN 90-6144-153-6
(154) Geer1ings, J.H.T. LIMIT CYCLES IN DIGITAL FILTERS: A
bibliography 1975-1984. EUT Report 85-E-154. 1985. ISBN
90-6144-154-4
(155) Groot, J.F.G. de THE INFLUENCE OF A HIGH-INDEX MICRO-LENS IN
A LASER-TAPER COUPLING. EUT Report 85-E-155. 1985. ISBN
90-6144-155-2
(156) Ame1sfort, A.M.J. van and Th. Scharten A THEORETICAL STUDY OF
THE ELECTROMAGNETIC FIELD XN A LIMB, EXCITED BY ARTIFICIAL SOURCES.
EUT Report 86-£-156. 1986. ISBN 90-6144-156-0
(157) Lodder, A. and H.T. van Stiphout, J.T.J. van Eijndhoven
ESCHER: Eindhoven SCHematic EditoR reference manual. EUT Report
86-E-157. 1986. ISBN 90-6144-157-9
(158) Arnbak, J.C. DEVELOPMENT OF TRANSMISSION FACILITIES ~OR
ELECTRONIC MEDIA IN THE NETHERLANDS. EUT Report 86-E-158. 1986.
ISBN 90-6144-158-7
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