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Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

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Page 1: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Towards a final design of LAV front-end

Towards a final design of LAV front-end

M. Raggi, T. Spadaro, P. Valente&

G. Corradi, C. Paglia, D. Tagnani

Page 2: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Front-end board (single channel)Front-end board (single channel)

Page 3: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Front-end board prototypeFront-end board prototype

Prototype board

• 16 channels• VME 6U mechanics• Manual threshold control • 4 by 4 channels threshold• Single channel analog output• Successfully tested at NA62 beam-test (Oct. 2009)

Page 4: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Front-end board (scheme)Front-end board (scheme)

Pre-amplifier stageDual thr. Discriminator & shaper

LVDS driver

CPU

Threshold control

Supply control± 5 V± 12 V

CANOpen

LVDS out

LVDS out

Analog sum out

Analog sum

Powersupply

Anal

og in

Test pulse

Trigger in

Final board

• 32 channels• VME 9U mechanics• Include services:

• Analog sums• Remote threshold• Individual channel threshold control• Pulsing system

DACADC

Page 5: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Analog sum architectureAnalog sum architecture

sum of 4

sum of 16

sum of 4

sum of 4

sum of 4

Sum scheme

• 4 channels x eight section

• 1 Sum output x 16 channels

• All analog outputs are buffered and 50Ω matched• Dynamic range 2V with clamp circuit

Page 6: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

• 32 analog inputs from flangeDB37 connector

Board connectionsBoard connections

• 8 Analog sums of 4 channels• 2 Analog sums of 16 channels10× Lemo-00 on front panel

• 1 Rj11 connector for communication CAN-OPEN

• 64 LVDS outputs to TDC2× Robinson-Nugent (1.27 mm)

Page 7: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Analog sum outputAnalog sum output• One FEE boards serves 32 channels = 1 layer• 32×2 thresholds = 64 LVDS outputs• 32 analog outputs can not be housed in the board:

(there isn’t place on the panel)• sum 4 analog signals (e.g. one “banana”)• sum 4 bananas (16 channels = half a layer)• Coax 50 , Lemo-00

sum 4sum 4

sum 4 Su

sum 16

16Ch

4Ch

4Ch 4Ch

4Ch

Page 8: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Threshold circuitThreshold circuit

• Two thresholds per channel• Remotely programmable (CANOpen)• Common threshold with trimmer (for redundancy, jumper-selectable)

• 0-500 mV range, 12 bit resolution (standard low-cost components, more than enough)

• 2 LSB stability• Easy to implement automatic threshold scan

Page 9: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Front-end diagnosticsFront-end diagnostics• Provide a test pulse:

• free-running (controlled by local CPU)• or on external trigger

• pulse all channels• or a programmable pattern

• 10-50 ns programmable width• 10-500 mV programmable amplitude• Useful to check time-over-threshold performance• Ensure width and amplitude stability at 1% level

• monitoring of the voltage • monitoring of the board temperature

Page 10: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Something like this…Something like this…

•VME 9U example

• Main board with 32 daughter cards plug on

Analog input

Analog Sum OUTPUTs

Digital OUTLVDS

Page 11: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

LAV VME 9U custom crate

5-8 FEE boards TE

LL1

11

In fromdetector

Out to TELL1

HV

Con

trol

Power

Sup

ply

LED controllers

FAN

Volt d.3.3V d. +5V d. -5V a. +5 a. -5 d.+48 PW

1 Tell1 10A 0.5A 0.5A 0.5A 0.8A 80

8 FEE 1A 1A 4.0A 4.0A 400

8 LED 1.2A 1.2A 1.5A 1.5A 24V/0.3A

275

9U

3U PWmax=800W

Page 12: Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani

Conclusion

• Beginning of final project : next week• Estimated time for the design and the realization of the first

prototype: about 3 months • Moreover, it will take about 2 months to write the protocol of

communication CAN-OPEN • Cost for board : 3000€ (VAT not included)