Upload
oakes
View
36
Download
3
Embed Size (px)
DESCRIPTION
TS-DEM Development of Electronic Modules Group. Erik van der Bij CERN. Agenda. Services and organisation of TS-DEM Organisation of files in EDMS (AB/PO) Reliability engineering. MANDATE Turn schematics into boards (standard + special). PCB design Manufacture of special circuits and PCBs - PowerPoint PPT Presentation
Citation preview
CERN TS -DEM
CERN
Erik van der Bij
TS-DEM
Development of Electronic ModulesGroup
TS-DEM
Development of Electronic ModulesGroup
Erik van der Bij
CERN
CERN TS -DEM
CERN
Erik van der Bij
AgendaAgenda
Services and organisation of TS-DEM
• Organisation of files in EDMS (AB/PO)
• Reliability engineering
CERN TS -DEM
CERN
Erik van der Bij
MANDATETurn schematics
into boards (standard + special)
MANDATETurn schematics
into boards (standard + special)
• PCB design
• Manufacture of special circuits and PCBs
• Assembly
Examples of ‘standard’ work
Examples of ‘standard’ work
Circuit Manufacturing
DEM-PMT
Industry
Circuit or moduleRequest
TS-DEM TS-DEM
Subcontractingordering, collecting components, tracking
Design Office
DEM-BE
Assembly Workshop
DEM-WS
Planning Officetechnological and commercial choices
invoicing DEM-BE
DEM-BE
CERN TS -DEM
CERN
Erik van der Bij
BE – Design officeBetty Magnin
BE – Design officeBetty Magnin
• Layout of PCB, flexible circuit, hybrid or fine-pitch detectors
• Design of associated small mechanics (front-panels, crates)
• Creation of schematic and padstack symbols – Cadence and PCAD/Altium libraries
• Storage of manufacturing files – PCB production, assembly, bill of material all in EDMS (EDA-xxxxx)
• Organisation of production and assembly– prototype quantities: in-house or local industry
– larger quantities: European industry
• Component purchasing service (new!)• Technical advice on manufacturing
Easy wayto savetime!
Easy wayto savetime!
Example of mechanicsExample of mechanics
CERN TS -DEM
CERN
Erik van der Bij
PMT – FabricationRui de Oliveira
PMT – FabricationRui de Oliveira
• Special circuits– flex-rigid boards – multi-layer boards with integrated metal or pyrolytic carbon– high-definition circuits (traces and isolation 5 to 10 μm)
• Thick-film hybrids – seriegraphy of conducting paste on ceramic substrates
(aluminium, aluminium nitride, berillyumoxide)
• Chemical treatment – thin metal sheets (copper, inox, nickel, aluminium, titanium)
• Standard printed circuit boards (halogen free!)– single side to multi-layer boards (upto 14 layers, class 6) – flexible circuits (kapton)
• Technical advice on material selection and processes
TransferImage
TransferImage
CERN TS -DEM
CERN
Erik van der BijPercagePercage
CERN TS -DEM
CERN
Erik van der Bij
Electrical testElectrical test
CERN TS -DEM
CERN
Erik van der Bij
WS – Assembly workshopBetty Magnin
WS – Assembly workshopBetty Magnin
• Mounting of components – through-hole
– BGA downto 0.8 mm pitch
– resistors and capacitors downto 0201 size
• Replacing of components, including BGA
• Production of cables (coax, flatcables, twisted pair)
• Wiring of crates
• 30-minute express service for small interventions
• Cleaning of boards
• Technical advice – component selection and manufacturing
CERN TS -DEM
CERN
Erik van der Bij
Condensation ovenCondensation oven
CERN TS -DEM
CERN
Erik van der Bij
Cleaning of circuitsCleaning of circuits
Before cleaning
After cleaning
CERN TS -DEM
CERN
Erik van der Bij
Turn-around time
Turn-around time Prototype electronics production
multi-layer PCB, standard priority
• This time can be reduced if necessary!
• PCB fabrication can handle 2 urgencies per week
– e.g. double sided PCB in 1 day, single sided 0.5 day
• Replacement of component: 30 minute service
Queue
2-3 weeks
Layout
1-2 weeks
Layout (and queue)
4 weeks
PCB fabrication
3 weeks
Assembly
2 weeks
Margin
1 week
CERN TS -DEM
CERN
Erik van der Bij
PCB Delivery timesPCB Delivery times
TypeUrgent[days]
Standard[days]
Single sided 1
Double sided with metallised vias 1 5
4 and 6 layer with metallised vias 3 or 6 10
> 8 layers with metallised vias 3 or 6 15
• Fast track PCB layout (since July 2007):
• Small jobs (estimated ≤ 2 days) will be started immediately or on next day
CERN TS -DEM
CERN
Erik van der Bij
• Layout and PCBs needed ASAP
• Received request 7 March 2007
• Same day layout finished!
• 4 PCBs ready on Friday 9 March,rest on Monday after
• Assembled 1 PCB on Friday 9 in evening,second finished on the 12th.
Example:Urgent full project for PH
Example:Urgent full project for PH
CERN TS -DEM
CERN
Erik van der Bij
Example:Urgent project for AB/CO
Example:Urgent project for AB/CO
• Layout ready: three different PCBs needed ASAP
• Needed really fast:– no solder maks or silkscreen finish needed
• Design files given Friday 30 March 7:00
• PCBs ready same day at 15:00!
• Could have assembled connectors if needed
• Two weeks later tests finished, production of series requested
CERN TS -DEM
CERN
Erik van der Bij
ConclusionsConclusions
• DEM provides you a turn-key solution
– from your schematics to assembled boards
– all services close to the engineers
– production in small to medium quantities
– advice on manufacturing (material, components, processes)
• DEM has contracts with industry
– local industry for prototyping
– in other CERN member states for medium scale production
• The service can save you a lot of time and cost
CERN TS -DEM
CERN
Erik van der Bij
DEM on the web
DEM on the web
http://cern.ch/demhttp://cern.ch/dem
DEMon
the web!
DEMon
the web!
CERN TS -DEM
CERN
Erik van der Bij
PCAD to Altium
PCAD to Altium• PCAD stops support after 2006
– With ELEC committee IT decided to move to Altium
– Altium can read PCAD schematics and PCB layout
– Altium is a bit more difficult to use (notably PCB layout)
– Presentation on Tuesday 10/7 (amphi bld. 30, 8:30-12:15)
– Two day courses will be given from September on
– Pilot course in July
CERN TS -DEM
CERN
Erik van der Bij
Storage of design filesin EDMS
Storage of design filesin EDMS
Files stored in EDMS since 2002
http://edms.cern.ch/nav/eda-xxxxx
BE: Schematics, PCB design & production, BOM & assembly files, mechanics
User: specification, images, supplier info
• Handling of 'executions' since 2006project with AB/PO
Selon convention signée par AB-PO et TS-DEM (Document EDMS 801714 v1)
1 carte: HCRBSxxxxx = EDA-yyyyy-Vx-xUn dossier de fabrication unique
GEREGHCREHAR002
Code de fabrication TS-DEM: EDA-xxxxx-Vx-xCode d’exploitation AB-PO : HCRBSxxxxx
Enregistrement des cartes fabriquées par TS/DEM
Christophe Mugnier :Présentation du 16 Juin 2006
Dossiers de fabrication TS/DEM
Christophe Mugnier :Présentation du 16 Juin 2006
Dossiers de fabrication TS/DEM - Identification d'une carte
La sérigraphie de la face avant :Elle comporte le code EDA et la désignation de la carte.
Etiquette apposée par l’assembleur sur le connecteur dans le cas d’une exécution.
La sérigraphie du print: Elle comporte le code EDA+la version et la désignation de la carte.
Dossiers de fabrication TS/DEM - Identification d'un chassis
La sérigraphie de la face avant :Elle comporte le code EDA et la désignation du chassis.
Etiquette apposée par l’assembleur pour spécifier la version.
Dossiers de fabrication TS/DEM - Example en EDMS
Example:http://edms.cern.ch/nav/eda-01586
CERN TS -DEM
CERN
Erik van der Bij
Reliability engineeringReliability engineering
In development phase: qualitative strategy– Find weak points fast - whatever it takes
• Accelerated testing: quantative strategy– get idea of final reliability
– concepts (without acceleration) also valid to get data for our installed base
Ideas from Hobbs Engineering course "Demonstrating Reliability Requirements with Accelerated Testing" and book "Accelerated Reliability Engineering - HALT and HASS"
http://hobbsengr.com, see also http://weibull.com
CERN TS -DEM
CERN
Erik van der Bij
Stress-Strength "Non-interference"
Stress-Strength "Non-interference"
CERN TS -DEM
CERN
Erik van der Bij
Qualitative strategy
Qualitative strategy
CERN TS -DEM
CERN
Erik van der Bij
Effect of qualitative testing
Effect of qualitative testing
CERN TS -DEM
CERN
Erik van der Bij
HALT
HALT
CERN TS -DEM
CERN
Erik van der Bij
PDF to CDF
PDF to CDF
Pro
bab
ilit
y
Time Time
Un
reli
abil
ity
Un
reli
abil
ity
Time
CERN TS -DEM
CERN
Erik van der Bij
Weibull function handles all shapes
Weibull function handles all shapes
CERN TS -DEM
CERN
Erik van der Bij
Paperclip example
Paperclip example
CERN TS -DEM
CERN
Erik van der Bij
Calibrated Accelerated Lifetime Test
Calibrated Accelerated Lifetime Test
CERN TS -DEM
CERN
Erik van der Bij
Example of Voltage CALT
Example of Voltage CALT
Car
ele
ctro
nics
12-
15 V
olt
CERN TS -DEM
CERN
Erik van der Bij
Example of Tcycle CALT
Example of Tcycle CALT
CERN TS -DEM
CERN
Erik van der Bij
Wiper graphWiper graph
CERN TS -DEM
CERN
Erik van der Bij
A serious test flow
A serious test flow
CERN TS -DEM
CERN
Erik van der Bij
ConclusionsConclusions
• Development
– have fun with your cards and 'burn' a few. You learn a lot!
– temperature, voltage, vibration, on/off cycles...
• Know (measure) the environment of your cards
– e.g. on-time, on/off cyles and temperature variations
– is needed to calibrate acceleration factors
• Measure precisely the on-time, on/off cycles etc of each card to know precisely when failed
– allows Weibull plotting and gives invaluable reliability data