24
NXP Semiconductors User’s Guide © 2016 NXP B.V. Document Number: KTTWRSB0800-36EVBUG Rev. 1.0, 7/2016 TWR-SB0800-36EVB tower system platform Figure 1. TWR-SB0800-36EVB

TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

  • Upload
    others

  • View
    6

  • Download
    0

Embed Size (px)

Citation preview

Page 1: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

NXP SemiconductorsUser’s Guide

© 2016 NXP B.V.

Document Number: KTTWRSB0800-36EVBUGRev. 1.0, 7/2016

TWR-SB0800-36EVB tower system platform

Figure 1. TWR-SB0800-36EVB

Page 2: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

TWR-SB0800-36EVB tower system platform, Rev. 1.0

2 NXP Semiconductors

Contents

1 Important notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Understanding the tower system modular development board platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Getting to know the hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Setting up the hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 Board layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198 Board bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2210 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Page 3: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Important notice

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 3

1 Important noticeNXP provides the enclosed product(s) under the following conditions:

This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality.

The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.

Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the date of delivery and will be replaced by a new kit.

NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typical”, must be validated for each customer application by customer’s technical experts.

NXP does not convey any license under its patent rights nor the rights of others. NXP products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the NXP product could create a situation where personal injury or death may occur.

Should the Buyer purchase or use NXP products for any such unintended or unauthorized application, the Buyer shall indemnify and hold NXP and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges NXP was negligent regarding the design or manufacture of the part. NXP™ and the NXP logo are trademarks of NXP Semiconductors. All other product or service names are the property of their respective owners. © 2016 NXP B.V.

Page 4: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting started

TWR-SB0800-36EVB tower system platform, Rev. 1.0

4 NXP Semiconductors

2 Getting started

2.1 Kit contents/packing listThe TWR-SB0800-36EVB contents include:

• TWR-SB0800-36EVB tower board• Plug-in connectors• Warranty card

2.2 Jump startNXP’s analog product development boards help to easily evaluate NXP products. These tools support analog mixed signal and power solutions including monolithic ICs using proven high-volume SMARTMOS mixed signal technology, and system-in-package devices utilizing power, SMARTMOS and MCU dies. NXP products enable longer battery life, smaller form factor, component count reduction, ease of design, lower system cost, and improved performance in powering state of the art systems.

• Go to www.nxp.com/TWR-SB0800-36EVB• Review your Tool Summary Page• Look for

• Download the documents, software and other resourcesOnce the files are downloaded, review the user guide in the bundle. The user guide includes setup instructions, BOM, and schematics. Jump start bundles are available on each tool summary page with the most relevant and current information. The information includes everything needed for design.

2.3 Required equipment and software To use this kit, you need:

• Power supply 6.0 V to 36 V with current limit set initially to 2.5 A to 9.0 A• Oscilloscope (preferably 4-channel) with current probe(s) • Digital multimeter• Typical loads: (DC motor, valve)• TWR-KL25Z48M, K20D72M, KV31F120M or other Tower boards (check compatibility)• Kinetis Design Studio or compatible CodeWarrior for MCUs (Eclipse IDE). For information on getting started with CodeWarrior,

see the MC34Valve Controller Processor Expert Component User Guide.

2.4 System requirementsThe kit requires the following to function properly with the software:

• USB-enabled PC with Windows® XP or higher

Jump Start Your Design

Page 5: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Understanding the tower system modular development board platform

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 5

3 Understanding the tower system modular development board platform

NXP’s Tower System peripheral module is designed to be combined and used with other Tower System modules. The Tower System is a modular development platform for 8-, 16-, and 32-bit MCUs and MPUs enabling advanced development through rapid prototyping. Featuring more than fifty development boards or modules, the Tower System provides designers with building blocks for entry-level to advanced MCU development. Figure 2 shows a Tower System platform with the TWR-SB0800-36EVB configured with another Tower System module, the TWR-KL25Z48M board.

Figure 2. TWR-SB0800-36EVB on tower system

TWR-SB0800-36EVB or TWR-SB0410-36EVB

Elevator Board(Secondary)

Elevator Board(Primary)

Tower MCU Board (TWR-KL25Z48M in this example)

Page 6: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Understanding the tower system modular development board platform

TWR-SB0800-36EVB tower system platform, Rev. 1.0

6 NXP Semiconductors

3.1 Block diagram

Figure 3. Block diagram

Note:

Warning lamp application is proposed as an example in Figure 3. The lamp is connected to the low-side driver (general purpose).

MC34SB0800

Octal Valves Controller

Primary Elevator

Secondary Elevator

MCU Tower Board Selection (Jumpers)

x4

Tower System Interface

GPIO & ADC input (x3)

SPI (single, daisy chain)

x2

Valves

War

ning

Lam

p

Motor

Power Supply 6.0 V to 36 V

Digital Supply 5.0 V

x4

Valv

es

Page 7: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 7

4 Getting to know the hardware

4.1 Board overviewThe TWR-SB0800-36EVB is a tower peripheral module that exercises valve control functions on SoC products based on the Tower System. The Tower System acts as a debug and communication port for the PC being used to debug/download programs from the Kinetis Design Studio/CodeWarrior system.

4.2 Board featuresThe board features are as follows:

• Valve controller with embedded safety features: MC34SB0800• Four current regulated valve driver outputs (maximum current: 2.25 A; maximum frequency 5.0 kHz)• Four PWM valve driver outputs (maximum current 5.0 A; maximum frequency 5.0 kHz)• High-side pre-driver Safe Switch• High-side pre-driver motor control (maximum frequency 500 Hz)• Embedded Safety Supervision• Simplified MCU connections• SPI daisy chain communication with other TWR-SB0800-36EVB or TWR-0410-36EVB boards (daisy chain mode jumper

selectable)• Single SPI communication support• On-board LED ON/OFF indicators for each high-side and low-side (general purpose) channel• Three 10-bit ADC inputs

4.3 Device featuresThis tower system features the following NXP product:

Table 1. Device features

Device Description Features

MC34SB0800 Octal Valve Controller System on Chip

Control features• Operating voltage up to 36 V

• Four low-side drivers regulate up to 2.25 A

• ± 2.0% precision reachable with calibration

• Four low-side drivers PWM up to 5 kHz with a maximum current capability up to 5.0 A

• Integrated low-side drivers to save PCB space

• ADC monitoring of external or internal signals to enhance the control unit safety level

• Single SPI device control

• MCU sent only when current or duty-cycle is targeted through the SPI

• MCU does not need to generate PWM signals at high frequency

Safety features• Safe MOSFET turns off valves and motor when problems occur

• Watchdog feature

• Under-voltage, over-voltage clock fail detection

• Open load, short circuit, over-temperature detection on each low side

• VDS monitoring of each low-side driver in real time

• Over-current and over-temperature detection on the high-side pre-driver

Page 8: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

8 NXP Semiconductors

4.4 Board description

Figure 4. Board overview

Table 2. Board description

Name Description

Reset switch Resets the MC34SB0800 device

Primary elevator Edge connector to primary elevator board (white stripe to white connector on elevator board)

Secondary Elevator Edge connector to secondary elevator board

Daisy chain/input PWM motor control Jumper block for selection of daisy chain or input PWM motor control

MC34SB0800 Octal Valve Controller System on Chip

Primary Elevator

(White Strip)

Secondary Elevator

MC34SB0800

Reset Switch

Jumper Block(Daisy Chain/Input PWM Motor Control

Selection)

Page 9: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 9

4.4.1 LED displayThe following LEDs are provided as visual output devices for the TWR-SB0800-36EVB:

Figure 5. LED locations

Table 3. LEDs

LED ID Description

D2 Indicates when the MC34SB0800 is in Reset or Safe /Normal Mode (Blinking = Reset Mode; ON = Safe/Normal Mode)

D14 Indicates when power is being supplied to the MC34SB0800

D17 Indicates when the low-side general purpose driver is in the ON state

D20 Indicates when 5.0 V is being supplied to the VCC5 input

D22 Indicates when the high-side general purpose driver is in the ON state

HD_G Not connected

PD_G Not connected

D2

D14 D20

D22

D17

HD_GPD_G

Page 10: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

10 NXP Semiconductors

4.4.2 Test point definitionsThe following tests point are provided for signal analysis of the MC34SB0800 device.

Figure 6. Test point locations

Table 4. Test points

Schematic label Description

TP1 DOSV (digital output) signal

TP2 DC motor gate driver signal

TP3 SPI/Chip Select signal

TP4 SPI clock signal

TP5 SPI MOSI signal

TP6 SPI MISO signal

TP7 ADN1 signal (10-bit ADC)

TP8 ADN2 signal (10-bit ADC)

TP9 ADN3 signal (10-bit ADC)

TP10 High-side pre-driver Safe Switch gate signal

TP11 VPWR signal

TP12 AGND signal

TP13 AGND signal

TP14 AGND signal

TP1TP2

TP14

TP3

TP4

TP5

TP11

TP13

TP9

TP8

TP7

TP12

TP2 TP10

Page 11: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 11

4.4.3 ConnectorsInput/output connectors provide the following signals:

Figure 7. Connector locations

Table 5. Connectors

Name Description

J2 VPWR - Power supply inputs for the MC34SB0800 (6.0 V to 36 V)

J2 AGND - Ground input for the MC34SB0800

J2 SB0800_HSD - High-side Safe Switch output for the MC34SB0800

J4 LSD1 - Regulated valve driver output 1 for the MC34SB0800 (2.25 A maximum, 5.0 kHz maximum)

J4 LSD2 - Regulated valve driver output 2 for the MC34SB0800 (2.25 A maximum, 5.0 kHz maximum)

J4 LSD3 - Regulated valve driver output 3 for the MC34SB0800 (2.25 A maximum, 5.0 kHz maximum)

J4 LSD4 - Regulated valve driver output 4 for the MC34SB0800 (2.25 A maximum, 5.0 kHz maximum)

J3VCC5 - 5.0 V external digital input to the MC34SB0800 (not required if J5, J10 and J11 select the 5.0 V tower supply)

J3 ADIN1 - 10-bit ADC input 1 to the MC34SB0800 (for safety and general purpose external monitoring)

J3 ADIN2 - 10-bit ADC input 2 to the MC34SB0800 (for safety and general purpose external monitoring)

J3 ADIN3 - 10-bit ADC input 3 to the MC34SB0800 (for safety and general purpose external monitoring)

J6 LSD5 - PWM valve driver output 5 for the MC34SB0800 (5.0 A maximum; 5.0 kHz maximum)

J2

VPWR

AGND

SB0800_HSD

J4LSD3

LSD4

LSD1

LSD2

J1Motor -

Motor +

ADN2

ADN3

VCC5

ADN1J3

LSD7

LSD8

LSD5

LSD6J6

J8HD

LD

Page 12: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

12 NXP Semiconductors

4.4.4 Jumper definitionsFigure 8 and Table 6 define the jumper positions and explains their functions. (The default settings are shown in bold.)

Figure 8. Jumper locations

J6 LSD6 - PWM valve driver output 6 for the MC34SB0800 (5.0 A maximum; 5.0 kHz maximum)

J6 LSD7 - PWM valve driver output 7 for the MC34SB0800 (5.0 A maximum; 5.0 kHz maximum)

J6 LSD8 - PWM valve driver output 8 for the MC34SB0800 (5.0 A maximum; 5.0 kHz maximum)

J8 HD - High-side general purpose driver output for MC34SB0800 with LED indicator

J8 LD - Low-side general purpose driver output for MC34SB0800 with LED indicator

Table 5. Connectors (continued)

Name Description

J11 J13 J10 J5

J9

J7

Page 13: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Getting to know the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 13

.

Table 6. Jumpers

Jumper Description Setting Connection

J5Selects between Tower 5.0 V supply and external 5.0 V supply

1–2 External 5.0 V supply

2–3 Tower 5.0 V supply

J7Connect/Disconnect LED as the general purpose low-side driver load

1–2 LED connected

Not connected LED disconnected

J9Connect/Disconnect LED as the general purpose high-side driver load

1–2 LED connected

Not connected LED disconnected

J10Selects between digital voltage level of 5.0 V and 3.3 V

1–2 5.0 V digital voltage level

2–3 3.3 V digital voltage level

J11Selects between digital under voltage level of 5.0 V and 3.3 V

1–2 5.0 V digital under-voltage level

2–3 3.3 V digital under-voltage level

J13Selects compatibility settings when using additional tower boards

Multiple See Section 5.2 "Tower board settings"

Page 14: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Setting up the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

14 NXP Semiconductors

5 Setting up the hardware

5.1 Configuring the hardwareTable 7 shows jumper settings for various MCU Tower Boards. Figure 9 shows a typical configuration using the TWR-KL25Z48M and the jumper settings outlined in red in Table 7.

In this example, J5 is set to connect to an external 5.0 V power supply, J10 selects 3.3 V as the digital voltage level and J11 sets the digital under-voltage level at 3.3 V. J7 and J9 connect the LED low-side and high-side driver loads.

Figure 9. Configuration example

Table 7. MCU tower board TWR-KL25Z48M jumper settings

TWR-KL25Z48M TWR-KV31F120M TWR-KV10Z32 TWR-K64F120M TWR-K20 TWR-K22F120 TWR-K70

RSTB GPIO1 GPIO1 GPIO1 GPIO1 GPIO8 GPIO1 GPIO2

CSB GPIO2 GPIO2 GPIO2 GPIO2 GPIO9 GPIO2 GPIO3

PDI PWM4 PWM4 PWM4 PWM4 PWM4 PWM0 PWM4

Page 15: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Setting up the hardware

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 15

5.2 Tower board settingsA jumper block (J13) on the TWR-SB0800-36EVB provides a means of configuring the board for use with additional MCUs. The J13 jumper settings define the routing of all SPI signals, the reset signal from the MCU and the PWM motor control signal. In addition, jumper J10 allows you to select between either 3.3 V or 5.0 V depending on the requirement of the MCU being used.

Make sure that you set jumper J10 to the proper voltage level and that you set the jumpers on J13 to appropriate positions for the selected MCU. Check the schematic of each tower elevator board to assure that all signals are correctly connected.

Figure 10 shows the selection options on the TWR-SB0800-36EVB.

Figure 10. Jumpers for IO selection

Blue text indicates signals coming from the MC34SB0800 of the TWR-SB0800-36EVB.Red text indicates signals coming from the tower elevator board (Primary and Secondary).

Table 8 shows J13 jumper settings for compatible tower boards. These settings are important because the Reset (RSTB) and Chip Select (CSB) signals must be routed to MCU IO header positions that can handle such signals. Note that the ADIN1 pin can be used either to directly control the Pump Motor Pre-Driver or to measure external voltage.

5.3 Step-by-step instructions for setting up the hardwareTo perform the demonstration examples, the following connections and setup must be performed:

1. Mount the TWR-SB0800-36EVB and TWR-KL25Z48M board firmly to the tower elevator connectors. Notice that, on the board, the edge connector with the white stripe must be matched with the white connector on the primary elevator module.

2. Connect the positive wire from the power supply to the positive "VPWR" terminal on connector J2 of the TWR-SB0800-36EVB. Connect the negative wire from the power supply to the "AGND" terminal on connector J2.

3. Check to assure that all jumpers are in the default position on the TWR-SB0800-36EVB and the TWR-KL25Z48M board (refer to the tower MCU board User Guide).

4. Attach a USB mini-cable between the PC and the USB mini-plug connector on the TWR-KL25Z48M board. This cable serves as the VCC5 supply and the communication link between the tower boards platform and the PC.

Table 8. Jumper settings for compatible tower boards

TWR-KL25Z48M TWR-KV31F120M TWR-KV10Z32 TWR-K64F120M TWR-K20 TWR-K22F120 TWR-K70

RSTB GPIO1 GPIO1 GPIO1 GPIO1 GPIO8 GPIO1 GPIO2

CSB GPIO2 GPIO2 GPIO2 GPIO2 GPIO9 GPIO2 GPIO3

ADIN1 PWM4 PWM4 PWM4 PWM4 PWM4 PWM0 PWM4

GPIO1

GPIO2GPIO8

GPIO8

PWM0

PWM4PWM1

PWM5GPIO9

GPIO2GPIO3

GPIO8SB0800_CSB

SB0800_RESET SB0800_ADIN1

J13

HDR_2X10

1 23 4

657 89 10

11 1213 1415 1617 1819 20

Page 16: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Schematic

TWR-SB0800-36EVB tower system platform, Rev. 1.0

16 NXP Semiconductors

6 Schematic

Figure 11. Schematic part 1

Motor Function - 40A -

LSDx drain 5A maximum, be carefull

about wires size on Layout.

Current can raise at 70A peak during 2ms

and 10 A in DC, be aware about wire size on Layout.

In/Out Signal

Note :

Motor Pump -

Motor Pump +

Note :

C5 must be placed closed to pin

HSD Function - 20A -

Note :

Current can raise at 50A peak (for short

circuit tests)

and 30 A in DC, be aware about wire size on

Layout.

24 "CP" & pin 25 "VPWR"

VPW

R

SB08

00_P

D_D

SB08

00_P

D_G

VCC

5

SB08

00_P

D_S

AGN

D

DO

SV

SB08

00_R

ESET

VCC

5

SB08

00_P

D_D

SB08

00_P

D_G

SB08

00_P

D_S

SB08

00_H

D_S

SB08

00_H

D_G

SB08

00_H

D_D

VPW

R

DO

SV

VCC

5

VPW

R

SB08

00_H

D_S

SB08

00_H

D_G

SB08

00_H

D_D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

VPW

R

VCC

5

AGN

D

DO

SV

SB08

00_R

ESET

SB08

00_C

SB

SB08

00_R

ESET

VPW

R

SB08

00_A

DIN

1SB

0800

_AD

IN2

SB08

00_A

DIN

3

MIS

O0

MO

SI0

SCLK

0

SB08

00_L

SD_2

SB08

00_L

SD_3

SB08

00_L

SD_4

SB08

00_L

SD_5

SB08

00_L

SD_6

SB08

00_L

SD_7

SB08

00_L

SD_8

SB08

00_L

D

SB08

00_H

SSB

0800

_LSD

_1

SB08

00_H

SD

SB08

00_P

53_C

FG

VPW

R

R10

1.8K

R7

2K

C8

1000

PF

D8

OR

ANG

E

A C

TP5

DN

P

R2

2K

SW1

PB s

witc

h

1 4

2 3

TP4

DN

P

TP10

DN

P

R4

1K

C9

10uF

Q1

RJK

0301

DPB

5

4

123

D2

GR

EEN

A C

R11

100

U1

MC

34SB

0800

AE

CP

24

HD

_D33

HD

_G31

HD

_S32

LSD

1_1

5

LSD

1_2

6

LSD

2_1

7

LSD

2_2

8

LSD

3_1

9

LSD

3_2

10

LSD

4_1

11

LSD

4_2

12

LSD

5_1

44

LSD

5_2

45

LSD

6_1

42

LSD

6_2

43

LSD

7_1

40

LSD

7_2

41

LSD

8_1

38

LSD

8_2

39

GND_P02

GND_P14

GND_P213

GND_P337

GND_P446

GND_A51

GND_D54

EPAD65

RS

T1

CS

16

SC

LK14

SI

15

SO

57

LD18

HS

26

AD

IN3

48A

DIN

249

AD

IN1

50

PD

_G28

PD

_S29

PD

_D30

NC

_33

NC

_17

17

NC

_19

19

NC

_20

20

NC

_21

21

NC

_22

22

NC

_23

23

NC

_27

27

NC

_34

34

NC

_35

35

NC

_36

36

NC

_47

47

NC

_58

58

NC

_59

59

NC

_60

60

NC

_61

61

NC

_62

62

NC

_63

63

DOSV56

VCC555

P53_CFG64

VPWR25

VINT_A52

VINT_D53

C7

0.22

uF

D3

GD

Z15B

-E3-

08

AC

D1

GD

Z15B

-E3-

08

AC

J1CO

N_2

_TB

A1

B2

R6

1.8K

C1

0.1U

F

R8

100

R9

100

C2

0.22

UF

C4

10uF

TP1

DN

P

D4

OR

ANG

E

A C

C6

1uF

C3

0.22

UF

D5

SS2H

10

AC

TP9

DN

P

R5

100

TP6

DN

P

TP3

DN

P

TP7

DN

P

TP2

DN

P

R1

0

Q2

RJK

0301

DPB

5

4

123

R3

10K

C10

0.1u

F

TP8

DN

P

D6

GD

Z15B

-E3-

08

AC

D7

GD

Z15B

-E3-

08

AC

C5

0.22

UF

Page 17: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Schematic

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 17

Figure 12. Schematic part 2

SUPPLY

VCC5 & ADIN Connector

MC34SB0800 LSD_1 to LSD_8

VCC5 - Supply

1 & 2

2 & 3

Pin

External VCC5

Tower VCC5

VCC

1 & 2

2 & 3

Pin

5V3.3V

DOSV

Digital Supply

Low Side Driver Connectors

1 & 2

2 & 3

Pin

3.3V

5V

P53_CFG

CO

N_V

CC

5

CO

N_V

CC

5

VPW

R

VCC

5

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

SB08

00_H

SDSB

0800

_LSD

_1

SB08

00_L

SD_2

SB08

00_L

SD_3

SB08

00_L

SD_4

VCC

5

SB08

00_A

DIN

1

SB08

00_A

DIN

2

SB08

00_A

DIN

3

SB08

00_H

S

SB08

00_L

D

DO

SV

AGN

D

VPW

R

TWR

_VC

C5

ELE_

PS_S

ENSE

_1TW

R_V

CC

3V3

VCC

5

SB08

00_H

SD

SB08

00_P

53_C

FG

SB08

00_L

SD_5

SB08

00_L

SD_6

SB08

00_L

SD_7

SB08

00_L

SD_8

C17

2200

PF

R15

1.8K

D22 O

RAN

GE

A CR

131.

8K

R17 0

D16

SS2H

10

AC

TP14

DN

P

R12

1.8K

D15

SS2H

10

AC

D9

SS2H

10

AC

D14

GR

EEN

A C

J2

CO

N_4

_TB

1234

C11

2200

PF

C16

2200

PF

D21

SS2H

10

AC

TP13

DN

PC

1522

00PF

C14

2200

PF

R16

10K

J6

CO

N_4

_TB

1234

J10

HD

R_1

X3

1 2 3

J3

CO

N_4

_TB

1234

R14

1K

TP11

DN

P

D13

SS2H

10

AC

C12

10uF

J9 HD

R 1

X2 T

H

1 2

D18

SS2H

10

AC

J5 HD

R_1

X3

1

2

3

TP12

DN

P

D12

SS2H

10

AC

D10

STPS

2H10

0AY

AC

C18

0.1u

F

D11

STPS

2H10

0AY

AC

J8CO

N_2

_TB

A1

B2

D17 O

RAN

GE

A C

D19

SS2H

10

AC

J7HD

R 1

X2 T

H

12

C21

2200

PF

C13

0.1u

F

J4

CO

N_4

_TB

1 2 3 4

C20

2200

PF

J11

HD

R_1

X3

123

D20

BLU

E

A C

C19

2200

PF

Page 18: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Schematic

TWR-SB0800-36EVB tower system platform, Rev. 1.0

18 NXP Semiconductors

Figure 13. Schematic part 3

Note:

Allows to adress several IO of MCU

TWR

_VC

C5

TWR

_VC

C5

AGN

DAG

ND

TWR

_VC

C5

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

DAG

ND

AGN

D

AGN

D

AGN

D

AGN

D

TWR

_VC

C5

TWR

_VC

C5

AGN

DAG

ND

AGN

D

AGN

D

AGN

D

AGN

D

AGN

D

AGN

DAG

ND

AGN

D

AGN

D

AGN

D

AGN

D

TWR

_VC

C3V

3

TWR

_VC

C3V

3

AGN

D

TWR

_VC

C3V

3

TWR

_VC

C3V

3TW

R_V

CC

3V3

TWR

_VC

C3V

3

TWR

_VC

C3V

3TW

R_V

CC

3V3

TWR

_VC

C3V

3

TWR

_VC

C3V

3TW

R_V

CC

3V3

TWR

_VC

C3V

3

AGN

D

TWR

_VC

C3V

3

GPI

O1

GPI

O2

GPI

O1

GPI

O2

GPI

O3

GPI

O8

GPI

O8

PWM

0

PWM

4

PWM

5PW

M4

PWM

0PW

M1

PWM

1

PWM

5G

PIO

9

GPI

O8

GPI

O9

GPI

O2

GPI

O3

GPI

O8

AGN

D

TWR

_VC

C5

ELE_

PS_S

ENSE

_1

TWR

_VC

C3V

3

MIS

O0

MO

SI0

SCLK

0

SB08

00_C

SB

SB08

00_R

ESET

SB08

00_A

DIN

1

J13

HD

R_2

X10

12

34 6

5 78

910

1112

1314

1516

1718

1920

SE

CO

ND

AR

YPC

I EXP

RES

S TO

WER

SYS

TEM

J12B

5V_3

D1

GN

D_1

7D

2

3.3V

_8D

3

ELE

_PS

_SE

NS

E_2

D4

GN

D_1

8D

5

GN

D_1

9D

6

SP

I2_C

LKD

7

SP

I2_C

S1

D8

SP

I2_C

S0

D9

SP

I2_M

OS

ID

10

SP

I2_M

ISO

D11

ETH

_CO

L_2

D12

ETH

_RX

ER

_2D

13

ETH

_TX

CLK

_2D

14

ETH

_TX

EN

_2D

15

GP

IO18

D16

GP

IO19

/SD

HC

D4

D17

GP

IO20

/SD

HC

D5

D18

ETH

_TX

D1_

2D

19

ETH

_TX

D0_

2D

20

ULP

I_N

XT/

US

B1_

DM

D21

ULP

I_D

IR/U

SB

1_D

PD

22

ULP

I_D

5/U

SB

2_D

MD

23

ULP

I_D

6/U

SB

2_D

PD

24

ULP

I_D

7D

25

GN

D_2

0D

26

LCD

_HS

YN

C/L

CD

_P24

D27

LCD

_VS

YN

C/L

CD

_P25

D28

AN

13D

29

AN

12D

30

GN

D_2

1D

31

LCD

_CLK

/LC

D_P

26D

32

TMR

11D

33

TMR

10D

34

GP

IO21

D35

3.3V

_9D

36

PW

M15

D37

PW

M14

D38

PW

M13

D39

PW

M12

D40

CA

NR

X1

D41

CA

NTX

1D

42

GP

IO22

D43

LCD

_OE

/LC

D_P

27D

44

LCD

_D0/

LCD

_P0

D45

LCD

_D1/

LCD

_P1

D46

LCD

_D2/

LCD

_P2

D47

LCD

_D3/

LCD

_P3

D48

GN

D_2

2D

49

GP

IO23

D50

GP

IO24

D51

LCD

_D12

/LC

D_P

12D

52

LCD

_D13

/LC

D_P

13D

53

LCD

_D14

/LC

D_P

14D

54

IRQ

_P/S

PI2

_CS

2D

55

IRQ

_O/S

PI2

_CS

3D

56

IRQ

_ND

57

IRQ

_MD

58

IRQ

_LD

59

IRQ

_KD

60

IRQ

_JD

61

IRQ

_ID

62

LCD

_D18

/LC

D_P

18D

63

LCD

_D19

/LC

D_P

19D

64

GN

D_2

3D

65

EB

I_A

D20

/LC

D_P

42D

66

EB

I_A

D21

/LC

D_P

43D

67

EB

I_A

D22

/LC

D_P

44D

68

EB

I_A

D23

/LC

D_P

45D

69

EB

I_A

D24

/LC

D_P

46D

70

EB

I_A

D25

/LC

D_P

47D

71

EB

I_A

D26

/LC

D_P

48D

72

EB

I_A

D27

/LC

D_P

49D

73

EB

I_A

D28

/LC

D_P

50D

74

EB

I_A

D29

/LC

D_P

51D

75

EB

I_A

D30

/LC

D_P

52D

76

EB

I_A

D31

/LC

D_P

53D

77

LCD

_D20

/LC

D_P

20D

78

LCD

_D21

/LC

D_P

21D

79

LCD

_D22

/LC

D_P

22D

80

GN

D_2

4D

81

3.3V

_10

D82

5V_4

C1

GN

D_2

5C

2

3.3V

_11

C3

3.3V

_12

C4

GN

D_2

6C

5

GN

D_2

7C

6

SC

L2C

7

SD

A2

C8

GP

IO25

C9

ULP

I_S

TOP

C10

ULP

I_C

LKC

11

GP

IO26

C12

ETH

_MD

C_2

C13

ETH

_MD

IO_2

C14

ETH

_RX

CLK

_2C

15

ETH

_RX

DV

_2C

16

GP

IO27

/SD

HC

D6

C17

GP

IO28

/SD

HC

D7

C18

ETH

_RX

D1_

2C

19

ETH

_RX

D0_

2C

20

ULP

I_D

0/U

SB

3_D

MC

21

ULP

I_D

1/U

SB

3_D

PC

22

ULP

I_D

2/U

SB

4_D

MC

23

ULP

I_D

3/U

SB

4_D

PC

24

ULP

I_D

4C

25

GN

D_2

8C

26

AN

11C

27

AN

10C

28

AN

9C

29

AN

8C

30

GN

D_2

9C

31

GP

IO29

C32

TMR

9C

33

TMR

8C

34

GP

IO30

C35

3.3V

_13

C36

PW

M11

C37

PW

M10

C38

PW

M9

C39

PW

M8

C40

RX

D2/

TSI0

C41

TXD

2/TS

I1C

42

RTS

2/TS

I2C

43

CTS

2/TS

I3C

44

RX

D3/

TSI4

C45

TXD

3/TS

I5C

46

RTS

3/TS

I6C

47

CTS

3/TS

I7C

48

GN

D_3

0C

49

LCD

_D4/

LCD

_P4

C50

LCD

_D5/

LCD

_P5

C51

LCD

_D6/

LCD

_P6

C52

LCD

_D7/

LCD

_P7

C53

LCD

_D8/

LCD

_P8

C54

LCD

_D9/

LCD

_P9

C55

LCD

_D10

/LC

D_P

10C

56

LCD

_D11

/LC

D_P

11C

57

TMR

16C

58

TMR

15C

59

TMR

14C

60

TMR

13C

61

LCD

_D15

/LC

D_P

15C

62

LCD

_D16

/LC

D_P

16C

63

LCD

_D17

/LC

D_P

17C

64

GN

D_3

1C

65

EB

I_B

E_3

2_24

/LC

D_P

28C

66

EB

I_B

E_2

3_16

/LC

D_P

29C

67

EB

I_B

E_1

5_8/

LCD

_P30

C68

EB

I_B

E_7

_0/L

CD

_P31

C69

EB

I_TS

IZE

0/LC

D_P

32C

70

EB

I_TS

IZE

1/LC

D_P

33C

71

EB

I_TS

/LC

D_P

34C

72

EB

I_TB

ST/

LCD

_P35

C73

EB

I_TA

/LC

D_P

36C

74

EB

I_C

S4/

LCD

_P37

C75

EB

I_C

S3/

LCD

_P38

C76

EB

I_C

S2/

LCD

_P39

C77

EB

I_C

S1/

LCD

_P40

C78

GP

IO31

/LC

D_P

41C

79

LCD

_D23

/LC

D_P

23C

80

GN

D_3

2C

81

3.3V

_14

C82

PR

IMA

RY

J12A

PCI E

XPR

ESS

TOW

ER S

YSTE

M

5V_1

B1

GN

D_1

B2

3.3V

_1B

3

ELE

_PS

_SE

NS

E_1

B4

GN

D_2

B5

GN

D_3

B6

SD

HC

_CLK

/SP

I1_C

LKB

7

SD

HC

_D3/

SP

I1_C

S1

B8

SD

HC

_D3/

SP

I1_C

S0

B9

SD

HC

_CM

D/S

PI1

_MO

SI

B10

SD

HC

_D0/

SP

I1_M

ISO

B11

ETH

_CO

L_1

B12

ETH

_RX

ER

_1B

13

ETH

_TX

CLK

_1B

14

ETH

_TX

EN

_1B

15

ETH

_TX

ER

_1B

16

ETH

_TX

D3_

1B

17

ETH

_TX

D2_

1B

18

ETH

_TX

D1_

1B

19

ETH

_TX

D0_

1B

20

GP

IO1/

RTS

1B

21

GP

IO2/

SD

HC

_D1

B22

GP

IO3

B23

CLK

IN0

B24

CLK

OU

T1B

25

GN

D_4

B26

AN

7B

27

AN

6B

28

AN

5B

29

AN

4B

30

GN

D_5

B31

DA

C1

B32

TMR

3B

33

TMR

2B

34

GP

IO4

B35

3.3V

_2B

36

PW

M7

B37

PW

M6

B38

PW

M5

B39

PW

M4

B40

CA

NR

X0

B41

CA

NTX

0B

42

1WIR

EB

43

SP

I0_M

ISO

/IO1

B44

SP

I0_M

OS

I/IO

0B

45

SP

I0_C

S0

B46

SP

I0_C

S1

B47

SP

I0_C

LKB

48

GN

D_6

B49

SC

L1B

50

SD

A1

B51

GP

IO5/

SP

I0_H

OLD

/IO3

B52

US

B0_

DP

_PD

OW

NB

53

US

B0_

DM

_PD

OW

NB

54

IRQ

_HB

55

IRQ

_GB

56

IRQ

_FB

57

IRQ

_EB

58

IRQ

_DB

59

IRQ

_CB

60

IRQ

_BB

61

IRQ

_AB

62

EB

I_A

LE/E

BI_

CS

1B

63

EB

I_C

S0

B64

GN

D_7

B65

EB

I_A

D15

B66

EB

I_A

D16

B67

EB

I_A

D17

B68

EB

I_A

D18

B69

EB

I_A

D19

B70

EB

I_R

/WB

71

EB

I_O

EB

72

EB

I_D

7B

73

EB

I_D

6B

74

EB

I_D

5B

75

EB

I_D

4B

76

EB

I_D

3B

77

EB

I_D

2B

78

EB

I_D

1B

79

EB

I_D

0B

80

GN

D_8

B81

3.3V

_3B

82

5V_2

A1

GN

D_9

A2

3.3V

_4A

3

3.3V

_5A

4

GN

D_1

0A

5

GN

D_1

1A

6

SC

L0A

7

SD

A0

A8

GP

IO9/

CTS

1A

9

GP

IO8/

SD

HC

_D2

A10

GP

IO7/

SD

_WP

_DE

TA

11

ETH

_CR

SA

12

ETH

_MD

C_1

A13

ETH

_MD

IO_1

A14

ETH

_RX

CLK

_1A

15

ETH

_RX

DV

_1A

16

ETH

_RX

D3_

1A

17

ETH

_RX

D2_

1A

18

ETH

_RX

D1_

1A

19

ETH

_RX

D0_

1A

20

SS

I_M

CLK

A21

SS

I_B

CLK

A22

SS

I_FS

A23

SS

I_R

XD

A24

SS

I_TX

DA

25

GN

D_1

2A

26

AN

3A

27

AN

2A

28

AN

1A

29

AN

0A

30

GN

D_1

3A

31

DA

C0

A32

TMR

1A

33

TMR

0A

34

GP

IO6

A35

3.3V

_6A

36

PW

M3

A37

PW

M2

A38

PW

M1

A39

PW

M0

A40

RX

D0

A41

TXD

0A

42

RX

D1

A43

TXD

1A

44

VS

SA

A45

VD

DA

A46

VR

EFA

1A

47

VR

EFA

2A

48

GN

D_1

4A

49

GP

IO14

A50

GP

IO15

A51

GP

IO16

A52

GP

IO17

A53

US

B0_

DM

A54

US

B0_

DP

A55

US

B0_

IDA

56

US

B0_

VB

US

A57

TMR

7A

58

TMR

6A

59

TMR

5A

60

TMR

4A

61

RS

TIN

A62

RS

TOU

TA

63

CLK

OU

T0A

64

GN

D_1

5A

65

EB

I_A

D14

A66

EB

I_A

D13

A67

EB

I_A

D12

A68

EB

I_A

D11

A69

EB

I_A

D10

A70

EB

I_A

D9

A71

EB

I_A

D8

A72

EB

I_A

D7

A73

EB

I_A

D6

A74

EB

I_A

D5

A75

EB

I_A

D4

A76

EB

I_A

D3

A77

EB

I_A

D2

A78

EB

I_A

D1

A79

EB

I_A

D0

A80

GN

D_1

6A

81

3.3V

_7A

82

Page 19: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Board layout

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 19

7 Board layout

7.1 Silkscreen

Page 20: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Board bill of materials

TWR-SB0800-36EVB tower system platform, Rev. 1.0

20 NXP Semiconductors

8 Board bill of materials

Table 9. Bill of materials(1)

Item Qty Schematic label Value Description Part Number Assy Opt

NXP components

1 1 U1IC VALVES AND PUMP CONTROLLER3.3 V / 5.0 V LQFP64

MC34SB0800AE

Active components

2 2 Q1, Q2 TRAN NMOS PWR 60 A 30 V LFPAK5 RJK0301DPB-00-J0Use referencePSMN1R8-40YLC

Diodes

3 4 D1, D3, D6, D7DIODE ZNR 5 MA 15V 0.2 W AEC-Q101 SOD-323

GDZ15B-E3-08

4 2 D2, D14 GREEN LED GRN SGL 30 MA SMT 0805 LTST-C171KGKT

5 2 D4, D8 ORANGE LED OR SGL 30 MA 0805 SMT APHCM2012SECK-F01 (2)

6 9D5, D9, D12, D13, D15, D16, D18, D19, D21

SS2H10 DIODE SCH RECT 2 A 100 V DO-214AA SS2H10-E3/52T

7 2 D10, D11DIODE PWR RECT SCH 2 A 100 V AEC-Q101 SMA

STPS2H100AY

8 2 D17, D22 ORANGE LED OR SGL 30 MA 0805 SMT APHCM2012SECK-F01

9 1 D20 BLUE LED BLUE SGL 30 mA 2.6 V 0603 UT-692NB

Capacitors

10 1 C1 0.1 μF CAP CER 0.1 μF 50 V 10% X7R 0603 GRM188R71H104KA93D (2)

11 3 C2, C3, C5 0.22 μF CAP CER 0.22 μF 50 V 5% X7R 1206 C1206C224J5RACTU

12 3 C4, C9, C12 10 μFCAP CER 10 μF 50 V 10% X7S AEC-Q200 1210

GCM32EC71H106KA03

13 1 C6 1 μF CAP CER 1 μF 25 V 10% X7R 0603 0603X105K250SNT

14 1 C7 0.22 μF CAP CER 0.22 μF 100 V 20% X7S 0805 C2012X7S2A224M/SOFT

15 1 C8 1000 pF CAP CER 1000 pF 25 V 5% C0G CC0603 C0603C102J3GACReplace by a strap or 0 ohm resistor

16 3 C10, C13, C18 0.1 μFCAP CER 0.1 μF 50 V 5% C0G AEC-Q200 1206

CGA5L2C0G1H104J160AA

17 8C11, C14, C15, C16, C17, C19, C20, C21

2200 pF CAP CER 2200 pF 50 V 5% X7R 0805 MCCE222J2NRTF

Resistors

18 1 R1 0 Ω RES MF ZERO Ω 1/10 W -- AEC-Q200 0603 CRCW06030000Z0EA

19 2 R2, R7 2 Ω RES MF 2 Ω 1/8 W 1% 0805 CR0805-FX-2001ELF

20 2 R3, R16 10 Ω RES MF 10 Ω 1/4 W 5% 1206 CR1206JW103ELF

21 2 R4, R14 1 Ω RES MF 1 Ω 1/10 W 0.5% 0603 MCT06030C1001DP500

22 4 R5, R8, R9, R11 100 Ω RES MF 100 Ω 1/10 W 1% AEC-Q200 0603 CRCW0603100RFKEA

23 2 R6, R10 1.8 Ω RES MF 1.8 Ω 1/10 W 5% 0603 WR06X182JTL (2)

24 3 R12, R13, R15 1.8 Ω RES MF 1.8 Ω 1/10 W 5% 0603 WR06X182JTL

25 1 R17 0 Ω RES MF ZERO Ω 1/10W -- AEC-Q200 0603 CRCW06030000Z0EA (2)

Switches, connectors, jumpers and test points

26 2 J1, J8 CON_2_TB CON 1X2 TB TH 5 MM SP 394H SN CTB5000/2

27 4 J2, J3, J4, J6 CON_4_TB CON 1X4 TB TH 5 MM SP 394H SN 282836-4

28 2 J5, J11 HDR_1X3 HDR 1X3 TH 100 MIL SP 374H AU 826629-3Place jumper on pin 2–3

29 2 J7, J9HDR 1X2 TH

HDR 1X2 TH 100 MIL SP 339H AU 98L TSW-102-07-G-SPlace jumper on pin 1–2

30 1 J10 HDR_1X3 HDR 1X3 TH 100 MIL SP 374H AU 826629-3Place jumper on pin 1–2

31 1 J12

PCI EXPRESS TOWER SYSTEM

CON DUAL 2X82 Edge PCI Express SMT 1MM SP 591H FOR TOWER SYSTEM NOT A PART TO ORDER

EDGE PCI EXPRESS 164

Page 21: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Board bill of materials

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 21

32 1 J13 HDR_2X10 HDR 2X10 SMT 50 MIL SP 251H AU FTSH-110-01-L-DV-KPlace jumpers on pin 1–3 and on pin 17–19

33 1 SW1 PB switchSW SMT 4.0 MM FMS 0.1A MAX 16V MAX ROHS COMPLIANT

7914J-1-000E

34 14

TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP14

TEST POINT WHITE

TEST POINT WHITE 40 MIL DRILL 180 MIL TH 109L

5002 (2)

Notes 1. NXP does not assume liability, endorse, or warrant components from external manufacturers are referenced in circuit drawings or tables. While

NXP offers component recommendations in this configuration, it is the customer’s responsibility to validate their application.2. Do not populate

Table 9. Bill of materials(1)

Item Qty Schematic label Value Description Part Number Assy Opt

Page 22: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

References

TWR-SB0800-36EVB tower system platform, Rev. 1.0

22 NXP Semiconductors

9 ReferencesFollowing are URLs where you can obtain information on related NXP products and application solutions:

9.1 SupportVisit www.nxp.com/support for a list of phone numbers within your region.

9.2 WarrantyVisit www.nxp.com/warranty for a list of phone numbers within your region.

NXP.com Support Pages Description URL

TWR-SB0800-36EVB Tool Summary Page www.nxp.com/TWR-SB0800-36EVB

MC34SB0800 Product Summary Page www.nxp.com/MC34SB0800

Tower SystemTower System Modular Development Board Platform

www.nxp.com/tower

TWR-KL25Z48M Tool Summary Page www.nxp.com/TWR-KL25Z48M

K20D72M Tool Summary Page www.nxp.com/K20D72M

KV13F120M Tool Summary Page www.nxp.com/KV31F120M

Kinetis Design Studio Software www.nxp.com/kinetis

CodeWarrior Software www.nxp.com/codewarrior

Page 23: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Revision history

TWR-SB0800-36EVB tower system platform, Rev. 1.0

NXP Semiconductors 23

10 Revision history

Revision Date Description of Changes

1.01/2016 • Initial release

7/2016 • Updated to NXP document form and style

Page 24: TWR-SB0800-36EVB tower system platform · 2019-09-24 · TP8 ADN2 signal (10-bit ADC) TP9 ADN3 signal (10-bit ADC) TP10 High-side pre-driver Safe Switch gate signal TP11 VPWR signal

Information in this document is provided solely to enable system and software implementers to use NXP products. There

are no expressed or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on

the information in this document. NXP reserves the right to make changes without further notice to any products herein.

NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose,

nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims

any and all liability, including without limitation, consequential or incidental damages. "Typical" parameters that may be

provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may

vary over time. All operating parameters, including "typicals," must be validated for each customer application by the

customer's technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP sells

products pursuant to standard terms and conditions of sale, which can be found at the following address:

http://www.nxp.com/terms-of-use.html.

NXP, the NXP logo, Freescale, the Freescale logo, and SMARTMOS are trademarks of NXP B.V. All other product or

service names are the property of their respective owners. All rights reserved.

© 2016 NXP B.V.

How to Reach Us:Home Page: NXP.com

Web Support: http://www.nxp.com/support

Document Number: KTTWRSB0800-36EVBUGRev. 1.0

7/2016