December 2017 DocID029132 Rev 3 1/25

1

UM2042User manual

Discovery kit for the ST25R3911B high performance HF reader / NFC initiator

Introduction

The ST25R3911B-DISCO is a ready-to-use development kit to evaluate the functions of the high performance HF reader / NFC initiator ST25R3911B in Reader mode for contactless applications.

The ST25R3911B-DISCO kit supports

• ISO 18092 (NFCIP-1) active P2P

• ISO 14443A and ISO14443B

• ISO 15693

• FeliCa™

• VHBR, with 6.8 Mbit/s PCD to PICC framing and 3.4 Mbit/s PICC to PCD framing

• Up to 1.4 W output power with differential antenna

• Possibility of driving two antennas in single ended mode, with automatic antenna tuning (AAT) system

• Inductive and capacitive Wake-up

• User selectable and automatic gain control

• Transparent and Stream modes to implement MIFARE® Classic compliant or other custom protocols

The evaluation kit includes

• the STM32L476RET6, a 32-bit microcontroller with 512 KB of Flash memory

• a 105 mm x 52 mm, two turns antenna etched on the PCB, and its VHBR tuning circuit

• a Micro-USB connector for communication with the host PC and board powering

• six LEDs indicating the presence of the RF field and of the protocol used to communicate.

Figure 1. ST25R3911B-DISCO PCB (top view)

www.st.com

Contents UM2042

2/25 DocID029132 Rev 3

Contents

1 Quick start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.1 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.2 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2.1 USB connectivity and power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2.2 STM32L4 MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2.3 ST25R3911B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2.4 Antenna and matching network components . . . . . . . . . . . . . . . . . . . . . . 8

2.3 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3.1 PCB overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3.2 PCB layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3 Antenna matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4 Federal Communications Commission (FCC) and Industry Canada (IC) compliance statements . . . . . . . . . . . . . . . . 22

4.1 FCC Compliance Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.1.1 Part 15.19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.1.2 Part 15.21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.1.3 Part 15.105 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.1.4 FCC ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.2 Formal notices required by the Industry Canada (“IC”) . . . . . . . . . . . . . . 22

4.2.1 Compliance Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.2.2 Declaration de Conformité . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.2.3 IC ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

DocID029132 Rev 3 3/25

UM2042 List of tables

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List of tables

Table 1. NFC Forum matching alternatives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Table 2. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

List of figures UM2042

4/25 DocID029132 Rev 3

List of figures

Figure 1. ST25R3911B-DISCO PCB (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Figure 2. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Figure 3. Schematics overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 4. USB interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Figure 5. STM32L476 schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 6. ST25R3911B schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 7. Antenna and matching network schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 8. PCB overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 9. PCB layout, top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Figure 10. PCB layout, mid layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 11. PCB layout, mid layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Figure 12. PCB layout, bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 13. VHBR matching with an AAT setting of 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 14. NFC Forum matching with an AAT setting of 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

DocID029132 Rev 3 5/25

UM2042 Quick start

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1 Quick start

The ST25R3911B-DISCO is connected to a PC via USB to show the features of the ST25R3911B chip. To do so, use the software STSW-ST25R001 to control all the functions of the discovery kit.

1.1 Getting started

Connect the discovery kit to a PC using a micro USB cable. The USB port of the PC must be capable of delivering at least 250 mA at 5 Volt supply.

To control the board, download the software STSW-ST25R001 from www.st.com and install it. Further information on how to operate the software can be found in the user manual UM2177 “PC software for the ST25R3911B-DISCO kit”, available on www.st.com.

1.2 System requirements

• Windows® PC (Windows 7 recommended)

• USB port, capable of delivering at least 250 mA at 5 V supply (1.25 W)

• Unit must be supplied by a Safety Extra Low Voltage (SELV) limited power source through the USB port, the source should not exceed 60 VDC / 8 A / 100 VA

• Micro-USB cable

Hardware UM2042

6/25 DocID029132 Rev 3

2 Hardware

The PCB (Printed Circuit Board) is connected via USB to the PC. The STSW-ST25R001 PC software controls the STM32 MCU located on the PCB. The STM32 MCU (based on Arm® core) then operates the ST25R3911B via SPI.

The ST25R3911B is connected directly to the 5 V supply of the USB bus. An LDO converts this voltage down to 3.3 V, to supply the microcontroller.

A green LED close to the USB plug indicates if the board is powered. Six blue LEDs indicate the mode of operation (transmit / receive) and which technologies are in use.

The antenna runs along the PCB perimeter.

2.1 Block diagram

Figure 2 shows the functional block diagram of the board.

Figure 2. Functional block diagram

2.2 Schematics

As indicated in Figure 3, the schematics can be split into four main parts

• USB connectivity and power supply (Figure 4)

• STM32 MCU (Figure 5)

• ST25R3911B (Figure 6)

• Antenna and matching network components (Figure 7)

DocID029132 Rev 3 7/25

UM2042 Hardware

24

2.2.1 USB connectivity and power supply

The ST25R3911B-DISCO board can be connected via USB to a host device.

Right behind the Micro-USB plug, an ECMF02 common mode filter with ESD protection for USB 2.0 interface is placed. The common mode filter is connected to VBUS and to the D+/D- data lines of the USB. All the USB terminals are ESD-protected by the built-in ESD diodes of the ECMF02.

Additionally, the power supply filter for the 5 V supplies the 3.3 V LDO, which, in turn, supplies the microcontroller.

A green LED is connected to the USB VBUS supply and shows the USB-power status.

2.2.2 STM32L4 MCU

This schematic includes the microcontroller needed to operate the NFC reader IC.

The MCU is clocked by a 32.768 kHz crystal. The MCU uses an internal PLL to generate the 48 MHz USB clock and the 80 MHz core clock from the provided 32.768 kHz.

Connector P201 is a JTAG/SWD interface to assist in software development. It can be connected to an external ST-LINK/V2 device using a 9-pin Cortex®-M adapter.

The six blue LEDs (LED201 to LED206) show the current mode of communication. If multiple protocols are active at the same time, then all corresponding LEDs are turned on.

The five resistors (R218 to R222) can be used to disconnect the MCU from SPI interface header P204. This SPI cross-connect mode can be used to operate the ST25R3911B with a different MCU PCB by cross connecting the ST25R3911B SPI to the second MCU PCB.

Connectors P202 and P203 can be used to connect an external UART or I2C host device to the MCU.

2.2.3 ST25R3911B

The ST25R3911B is directly connected to the filtered 5 V USB supply, and there are additional supply filtering components placed close to it. The jumper JP301 can be used to measure the supply current of the chip. If this measurement is performed, the ferrite bead L301 has to be removed.

Capacitors C301 to C304 provide additional filtering. All decoupling capacitors have been placed as close as possible to the ST25R3911B. Special care has been taken for C310, C302, C314 and C301, as they are the decoupling capacitors for the high power driver stage.

In order to demonstrate the capacitive wake-up feature, two capacitive electrodes are placed on the PCB. Additional electrodes can be connected using UFL connectors on P301 and P302.

For SPI cross-connecting to another reader PCB, the resistors R301 to R305 can be removed. Then the STM32L4 MCU SPI can be connected to the ST25R3911B on any customer PCB via header P204.

Thanks to J303 it is possible to bypass the internal VSP_RF regulator, this is required in case output currents higher than 200 mA need to be supplied.

Hardware UM2042

8/25 DocID029132 Rev 3

2.2.4 Antenna and matching network components

This schematic contains the matching network and the automatic antenna tuning capacitors, as well as the alternative NFC Forum matching components. In the default configuration, the ST25R3911B-DISCO is populated with a VHBR matching, with communication speeds up to 3.4 Mbps.

To support VHBR, the antenna is matched to a system Q-Factor of 8. By switching to the NFC Forum matching components the system Q-Factor is increased to 16. This can increase the read range up to 20%, depending on the used communication technology, but limits the maximum supported communication bit rate to 848 kbps. Additional details about antenna matching can be found on www.st.com/st25r.

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Figure 3. Schematics overview

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ST25R3911B-DISCO

MDG NFC & Reader Competence Center

PM/USB_con

U_Power ManagementPower Management.SchDoc

Antenna_Con

U_AntennaAntenna.SchDoc

SPI/Power_ConPM/USB_con

U_MicrocontrollerMicrocontroller.SchDoc

Antenna_ConSPI/Power_Con

U_ST25R3911BST25R3911B.SchDoc

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Figure 4. USB interface

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ST25R3911B-DISCO

MDG NFC & Reader Competence Center

3V3

GND

3V3 LDO

GNDGND

USB Interface

USBD_P

USBD_N

V_RF3_3V

PM/USB_con

GND

EN1

GN

D2

VO 4

NC 5GN

D0

VI6 PG 3U102 LD39050PU33R

GND

ESDG101

Logo_ESD

RoHSG102

Logo_RoHS

ST25G103

Logo_ST25

ST MicroelectronicsG104

Logo_STM

L102FB_0603_0R

L101

FB_0603

C104

C_1μ_0603_X5R

C103

C_1μ_0603_X5R

C106

C_2μ2_0402_X5R

C105

C_10n_0402_X7R

C102

C_10μ_0603_X5R

C101

C_10μ_0603_X5R

R101

LED101

PWR 1

D- 2

D+ 3

ID 4

Shie

ld6

GND 5

P101

μUSB

VBUS1

D-2

D+3

ID4

GND 5

D- 6

D+ 7

GND 8

U101

ECMF02-4CMX8

V_RF

V_RF

V_RF

3V3

J101closed 0R

L103FB_0603_0R

PM/USB_con

USBD_N

USBD_P

USBD_P

USBD_N

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Figure 5. STM32L476 schematics

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ST25R3911B-DISCO

MDG NFC & Reader Competence Center

Microcontroller

SEN

INTRMISOMOSISCLK

MCU_CLK

V_RF3_3V

SPI/Power_Con

SPI/Power_Con

USBD_NUSBD_P

V_RF3_3V

PM/USB_con

PM/USB_con

Interface

LP_UART_RX

LP_UART_TXUART_TX

UART_RX

3V3GND

1 2 3 4 5 6 7 8

P204 d.n.p.

SWD 3V3

PC13 2

PC14 - OSC32_IN 3

PC15 - OSC32_OUT 4

PC08

PC19

PC210

PC311

PA014

PA115

PA216

PA3/SAR_VREF+17

PA420

PA521

PA622

PA723

PC424

PC525

PB0 26

PB1/VREF+ 27

PB2 28

PB10/PE8 29

PB11/VCAP1 30

PB12/SD_VREF+ 33

PB13/PB14 34

PB14/PB15 35

PB15/PD8 36

PC637

PC738

PC8 39

PC9 40

PA841

PA942

PA1043

PA1144

PA1245

PA1346

PA1449

PA1550

PC10 51

PC11 52

PC12 53

PB3 55

PB4 56

PB5 57

PB6 58

PB7 59

PB8 61

PB9 62

497-15872-NDU201A

STM32L476RE

SCLK_MCUMISO_MCUMOSI_MCU

LP_UART_RXLP_UART_TX

UART_TXUART_RX

IRQ_MCULED1

LED2

VBAT/VLCD1

PF0/PD0/PH0 - OSC_IN5

PF1/PD1/PH1 - OSC_OUT6 NRST 7

VSSA 12

VDDA/VREF+13

VSS/PF4/PA3 18VDD/PF519

VSS/VCAP1 31VDD32

VSS/VCAP2/PF6 47VDD/VUSB/VSA/PF748

BOOT0 60

VSS 63VDD64

PD2 54

U201B

STM32L476RE

3V3

T_NRST

Cas

e

S201

Cas

e

S202 3V3

1234

P203

d.n.p.

3V3

1234

P202

d.n.p.

LP_UART_RXLP_UART_TX

T_NRST

T_JTDI

T_SWO

T_JTCK

T_JTMS

LED1LED2

LED3LED4

LED5LED6

SEN

MISO

INTR

MOSI

SCLKSCLK_MCU

MOSI_MCU

IRQ_MCU

MISO_MCU

/SS_MCU

SDASCL

3V3

C206

d.n.p.

C205

d.n.p.

Y201d.n.p.

USBD_NUSBD_P

J201

openJ202

open

Pin 18+19 Pin 47+48 Pin 63+64 Pin 12+13Pin 31+32 Pin 1

3V3

Pin 18+19 Pin 47+48 Pin 63+64 Pin 31+32 Pin 1

V_RF

3V3

R202R203

R205R206

R208R209

R201

R204

R207

R210

R211

R214

R215

R216

R217

R218

R219

R220

R221

R222

C203

C_4p3_0402

C204

C_4p3_0402

X20132.768 kHz

123456789

10

P201

Header 10

C209

C_4μ7_0402_X5R

C211

C_4μ7_0402_X5R

C210

C_100n_0402_X7R

C212

C_100n_0402_X7R

C213

C_100n_0402_X7R

C214

C_100n_0402_X7R

C216

C_100n_0402_X7R

C215

C_1μ_0402_X5R

C207

C_100n_0402_X7R

C208

C_100n_0402_X7RR223

L201

FB_0603AVDD

AVDD

LED201LED202

LED203LED204

LED205LED206

INTRMISOMOSISCLKSEN

V_RF

3V3

V_RF

LED6

C201

C_56p_0402

C202

C_56p_0402

R212

R213USBD_PUSBD_N MCU_D_N

MCU_D_P

T_JTMST_JTCKT_JTDI

MCU_D_PMCU_D_N

AVDD

SDASCL

/SS_MCULED5LED4T_SWO

AVDDLED3

Pin 12+13

C216555

X5R

AVDD

5

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ST25R3911B-DISCO

MDG NFC & Reader Competence Center

GND

GND

GND

GND

CSOCSI

TRIM1_0TRIM1_1TRIM1_2TRIM1_3

TRIM2_0TRIM2_1TRIM2_2TRIM2_3

RFO1RFO2

RFI1RFI2

SEN_11MISO_11MOSI_11SCLK_11INTR_11

VSP_RF

VSP

_RF

J301

C303d.n.p.

GND

CSO_out

GND GND

GNDGND

GN

D1

GN

D3

2

P301

d.n.p.

GN

D1

GN

D3

2

P302

d.n.p.

V_RF_3911

RFI1RFI2

RFO1RFO2

TRIM1_0TRIM1_1TRIM1_2TRIM1_3TRIM2_0TRIM2_1TRIM2_2TRIM2_3

Antenna_Con

Antenna_Con

TRIM2_0TRIM2_1TRIM2_2TRIM2_3

TRIM1_0TRIM1_1TRIM1_2TRIM1_3

RFO1RFO2

RFI2RFI1

INTR_11MISO_11MOSI_11SCLK_11SEN_11

ST25R3911 NFC Initiator / HF Reader Controller Interface

Antenna Connection

VSP

_A

VSP

_D

AG

D

V_RF

GNDGNDGND

SEN

INTRMISOMOSISCLK

V_RF3_3V

MCU_CLK

SPI/Power_Con

3V3JP301

d.n.p.

J303

open

J302

d.n.p.

GND

V_RF

3V3

C302

C_100n_0402_X7R

C301

C_1μ_0402_X5R

C304

C_100n_0402_X7R

Y301

C308C_8p2_0402

C307C_8p2_0402

C309

C_10n_0402_X7R

C310

C_10n_0402_X7R

C311

C_10n_0402_X7R

C312

C_10n_0402_X7RC313

C_2μ2_0402_X5R

C314

C_2μ2_0402_X5R

C315

C_2μ2_0402_X5R

C316

C_1μ_0402_X5R

R306

C305

C_12p_0402

R307

C306

C_12p_0402

CSI_out

GND

R301R302

R303R304

R305

SPI/Power_Con

L301

FB_0603

V_RF_3911

ST25R3911

VD

D_I

O1

CSO2

VSP

_D3

XTO4 XTI5

VSN

_D6

VSP

_RF

9

RFO1 10

RFO2 11

VSN

_RF

12

TRIM1_3 13

TRIM2_3 14

TRIM1_0 19

TRIM2_0 20

VSS

21

RFI1 22

RFI2 23AG

D24

IRQ27

MCU_CLK28

MISO29

MOSI30

SCLK31

/SS32

VSP

_A7

VD

D8

TRIM1_2 15

TRIM2_2 16

TRIM1_1 17

TRIM2_1 18

CSI25

VSN

_A26

EPV

SUB

33

NFC Initiator / HF Reader IC

U301ST25R3911B

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Figure 7. Antenna and matching network schematics

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ST25R3911B-DISCO

MDG NFC & Reader Competence Center

TRIM1_0

TRIM1_1

TRIM1_2

TRIM1_3

TRIM2_0

TRIM2_1

TRIM2_2

TRIM2_3

RFO1

RFO2

GND

GND

TRIM1

TRIM2

GND

TRIM1TRIM2

Trim Capacitor Banks

GND

RFI1RFI2

RFO1RFO2

TRIM1_0TRIM1_1TRIM1_2TRIM1_3TRIM2_0TRIM2_1TRIM2_2TRIM2_3

Antenna_Con

Antenna_Con

Antenna Connection

12

J403

123

J402

C407

d.n.p.

C404

d.n.p.

NFC Forum matching

GND GND

RFI1

RFI2

RFI1

RFO1RFO2

TRIM1_0TRIM1_1TRIM1_2TRIM1_3TRIM2_0TRIM2_1TRIM2_2TRIM2_3

RFI2

C401C_82p_0603

C412C_82p_0603

C402C_10p_0603

C411C_10p_0603

C403

C_180p_0603

C410

C_180p_0603

C405C_680p_0603

C409C_680p_0603

L401

270n

L402

270n

C415C_5p6_0402

C416C_5p6_0402

C417C_12p_0402

C418C_12p_0402

C419C_27p_0402

C420C_27p_0402

C421C_56p_0402

C422C_56p_0402

C403_NFCF

C_120p_0603

C410_NFCF

C_120p_0603

C406C_120p_0603

C408C_120p_0603

Antenna Loop

R401

R402

R401_NFCF

R402_NFCF

J405

closed 0R

J404

closed 0R

J401

closed 0R

J406

closed 0R

J407

closed 0R

Antenna Circuit incl. EMI Filter and Matching

Hardware UM2042

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2.3 PCB layout

2.3.1 PCB overview

The PCB (see Figure 8) is organized in two halves

• Left side: the SPI header P204 and the digital / MCU sections

• Right side: the analog parts and the ST25R3911B.

The whole PCB is surrounded by a two turns NFC antenna.

Figure 8. PCB overview

The boot button can be found right above the I2C header. If this button is pressed during the powering or the resetting of the board, the STM32L4 will enter the boot loader mode. The reset button is positioned between the JTAG/SWD header and the I2C header.

2.3.2 PCB layers

The PCB layout is designed considering that the ST25R3911B is a high power RF transmitter, hence the decoupling capacitors are located as close as possible to the positive and negative power supply pins, for example VSP_RF and VSN_RF.

Since the chip is using a differential output driver stage, the antenna matching network is treated as a differential network. The space between the components is kept as small as possible and the whole network is routed in a completely symmetrical way.

Via stitching and via shielding is used to maintain a low impedance and prevent short return current loops. The RF traces are protected by via stitching in combination with guard rings to create a via wall. This keeps the PCB electromagnetically “quiet”.

A via shield is used to create a vertical copper barrier through the PCB. This helps to reduce crosstalk and electromagnetic interference in any route carrying an RF signal. The RFI traces and AAT lanes are routed as close as possible to each other.

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Top layer

The top layer (Figure 9) contains most of the components and PCB traces. The unused areas around the ICs are filled with GND planes, guarded using via stitching. Furthermore, important analog traces are surrounded by GND vias.

Mid layer 1

This layer (Figure 10) is a pure GND plane, providing a low ohmic DC path for the GND connection.

Mid layer 2

Mid layer 2 (Figure 11) is used for the power distribution. It contains the power planes for the 5 V supply of the ST25R3911B and the 3.3 V supply of the microcontroller.

Bottom layer

The bottom layer (Figure 12) is mainly a GND plane, but some traces are routed through it.

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Figure 9. PCB layout, top layer

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Figure 10. PCB layout, mid layer 1

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Figure 11. PCB layout, mid layer 2

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Figure 12. PCB layout, bottom layer

Antenna matching UM2042

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3 Antenna matching

The default matching network assembled enables VHBR operation up to 3.4 Mbps.

Components for an optional NFC Forum matching are placed on the board. Exchanging the components as indicated in Table 1 will increase the Q factor of the antenna system. VHBR communication at 3.4 Mbps and 1.7 Mbps bit rate will not be supported anymore, but the read range for lower data rate applications will increase, up to 20%.

The matching impedance will remain the same when switching between the two matchings.

VHBR matching

The VHBR matching is designed with a target Q-Factor of 8. The matching impedance is around 12.8 + j5 Ω. The HW based AAT algorithm will typically adjust to an AAT value of 8 (see Figure 13).

Figure 13. VHBR matching with an AAT setting of 8

NFC Forum matching

The NFC Forum matching is designed with a target Q-Factor of 16.

To switch to the NFC Forum matching the user needs to change the components listed in Table 1.

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With the new assembled values, the matching impedance looks as in Figure 14, with a value close to 11 + j6 Ω.

Figure 14. NFC Forum matching with an AAT setting of 11

The HW based AAT algorithm will typically adjust to an AAT value of 11. Due to the higher Q-Factor the voltage on the antenna is also increasing. To put the receiver in an optimum signal level range, the capacitors C401 and C412 can be increased to 100 pF.

Table 1. NFC Forum matching alternatives

Default assembly Value NFC Forum replacement Value

C403 80 pF C403_NFCF 120 pF

C410 180 pF C410_NFCF 120 pF

R401 3R9 R401_NFCF 1R96

R402 3R9 R402_NFCF 1R96

Federal Communications Commission (FCC) and Industry Canada (IC) compliance statements

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4 Federal Communications Commission (FCC) and Industry Canada (IC) compliance statements

4.1 FCC Compliance Statement

4.1.1 Part 15.19

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.

4.1.2 Part 15.21

Any changes or modifications to this equipment not expressly approved by STMicroelectronics may cause harmful interference and void the user’s authority to operate this equipment.

4.1.3 Part 15.105

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and receiver.

• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

• Consult the dealer or an experienced radio/ TV technician for help.

4.1.4 FCC ID

FCC ID: YCPR3911BD1

4.2 Formal notices required by the Industry Canada (“IC”)

4.2.1 Compliance Statement

This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation.

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4.2.2 Declaration de Conformité

Le présent appareil est conforme aux CNR d’Industrie Canada applicables aux appareils radio exempts de licence. L’exploitation est autorisée aux deux conditions suivantes: (1) l’appareil ne doit pas produire de brouillage, et (2) l’utilisateur de l’appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d’en compromettre le fonctionnement.

4.2.3 IC ID

IC ID: 8976B-R3911BD1

Revision history UM2042

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5 Revision history

Table 2. Document revision history

Date Revision Changes

23-Jun-2017 1 Initial release.

25-Jul-2017 2

Added Section 4.1.3: Part 15.105.

Updated Section 4.1.4: FCC ID and Section 4.2.3: IC ID.

Updated Figure 8: PCB overview, Figure 9: PCB layout, top layer and Figure 12: PCB layout, bottom layer.

15-Dec-2017 3Updated Figure 1: ST25R3911B-DISCO PCB (top view).

Updated Section 2: Hardware.

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