Video Input to DDR Memory, DDR Memory to TFT Controller VGA Outputby ECE532-2015-Group01

This describes how to take video input from the OV7670 Camera and write a frame buffer to memory through an AXI Master Interface. The following instructions describe how to create a system on the Nexys4DDR which takes video input, writes it to memory, and sets up the TFT controller to display through the VGA port.

1. Follow the ECE532 DDR Tutorial to create a system with MicroBlaze and the MIG. The Camera will write to DDR Memory through the MIG.

2. Copy the OV7670 folder included with this tutorial into a local directory. Include this IP by clicking on Project Settings under Project Manager in Vivado. Select IP and click Add Repository. Point to OV7670. Click Select and OK to exit Project Settings.

3. In the block diagram created in step 1, add the OV7670 IP. This takes the raw Camera signals and converts them to AXI-Stream signals compatible with the VDMA Block.

4. Next add the Axi Video Direct Memory Access (VDMA) IP. This block converts the AXI-Stream into full AXI transactions to DDR Memory.

5. Double Click on the VDMA and re-customize as follows:

6. The Camera requires a 25.175MHz clock to produce 30 frames per second. Add a clock by double-clicking on the Clocking Wizard block and setting clk_out3 to 25.175MHz.

7. This clock also requires a separate reset module. Add a Processor System Reset block. The added blocks should look like this:

8. Connect the blocks as shown below:

9. Next, connect clk_out3 (25.175MHz) to:a. OV7670/clk25b. axi_vdma_0/s_axis_s2mm_aclkc. proc_sys_reset_0/slowest_sync_clk.

10. Next Run Connection Automation as follows:a. Connect /axi_vdma_0/M_AXI_S2MM to /mig_7series_0/S_AXIb. Connect /axi_vdma_0/S_AXI_LITE to /microblaze_0c. Connect /proc_sys_reset_0/ext_reset_in to reset (external pin)

11. Next, make the 10 unconnected OV7670 ports external ports. These blocks should now look like this:

12. Next, add the Axi TFT Controller. Double-click on it and re-customize it so that TFT Interface is VGA, AXI Data Width is 32, and Maximum Burst Length is 256.

13. Run connection automation as follows:a. Connect /axi_tft_0/M_AXI_MM to /mig_7series_0/S_AXIb. Connect /axi_tft_0/S_AXI_MM to micrblaze_0

14. Connect the TFT sys_tft_clk to clk_out3 (25.175MHz). Make tft_vga_r, tft_vga_g, tft_vga_b, tft_vsync, tft_hsync external ports.

15. The file pin_constraints.xdc in this package contains the pin constraints for the external ports for the camera and the VGA. Add these to the constraints file. Ensure the ports in this file match the ports in your external design.

16. Generate the block design. Before running synthesis, some modifications are necessary. The TFT outputs in RGB666 format. The Nexys4DDR board only has pins for RGB444. So the two LSBs of each colour’s external port need to be truncated. Open the top-level HDL wrapper and make this change. The design_1(top-level)/tft_vga_r port is of size 6 bits. The design_1_wrapper(wrapper)/tft_vga_r port is also of size 6 bits, but should be changed to 4 bits, and assigned to the 4 most-significant bits of design_1(top-level)/tft_vga_r. Do the same for green and blue ports. If this change is not made, it will cause a bitstream generation error as some external ports will not be assigned to pins.

17. Run synthesis, implementation, bitstream generation, and export to SDK.

18. In the address editor, check the base address of TFT, VDMA, and MIG. Suppose they are as follows:a. TFT: 0x44A0000b. VDMA: 0x44A10000c. MIG: 0x80000000

19. Use the following code to display to screen:

// Horizontal and Vertical Resolution of the Camera#define DISPLAY_COLUMNS 640#define DISPLAY_ROWS 480

// TFTvolatile unsigned int * TFT = (unsigned int *)0x44A00000;

// VDMAvolatile unsigned int * VDMA = (unsigned int *)0x44A10000;volatile unsigned int * VDMA_CR = (unsigned int *)0x44A10030;volatile unsigned int * VDMA_AD = (unsigned int *)0x44A100AC;volatile unsigned int * VDMA_ST = (unsigned int *)0x44A100A8;volatile unsigned int * VDMA_HS = (unsigned int *)0x44A100A4;volatile unsigned int * VDMA_VS = (unsigned int *)0x44A100A0;

int main(){

*(TFT) = 0x80000000; // Point TFT to address of frame buffer

*(VDMA_CR) = 0x1; // Enable VDMA*(VDMA_AD) = 0x80000000; // The base address of the

frame buffer*(VDMA_ST) = 4096; // Line size (stride value)*(VDMA_HS) = 4*DISPLAY_COLUMNS; // Horizontal Pixel Count *

4B/pixel*(VDMA_VS) = DISPLAY_ROWS; // Vertical Line Countreturn 0;

}

After setting the vertical line count, the VDMA turns on and starts writing at 30 frames per second to the specified address. TFT reads from this address and displays to screen.

NotesThe VDMA writes data in the same format that TFT uses. Each frame buffer occupies 2MB (1024x512 screen size, 4 bytes per pixel). However, only the top left corner contains valid data (top left 640 x 480 pixels). Each pixel contains RGB565 data, and the TFT reads it assuming it is RGB666, which we truncate above to RGB444.

VDMA writes: 0bXXXX XXXX RRRR R000 GGGG GG00 BBBB B000 (RGB565)TFT reads: 0bXXXX XXXX RRRR RRXX GGGG GGXX BBBB BBXX (RGB666)Screen Display: 0bXXXX XXXX RRRR XXXX GGGG XXXX BBBB XXXX (RGB444)

In the OV7670 file, there is a project which can be used to modify the IP block internals. Just make sure to re-package the IP and upgrade in any project in which it is used. Look at the VDMA and Camera OV7670 datasheets to see how the various input and output signals should be set and timed.